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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassc45e3592013-03-11 06:49:53 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
Simon Glassc45e3592013-03-11 06:49:53 +000010 */
11
12#include <common.h>
Simon Glassa815dab2018-11-15 18:43:52 -070013#include <bloblist.h>
Simon Glass1ea97892020-05-10 11:40:00 -060014#include <bootstage.h>
Simon Glass85d65312019-12-28 10:44:58 -070015#include <clock_legacy.h>
Simon Glassa73bda42015-11-08 23:47:45 -070016#include <console.h>
Mario Six97bbb602018-08-06 10:23:41 +020017#include <cpu.h>
Simon Glass1fa70f82019-11-14 12:57:34 -070018#include <cpu_func.h>
Simon Glassa730c5d2014-07-23 06:55:04 -060019#include <dm.h>
Simon Glass79fd2142019-08-01 09:46:43 -060020#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060021#include <env_internal.h>
Simon Glassc45e3592013-03-11 06:49:53 +000022#include <fdtdec.h>
Simon Glass15393432013-04-20 08:42:41 +000023#include <fs.h>
Simon Glassf11478f2019-12-28 10:45:07 -070024#include <hang.h>
Simon Glass50250b52013-03-11 14:30:42 +000025#include <i2c.h>
Simon Glass6980b6b2019-11-14 12:57:45 -070026#include <init.h>
Simon Glassc45e3592013-03-11 06:49:53 +000027#include <initcall.h>
Simon Glass42cf22f2019-08-01 09:46:38 -060028#include <lcd.h>
Simon Glass0f2af882020-05-10 11:40:05 -060029#include <log.h>
Simon Glassd1d087d2015-02-27 22:06:36 -070030#include <malloc.h>
Joe Hershberger65b905b2015-03-22 17:08:59 -050031#include <mapmem.h>
Simon Glass62cf9122013-04-26 02:53:43 +000032#include <os.h>
Simon Glassc45e3592013-03-11 06:49:53 +000033#include <post.h>
Simon Glass6ab91072017-03-31 08:40:38 -060034#include <relocate.h>
Simon Glass36736182019-11-14 12:57:24 -070035#include <serial.h>
Simon Glasse14f1a22018-11-15 18:44:09 -070036#ifdef CONFIG_SPL
37#include <spl.h>
38#endif
Jeroen Hofsteea802b982014-06-23 23:20:19 +020039#include <status_led.h>
Mario Six4481a5d2018-08-06 10:23:34 +020040#include <sysreset.h>
Simon Glass8e4f80f2016-02-24 09:14:50 -070041#include <timer.h>
Simon Glass209a1a62013-06-11 11:14:42 -070042#include <trace.h>
Simon Glassfce58f52016-01-18 19:52:21 -070043#include <video.h>
Simon Glass50250b52013-03-11 14:30:42 +000044#include <watchdog.h>
Simon Glass274e0b02020-05-10 11:39:56 -060045#include <asm/cache.h>
Simon Glassf004e8a2017-05-17 08:23:01 -060046#ifdef CONFIG_MACH_TYPE
47#include <asm/mach-types.h>
48#endif
Simon Glasse7706032017-03-31 08:40:39 -060049#if defined(CONFIG_MP) && defined(CONFIG_PPC)
50#include <asm/mp.h>
51#endif
Simon Glass3ba929a2020-10-30 21:38:53 -060052#include <asm/global_data.h>
Simon Glassc45e3592013-03-11 06:49:53 +000053#include <asm/io.h>
54#include <asm/sections.h>
Simon Glassa730c5d2014-07-23 06:55:04 -060055#include <dm/root.h>
Simon Glassb3c12562017-03-31 08:40:35 -060056#include <linux/errno.h>
Simon Glassc45e3592013-03-11 06:49:53 +000057
58/*
59 * Pointer to initial global data area
60 *
61 * Here we initialize it if needed.
62 */
63#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
64#undef XTRN_DECLARE_GLOBAL_DATA_PTR
65#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
Mario Six80b66dd2018-01-15 11:10:02 +010066DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
Simon Glassc45e3592013-03-11 06:49:53 +000067#else
68DECLARE_GLOBAL_DATA_PTR;
69#endif
70
71/*
Simon Glass839855c2015-04-28 20:25:03 -060072 * TODO(sjg@chromium.org): IMO this code should be
Simon Glassc45e3592013-03-11 06:49:53 +000073 * refactored to a single function, something like:
74 *
75 * void led_set_state(enum led_colour_t colour, int on);
76 */
77/************************************************************************
78 * Coloured LED functionality
79 ************************************************************************
80 * May be supplied by boards if desired
81 */
Jeroen Hofsteea802b982014-06-23 23:20:19 +020082__weak void coloured_LED_init(void) {}
83__weak void red_led_on(void) {}
84__weak void red_led_off(void) {}
85__weak void green_led_on(void) {}
86__weak void green_led_off(void) {}
87__weak void yellow_led_on(void) {}
88__weak void yellow_led_off(void) {}
89__weak void blue_led_on(void) {}
90__weak void blue_led_off(void) {}
Simon Glassc45e3592013-03-11 06:49:53 +000091
92/*
93 * Why is gd allocated a register? Prior to reloc it might be better to
94 * just pass it around to each function in this file?
95 *
96 * After reloc one could argue that it is hardly used and doesn't need
97 * to be in a register. Or if it is it should perhaps hold pointers to all
98 * global data for all modules, so that post-reloc we can avoid the massive
99 * literal pool we get on ARM. Or perhaps just encourage each module to use
100 * a structure...
101 */
102
Sonic Zhangf503a522014-07-17 19:01:34 +0800103#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glass50250b52013-03-11 14:30:42 +0000104static int init_func_watchdog_init(void)
105{
Tom Rini210ebce2017-03-14 11:08:10 -0400106# if defined(CONFIG_HW_WATCHDOG) && \
107 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Prasanthi Chellakumar0509c4e2018-10-09 11:46:40 -0700108 defined(CONFIG_SH) || \
Anatolij Gustschin87db2942016-06-13 14:24:23 +0200109 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roeseee86af22015-03-10 08:04:36 +0100110 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangf503a522014-07-17 19:01:34 +0800111 hw_watchdog_init();
Simon Glass50250b52013-03-11 14:30:42 +0000112 puts(" Watchdog enabled\n");
Anatolij Gustschind3aa98a2016-06-13 14:24:24 +0200113# endif
Simon Glass50250b52013-03-11 14:30:42 +0000114 WATCHDOG_RESET();
115
116 return 0;
117}
118
119int init_func_watchdog_reset(void)
120{
121 WATCHDOG_RESET();
122
123 return 0;
124}
125#endif /* CONFIG_WATCHDOG */
126
Jeroen Hofstee45846052014-10-08 22:57:22 +0200127__weak void board_add_ram_info(int use_default)
Simon Glass50250b52013-03-11 14:30:42 +0000128{
129 /* please define platform specific board_add_ram_info() */
130}
131
Simon Glassc45e3592013-03-11 06:49:53 +0000132static int init_baud_rate(void)
133{
Simon Glass22c34c22017-08-03 12:22:13 -0600134 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
Simon Glassc45e3592013-03-11 06:49:53 +0000135 return 0;
136}
137
138static int display_text_info(void)
139{
Ben Stoltz1930e8d2015-07-31 09:31:37 -0600140#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100141 ulong bss_start, bss_end, text_base;
Simon Glassc45e3592013-03-11 06:49:53 +0000142
Simon Glass9c9f44a2013-03-11 07:06:48 +0000143 bss_start = (ulong)&__bss_start;
144 bss_end = (ulong)&__bss_end;
Albert ARIBAUD6e294722014-02-22 17:53:43 +0100145
Sonic Zhangf503a522014-07-17 19:01:34 +0800146#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100147 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangf503a522014-07-17 19:01:34 +0800148#else
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100149 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangf503a522014-07-17 19:01:34 +0800150#endif
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100151
152 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100153 text_base, bss_start, bss_end);
Simon Glass62cf9122013-04-26 02:53:43 +0000154#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000155
Simon Glassc45e3592013-03-11 06:49:53 +0000156 return 0;
157}
158
Mario Six4481a5d2018-08-06 10:23:34 +0200159#ifdef CONFIG_SYSRESET
160static int print_resetinfo(void)
161{
162 struct udevice *dev;
163 char status[256];
164 int ret;
165
166 ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
167 if (ret) {
168 debug("%s: No sysreset device found (error: %d)\n",
169 __func__, ret);
170 /* Not all boards have sysreset drivers available during early
171 * boot, so don't fail if one can't be found.
172 */
173 return 0;
174 }
175
176 if (!sysreset_get_status(dev, status, sizeof(status)))
177 printf("%s", status);
178
179 return 0;
180}
181#endif
182
Mario Six97bbb602018-08-06 10:23:41 +0200183#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
184static int print_cpuinfo(void)
185{
186 struct udevice *dev;
187 char desc[512];
188 int ret;
189
Ye Li28abafd2020-05-03 21:58:50 +0800190 dev = cpu_get_current_dev();
191 if (!dev) {
192 debug("%s: Could not get CPU device\n",
193 __func__);
194 return -ENODEV;
Mario Six97bbb602018-08-06 10:23:41 +0200195 }
196
197 ret = cpu_get_desc(dev, desc, sizeof(desc));
198 if (ret) {
199 debug("%s: Could not get CPU description (err = %d)\n",
200 dev->name, ret);
201 return ret;
202 }
203
Bin Mengbe2269f2018-10-10 22:06:55 -0700204 printf("CPU: %s\n", desc);
Mario Six97bbb602018-08-06 10:23:41 +0200205
206 return 0;
207}
208#endif
209
Simon Glassc45e3592013-03-11 06:49:53 +0000210static int announce_dram_init(void)
211{
212 puts("DRAM: ");
213 return 0;
214}
215
216static int show_dram_config(void)
217{
York Sun60ac15a2014-05-02 17:28:05 -0700218 unsigned long long size;
Simon Glassc45e3592013-03-11 06:49:53 +0000219 int i;
220
221 debug("\nRAM Configuration:\n");
222 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
223 size += gd->bd->bi_dram[i].size;
Bin Mengc8964482015-08-06 01:31:20 -0700224 debug("Bank #%d: %llx ", i,
225 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glassc45e3592013-03-11 06:49:53 +0000226#ifdef DEBUG
227 print_size(gd->bd->bi_dram[i].size, "\n");
228#endif
229 }
230 debug("\nDRAM: ");
Simon Glassc45e3592013-03-11 06:49:53 +0000231
Simon Glass50250b52013-03-11 14:30:42 +0000232 print_size(size, "");
233 board_add_ram_info(0);
234 putc('\n');
Simon Glassc45e3592013-03-11 06:49:53 +0000235
236 return 0;
237}
238
Simon Glass2f949c32017-03-31 08:40:32 -0600239__weak int dram_init_banksize(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000240{
Stefan Roese90cda992020-08-12 13:02:39 +0200241 gd->bd->bi_dram[0].start = gd->ram_base;
Simon Glassc45e3592013-03-11 06:49:53 +0000242 gd->bd->bi_dram[0].size = get_effective_memsize();
Simon Glass2f949c32017-03-31 08:40:32 -0600243
244 return 0;
Simon Glassc45e3592013-03-11 06:49:53 +0000245}
246
Tom Rini52b2e262021-08-18 23:12:24 -0400247#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glass50250b52013-03-11 14:30:42 +0000248static int init_func_i2c(void)
249{
250 puts("I2C: ");
trema6612902013-09-21 18:13:34 +0200251 i2c_init_all();
Simon Glass50250b52013-03-11 14:30:42 +0000252 puts("ready\n");
253 return 0;
254}
255#endif
256
Rajesh Bhagatf7716782018-01-17 16:13:08 +0530257#if defined(CONFIG_VID)
258__weak int init_func_vid(void)
259{
260 return 0;
261}
262#endif
263
Simon Glassc45e3592013-03-11 06:49:53 +0000264static int setup_mon_len(void)
265{
Michal Simek65e915c2014-05-08 16:08:44 +0200266#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUD6e294722014-02-22 17:53:43 +0100267 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Heinrich Schuchardte7301bb2021-05-19 12:02:39 +0200268#elif defined(CONFIG_SANDBOX)
269 gd->mon_len = 0;
270#elif defined(CONFIG_EFI_APP)
Simon Glass62cf9122013-04-26 02:53:43 +0000271 gd->mon_len = (ulong)&_end - (ulong)_init;
Tom Rini210ebce2017-03-14 11:08:10 -0400272#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangf503a522014-07-17 19:01:34 +0800273 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Rick Chen3301bfc2017-12-26 13:55:58 +0800274#elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
Kun-Hua Huang89299e22015-08-24 14:52:35 +0800275 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
Simon Glass90632bd2016-05-14 18:49:28 -0600276#elif defined(CONFIG_SYS_MONITOR_BASE)
Simon Glass50250b52013-03-11 14:30:42 +0000277 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
278 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass9c9f44a2013-03-11 07:06:48 +0000279#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000280 return 0;
281}
282
Simon Glasse14f1a22018-11-15 18:44:09 -0700283static int setup_spl_handoff(void)
284{
285#if CONFIG_IS_ENABLED(HANDOFF)
Simon Glass90c1a582022-01-12 19:26:17 -0700286 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
Simon Glasse14f1a22018-11-15 18:44:09 -0700287 sizeof(struct spl_handoff));
288 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
289#endif
290
291 return 0;
292}
293
Simon Glassc45e3592013-03-11 06:49:53 +0000294__weak int arch_cpu_init(void)
295{
296 return 0;
297}
298
Paul Burton1f508dd2016-09-21 11:18:46 +0100299__weak int mach_cpu_init(void)
300{
301 return 0;
302}
303
Simon Glassc45e3592013-03-11 06:49:53 +0000304/* Get the top of usable RAM */
305__weak ulong board_get_usable_ram_top(ulong total_size)
306{
Heinrich Schuchardtf6a18be2020-05-09 21:21:14 +0200307#if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700308 /*
Simon Glass839855c2015-04-28 20:25:03 -0600309 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700310 * 32-bit address space. If so, clip the usable RAM so it doesn't.
311 */
312 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
313 /*
314 * Will wrap back to top of 32-bit space when reservations
315 * are made.
316 */
317 return 0;
318#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000319 return gd->ram_top;
320}
321
322static int setup_dest_addr(void)
323{
324 debug("Monitor len: %08lX\n", gd->mon_len);
325 /*
326 * Ram is setup, size stored in gd !!
327 */
328 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
York Sun4de24ef2017-03-06 09:02:28 -0800329#if defined(CONFIG_SYS_MEM_TOP_HIDE)
Simon Glassc45e3592013-03-11 06:49:53 +0000330 /*
331 * Subtract specified amount of memory to hide so that it won't
332 * get "touched" at all by U-Boot. By fixing up gd->ram_size
333 * the Linux kernel should now get passed the now "corrected"
York Sun4de24ef2017-03-06 09:02:28 -0800334 * memory size and won't touch it either. This should work
335 * for arch/ppc and arch/powerpc. Only Linux board ports in
336 * arch/powerpc with bootwrapper support, that recalculate the
337 * memory size from the SDRAM controller setup will have to
338 * get fixed.
Simon Glassc45e3592013-03-11 06:49:53 +0000339 */
York Sun4de24ef2017-03-06 09:02:28 -0800340 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
341#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000342#ifdef CONFIG_SYS_SDRAM_BASE
Siva Durga Prasad Paladugu94a1d522018-07-16 15:56:10 +0530343 gd->ram_base = CONFIG_SYS_SDRAM_BASE;
Simon Glassc45e3592013-03-11 06:49:53 +0000344#endif
Siva Durga Prasad Paladugu94a1d522018-07-16 15:56:10 +0530345 gd->ram_top = gd->ram_base + get_effective_memsize();
Simon Glassc45e3592013-03-11 06:49:53 +0000346 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadad1589242013-05-27 00:37:30 +0000347 gd->relocaddr = gd->ram_top;
Simon Glassc45e3592013-03-11 06:49:53 +0000348 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauda0afc22014-09-03 13:57:54 -0700349#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glass50250b52013-03-11 14:30:42 +0000350 /*
351 * We need to make sure the location we intend to put secondary core
352 * boot code is reserved and not used by any part of u-boot
353 */
Masahiro Yamadad1589242013-05-27 00:37:30 +0000354 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
355 gd->relocaddr = determine_mp_bootpg(NULL);
356 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glass50250b52013-03-11 14:30:42 +0000357 }
358#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000359 return 0;
360}
361
Simon Glassc45e3592013-03-11 06:49:53 +0000362#ifdef CONFIG_PRAM
363/* reserve protected RAM */
364static int reserve_pram(void)
365{
366 ulong reg;
367
Simon Glass22c34c22017-08-03 12:22:13 -0600368 reg = env_get_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadad1589242013-05-27 00:37:30 +0000369 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glassc45e3592013-03-11 06:49:53 +0000370 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadad1589242013-05-27 00:37:30 +0000371 gd->relocaddr);
Simon Glassc45e3592013-03-11 06:49:53 +0000372 return 0;
373}
374#endif /* CONFIG_PRAM */
375
376/* Round memory pointer down to next 4 kB limit */
377static int reserve_round_4k(void)
378{
Masahiro Yamadad1589242013-05-27 00:37:30 +0000379 gd->relocaddr &= ~(4096 - 1);
Simon Glassc45e3592013-03-11 06:49:53 +0000380 return 0;
381}
382
Ovidiu Panait2a2941b2020-03-29 20:57:41 +0300383__weak int arch_reserve_mmu(void)
384{
385 return 0;
386}
387
Simon Glassfce58f52016-01-18 19:52:21 -0700388static int reserve_video(void)
389{
Simon Glass70ac86c2017-03-31 08:40:30 -0600390#ifdef CONFIG_DM_VIDEO
Simon Glassfce58f52016-01-18 19:52:21 -0700391 ulong addr;
392 int ret;
393
394 addr = gd->relocaddr;
395 ret = video_reserve(&addr);
396 if (ret)
397 return ret;
Simon Glass379e41f2020-09-27 18:46:22 -0600398 debug("Reserving %luk for video at: %08lx\n",
Patrick Delaunaya73a7d32021-04-09 18:02:06 +0200399 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
Simon Glassfce58f52016-01-18 19:52:21 -0700400 gd->relocaddr = addr;
Simon Glass70ac86c2017-03-31 08:40:30 -0600401#elif defined(CONFIG_LCD)
Simon Glassfce58f52016-01-18 19:52:21 -0700402# ifdef CONFIG_FB_ADDR
Simon Glassc45e3592013-03-11 06:49:53 +0000403 gd->fb_base = CONFIG_FB_ADDR;
Simon Glassfce58f52016-01-18 19:52:21 -0700404# else
Simon Glassc45e3592013-03-11 06:49:53 +0000405 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadad1589242013-05-27 00:37:30 +0000406 gd->relocaddr = lcd_setmem(gd->relocaddr);
407 gd->fb_base = gd->relocaddr;
Simon Glassfce58f52016-01-18 19:52:21 -0700408# endif /* CONFIG_FB_ADDR */
Simon Glass70ac86c2017-03-31 08:40:30 -0600409#endif
Simon Glass50250b52013-03-11 14:30:42 +0000410
411 return 0;
412}
Simon Glass50250b52013-03-11 14:30:42 +0000413
Simon Glass1008da02016-01-18 19:52:20 -0700414static int reserve_trace(void)
415{
416#ifdef CONFIG_TRACE
417 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
418 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
Heinrich Schuchardtc960b142019-06-14 21:52:22 +0200419 debug("Reserving %luk for trace data at: %08lx\n",
420 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
Simon Glass1008da02016-01-18 19:52:20 -0700421#endif
422
423 return 0;
424}
425
Simon Glassc45e3592013-03-11 06:49:53 +0000426static int reserve_uboot(void)
427{
Alexey Brodkinc76af2a2018-05-25 16:08:14 +0300428 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
429 /*
430 * reserve memory for U-Boot code, data & bss
431 * round down to next 4 kB limit
432 */
433 gd->relocaddr -= gd->mon_len;
434 gd->relocaddr &= ~(4096 - 1);
435 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
436 /* round down to next 64 kB limit so that IVPR stays aligned */
437 gd->relocaddr &= ~(65536 - 1);
438 #endif
Simon Glassc45e3592013-03-11 06:49:53 +0000439
Alexey Brodkinc76af2a2018-05-25 16:08:14 +0300440 debug("Reserving %ldk for U-Boot at: %08lx\n",
441 gd->mon_len >> 10, gd->relocaddr);
442 }
Masahiro Yamadad1589242013-05-27 00:37:30 +0000443
444 gd->start_addr_sp = gd->relocaddr;
445
Simon Glassc45e3592013-03-11 06:49:53 +0000446 return 0;
447}
448
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100449/*
450 * reserve after start_addr_sp the requested size and make the stack pointer
451 * 16-byte aligned, this alignment is needed for cast on the reserved memory
452 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
453 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
454 */
455static unsigned long reserve_stack_aligned(size_t size)
456{
457 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
458}
459
Vikas Manocha4d49e102019-08-16 09:57:44 -0700460#ifdef CONFIG_SYS_NONCACHED_MEMORY
461static int reserve_noncached(void)
462{
Stephen Warren9b496432019-08-27 11:54:31 -0600463 /*
464 * The value of gd->start_addr_sp must match the value of malloc_start
465 * calculated in boatrd_f.c:initr_malloc(), which is passed to
466 * board_r.c:mem_malloc_init() and then used by
467 * cache.c:noncached_init()
468 *
469 * These calculations must match the code in cache.c:noncached_init()
470 */
471 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
472 MMU_SECTION_SIZE;
473 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
474 MMU_SECTION_SIZE);
Vikas Manocha4d49e102019-08-16 09:57:44 -0700475 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
476 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
477
478 return 0;
479}
480#endif
481
Simon Glassc45e3592013-03-11 06:49:53 +0000482/* reserve memory for malloc() area */
483static int reserve_malloc(void)
484{
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100485 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
Simon Glassc45e3592013-03-11 06:49:53 +0000486 debug("Reserving %dk for malloc() at: %08lx\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100487 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Vikas Manocha4d49e102019-08-16 09:57:44 -0700488#ifdef CONFIG_SYS_NONCACHED_MEMORY
489 reserve_noncached();
490#endif
491
Simon Glassc45e3592013-03-11 06:49:53 +0000492 return 0;
493}
494
495/* (permanently) allocate a Board Info struct */
496static int reserve_board(void)
497{
Sonic Zhangf503a522014-07-17 19:01:34 +0800498 if (!gd->bd) {
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900499 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
500 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
501 sizeof(struct bd_info));
502 memset(gd->bd, '\0', sizeof(struct bd_info));
Sonic Zhangf503a522014-07-17 19:01:34 +0800503 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900504 sizeof(struct bd_info), gd->start_addr_sp);
Sonic Zhangf503a522014-07-17 19:01:34 +0800505 }
Simon Glassc45e3592013-03-11 06:49:53 +0000506 return 0;
507}
508
Simon Glassc45e3592013-03-11 06:49:53 +0000509static int reserve_global_data(void)
510{
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100511 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
Masahiro Yamadad1589242013-05-27 00:37:30 +0000512 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glassc45e3592013-03-11 06:49:53 +0000513 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100514 sizeof(gd_t), gd->start_addr_sp);
Simon Glassc45e3592013-03-11 06:49:53 +0000515 return 0;
516}
517
518static int reserve_fdt(void)
519{
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200520 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
521 /*
522 * If the device tree is sitting immediately above our image
523 * then we must relocate it. If it is embedded in the data
524 * section, then it will be relocated with other data.
525 */
526 if (gd->fdt_blob) {
527 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
Simon Glassc45e3592013-03-11 06:49:53 +0000528
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200529 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
530 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
531 debug("Reserving %lu Bytes for FDT at: %08lx\n",
532 gd->fdt_size, gd->start_addr_sp);
533 }
Simon Glassc45e3592013-03-11 06:49:53 +0000534 }
535
536 return 0;
537}
538
Simon Glassb9aff922017-05-22 05:05:30 -0600539static int reserve_bootstage(void)
540{
541#ifdef CONFIG_BOOTSTAGE
542 int size = bootstage_get_size();
543
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100544 gd->start_addr_sp = reserve_stack_aligned(size);
Simon Glassb9aff922017-05-22 05:05:30 -0600545 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
546 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
547 gd->start_addr_sp);
548#endif
549
550 return 0;
551}
552
Patrick Delaunaya0a2b212018-03-13 13:57:00 +0100553__weak int arch_reserve_stacks(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000554{
Andreas Bießmann25429862015-02-06 23:06:45 +0100555 return 0;
556}
Simon Glass4d2aee82013-03-05 14:39:45 +0000557
Andreas Bießmann25429862015-02-06 23:06:45 +0100558static int reserve_stacks(void)
559{
560 /* make stack pointer 16-byte aligned */
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100561 gd->start_addr_sp = reserve_stack_aligned(16);
Simon Glassc45e3592013-03-11 06:49:53 +0000562
563 /*
Simon Glass839855c2015-04-28 20:25:03 -0600564 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann25429862015-02-06 23:06:45 +0100565 * gd->irq_sp
Simon Glassc45e3592013-03-11 06:49:53 +0000566 */
Andreas Bießmann25429862015-02-06 23:06:45 +0100567 return arch_reserve_stacks();
Simon Glassc45e3592013-03-11 06:49:53 +0000568}
569
Simon Glassa815dab2018-11-15 18:43:52 -0700570static int reserve_bloblist(void)
571{
572#ifdef CONFIG_BLOBLIST
Simon Glass9e945052020-09-27 18:46:18 -0600573 /* Align to a 4KB boundary for easier reading of addresses */
Simon Glassab7e7462021-01-13 20:29:43 -0700574 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
575 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
576 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
577 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassa815dab2018-11-15 18:43:52 -0700578#endif
579
580 return 0;
581}
582
Simon Glassc45e3592013-03-11 06:49:53 +0000583static int display_new_sp(void)
584{
Masahiro Yamadad1589242013-05-27 00:37:30 +0000585 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glassc45e3592013-03-11 06:49:53 +0000586
587 return 0;
588}
589
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300590__weak int arch_setup_bdinfo(void)
Ovidiu Panait0c5e9a02020-07-24 14:12:14 +0300591{
592 return 0;
593}
594
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300595int setup_bdinfo(void)
596{
Ovidiu Panaita5855882020-07-24 14:12:16 +0300597 struct bd_info *bd = gd->bd;
598
Ovidiu Panait5fc60602020-07-24 14:12:17 +0300599 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
600 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
601 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
602 }
603
Ovidiu Panait941e6e62020-11-28 10:43:06 +0200604#ifdef CONFIG_MACH_TYPE
605 bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
606#endif
607
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300608 return arch_setup_bdinfo();
609}
610
Simon Glassc45e3592013-03-11 06:49:53 +0000611#ifdef CONFIG_POST
612static int init_post(void)
613{
614 post_bootmode_init();
615 post_run(NULL, POST_ROM | post_bootmode_get(0));
616
617 return 0;
618}
619#endif
620
Simon Glassc45e3592013-03-11 06:49:53 +0000621static int reloc_fdt(void)
622{
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200623 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
624 if (gd->flags & GD_FLG_SKIP_RELOC)
625 return 0;
626 if (gd->new_fdt) {
627 memcpy(gd->new_fdt, gd->fdt_blob,
628 fdt_totalsize(gd->fdt_blob));
629 gd->fdt_blob = gd->new_fdt;
630 }
Simon Glassc45e3592013-03-11 06:49:53 +0000631 }
632
633 return 0;
634}
635
Simon Glassb9aff922017-05-22 05:05:30 -0600636static int reloc_bootstage(void)
637{
638#ifdef CONFIG_BOOTSTAGE
639 if (gd->flags & GD_FLG_SKIP_RELOC)
640 return 0;
641 if (gd->new_bootstage) {
642 int size = bootstage_get_size();
643
644 debug("Copying bootstage from %p to %p, size %x\n",
645 gd->bootstage, gd->new_bootstage, size);
646 memcpy(gd->new_bootstage, gd->bootstage, size);
647 gd->bootstage = gd->new_bootstage;
Simon Glass39d58522019-10-21 17:26:50 -0600648 bootstage_relocate();
Simon Glassb9aff922017-05-22 05:05:30 -0600649 }
650#endif
651
652 return 0;
653}
654
Simon Glassa815dab2018-11-15 18:43:52 -0700655static int reloc_bloblist(void)
656{
657#ifdef CONFIG_BLOBLIST
Simon Glass5d2199d2021-11-03 21:09:20 -0600658 /*
659 * Relocate only if we are supposed to send it
660 */
661 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
662 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
663 debug("Not relocating bloblist\n");
Simon Glassa815dab2018-11-15 18:43:52 -0700664 return 0;
Simon Glass5d2199d2021-11-03 21:09:20 -0600665 }
Simon Glassa815dab2018-11-15 18:43:52 -0700666 if (gd->new_bloblist) {
667 int size = CONFIG_BLOBLIST_SIZE;
668
669 debug("Copying bloblist from %p to %p, size %x\n",
670 gd->bloblist, gd->new_bloblist, size);
Simon Glassab7e7462021-01-13 20:29:43 -0700671 bloblist_reloc(gd->new_bloblist, CONFIG_BLOBLIST_SIZE_RELOC,
672 gd->bloblist, size);
Simon Glassa815dab2018-11-15 18:43:52 -0700673 gd->bloblist = gd->new_bloblist;
674 }
675#endif
676
677 return 0;
678}
679
Simon Glassc45e3592013-03-11 06:49:53 +0000680static int setup_reloc(void)
681{
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100682 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
Sonic Zhangf503a522014-07-17 19:01:34 +0800683#ifdef CONFIG_SYS_TEXT_BASE
Lothar Waßmann160583b2017-06-08 10:18:25 +0200684#ifdef ARM
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100685 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
Lothar Waßmann160583b2017-06-08 10:18:25 +0200686#elif defined(CONFIG_M68K)
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100687 /*
688 * On all ColdFire arch cpu, monitor code starts always
689 * just after the default vector table location, so at 0x400
690 */
691 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
Simon Glass752707a2019-04-08 13:20:41 -0600692#elif !defined(CONFIG_SANDBOX)
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100693 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.itf245ae92015-02-12 01:40:17 +0100694#endif
Sonic Zhangf503a522014-07-17 19:01:34 +0800695#endif
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100696 }
697
Simon Glassc45e3592013-03-11 06:49:53 +0000698 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
699
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100700 if (gd->flags & GD_FLG_SKIP_RELOC) {
701 debug("Skipping relocation due to flag\n");
702 } else {
703 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
704 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
705 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
706 gd->start_addr_sp);
707 }
Simon Glassc45e3592013-03-11 06:49:53 +0000708
709 return 0;
710}
711
mario.six@gdsys.cc7e9b9d62017-02-22 16:07:22 +0100712#ifdef CONFIG_OF_BOARD_FIXUP
713static int fix_fdt(void)
714{
715 return board_fix_fdt((void *)gd->fdt_blob);
716}
717#endif
718
Simon Glassc45e3592013-03-11 06:49:53 +0000719/* ARM calls relocate_code from its crt0.S */
Simon Glass6e1a81a2017-01-16 07:03:49 -0700720#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
721 !CONFIG_IS_ENABLED(X86_64)
Simon Glassc45e3592013-03-11 06:49:53 +0000722
723static int jump_to_copy(void)
724{
Simon Glass00dd17a2015-08-04 12:33:39 -0600725 if (gd->flags & GD_FLG_SKIP_RELOC)
726 return 0;
Simon Glass6d179872013-03-05 14:39:52 +0000727 /*
728 * x86 is special, but in a nice way. It uses a trampoline which
729 * enables the dcache if possible.
730 *
731 * For now, other archs use relocate_code(), which is implemented
732 * similarly for all archs. When we do generic relocation, hopefully
733 * we can make all archs enable the dcache prior to relocation.
734 */
Alexey Brodkin913e9f02015-02-24 19:40:36 +0300735#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass6d179872013-03-05 14:39:52 +0000736 /*
737 * SDRAM and console are now initialised. The final stack can now
738 * be setup in SDRAM. Code execution will continue in Flash, but
739 * with the stack in SDRAM and Global Data in temporary memory
740 * (CPU cache)
741 */
Simon Glass0e27b872015-08-10 20:44:32 -0600742 arch_setup_gd(gd->new_gd);
Simon Glass6d179872013-03-05 14:39:52 +0000743 board_init_f_r_trampoline(gd->start_addr_sp);
744#else
Masahiro Yamadad1589242013-05-27 00:37:30 +0000745 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass6d179872013-03-05 14:39:52 +0000746#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000747
748 return 0;
749}
750#endif
751
752/* Record the board_init_f() bootstage (after arch_cpu_init()) */
Simon Glass88200332017-05-22 05:05:25 -0600753static int initf_bootstage(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000754{
Simon Glassc55d5c32017-06-07 10:28:46 -0600755 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
756 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
Simon Glass88200332017-05-22 05:05:25 -0600757 int ret;
758
Simon Glass01154cb2017-05-22 05:05:35 -0600759 ret = bootstage_init(!from_spl);
Simon Glass88200332017-05-22 05:05:25 -0600760 if (ret)
761 return ret;
Simon Glass01154cb2017-05-22 05:05:35 -0600762 if (from_spl) {
763 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
764 CONFIG_BOOTSTAGE_STASH_SIZE);
765
766 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
767 if (ret && ret != -ENOENT) {
768 debug("Failed to unstash bootstage: err=%d\n", ret);
769 return ret;
770 }
771 }
Simon Glass88200332017-05-22 05:05:25 -0600772
Simon Glassc45e3592013-03-11 06:49:53 +0000773 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
774
775 return 0;
776}
777
Simon Glassa730c5d2014-07-23 06:55:04 -0600778static int initf_dm(void)
779{
Andy Yan1fa20e4d2017-07-24 17:43:34 +0800780#if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
Simon Glassa730c5d2014-07-23 06:55:04 -0600781 int ret;
782
Simon Glassea6a6092020-05-10 11:39:59 -0600783 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
Simon Glassa730c5d2014-07-23 06:55:04 -0600784 ret = dm_init_and_scan(true);
Simon Glassea6a6092020-05-10 11:39:59 -0600785 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
Simon Glassa730c5d2014-07-23 06:55:04 -0600786 if (ret)
787 return ret;
Ovidiu Panait525a2ec2020-11-28 10:43:05 +0200788
789 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
790 ret = dm_timer_init();
791 if (ret)
792 return ret;
793 }
Simon Glass8e4f80f2016-02-24 09:14:50 -0700794#endif
Simon Glassa730c5d2014-07-23 06:55:04 -0600795
796 return 0;
797}
798
Simon Glass5ded7e52015-01-19 22:16:12 -0700799/* Architecture-specific memory reservation */
800__weak int reserve_arch(void)
801{
802 return 0;
803}
804
Simon Glass7af8d052015-03-05 12:25:16 -0700805__weak int arch_cpu_init_dm(void)
806{
807 return 0;
808}
809
Ovidiu Panait8e0319f2020-01-22 22:28:25 +0200810__weak int checkcpu(void)
811{
812 return 0;
813}
814
Ovidiu Panaitc508b272020-02-05 08:54:42 +0200815__weak int clear_bss(void)
816{
817 return 0;
818}
819
Simon Glass2031fad2017-01-16 07:03:50 -0700820static const init_fnc_t init_sequence_f[] = {
Simon Glassc45e3592013-03-11 06:49:53 +0000821 setup_mon_len,
Simon Glass26b78b22015-02-27 22:06:34 -0700822#ifdef CONFIG_OF_CONTROL
Simon Glassa0877672015-02-27 22:06:35 -0700823 fdtdec_setup,
Simon Glass26b78b22015-02-27 22:06:34 -0700824#endif
Heinrich Schuchardt2aecfc52019-06-02 00:53:24 +0200825#ifdef CONFIG_TRACE_EARLY
Simon Glass209a1a62013-06-11 11:14:42 -0700826 trace_early_init,
Kevin Hilman676f0192014-12-09 15:03:58 -0800827#endif
Simon Glasscfcb8862014-11-10 18:00:18 -0700828 initf_malloc,
Simon Glass55e32ba2017-12-04 13:48:28 -0700829 log_init,
Simon Glasse635af12017-05-22 05:05:31 -0600830 initf_bootstage, /* uses its own timer, so does not need DM */
Simon Glassa815dab2018-11-15 18:43:52 -0700831#ifdef CONFIG_BLOBLIST
832 bloblist_init,
833#endif
Simon Glasse14f1a22018-11-15 18:44:09 -0700834 setup_spl_handoff,
Ovidiu Panait85a31ac2020-11-28 10:43:04 +0200835#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
836 console_record_init,
837#endif
Simon Glass295c4232017-03-28 10:27:18 -0600838#if defined(CONFIG_HAVE_FSP)
839 arch_fsp_init,
Bin Meng178f8972015-08-20 06:40:18 -0700840#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000841 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton1f508dd2016-09-21 11:18:46 +0100842 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass6df5de22014-09-03 17:36:59 -0600843 initf_dm,
Simon Glass7af8d052015-03-05 12:25:16 -0700844 arch_cpu_init_dm,
Simon Glassc45e3592013-03-11 06:49:53 +0000845#if defined(CONFIG_BOARD_EARLY_INIT_F)
846 board_early_init_f,
847#endif
Simon Glass6829d8c2017-03-28 10:27:26 -0600848#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glass70064a72017-03-28 10:27:19 -0600849 /* get CPU and bus clocks according to the environment variable */
Simon Glass50250b52013-03-11 14:30:42 +0000850 get_clocks, /* get CPU and bus clocks (etc.) */
Simon Glasse8d20d42017-03-28 10:27:23 -0600851#endif
Angelo Dureghellocd226852017-05-10 23:58:06 +0200852#if !defined(CONFIG_M68K)
Simon Glassc45e3592013-03-11 06:49:53 +0000853 timer_init, /* initialize timer */
Angelo Dureghellocd226852017-05-10 23:58:06 +0200854#endif
Simon Glass50250b52013-03-11 14:30:42 +0000855#if defined(CONFIG_BOARD_POSTCLK_INIT)
856 board_postclk_init,
857#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000858 env_init, /* initialize environment */
859 init_baud_rate, /* initialze baudrate settings */
860 serial_init, /* serial communications setup */
861 console_init_f, /* stage 1 init of console */
862 display_options, /* say that we are here */
863 display_text_info, /* show debugging info if required */
Simon Glass50250b52013-03-11 14:30:42 +0000864 checkcpu,
Mario Six4481a5d2018-08-06 10:23:34 +0200865#if defined(CONFIG_SYSRESET)
866 print_resetinfo,
867#endif
Simon Glass68c1d012017-01-23 13:31:25 -0700868#if defined(CONFIG_DISPLAY_CPUINFO)
Simon Glassc45e3592013-03-11 06:49:53 +0000869 print_cpuinfo, /* display cpu info (and speed) */
Simon Glass68c1d012017-01-23 13:31:25 -0700870#endif
Cooper Jr., Franklind8b354a2017-06-16 17:25:12 -0500871#if defined(CONFIG_DTB_RESELECT)
872 embedded_dtb_select,
873#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000874#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada9607f7a2015-01-14 17:07:05 +0900875 show_board_info,
Simon Glassc45e3592013-03-11 06:49:53 +0000876#endif
Simon Glass50250b52013-03-11 14:30:42 +0000877 INIT_FUNC_WATCHDOG_INIT
878#if defined(CONFIG_MISC_INIT_F)
879 misc_init_f,
880#endif
881 INIT_FUNC_WATCHDOG_RESET
Tom Rini52b2e262021-08-18 23:12:24 -0400882#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glass50250b52013-03-11 14:30:42 +0000883 init_func_i2c,
884#endif
Rajesh Bhagatf7716782018-01-17 16:13:08 +0530885#if defined(CONFIG_VID) && !defined(CONFIG_SPL)
886 init_func_vid,
887#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000888 announce_dram_init,
Simon Glassc45e3592013-03-11 06:49:53 +0000889 dram_init, /* configure available RAM banks */
Simon Glass50250b52013-03-11 14:30:42 +0000890#ifdef CONFIG_POST
891 post_init_f,
892#endif
893 INIT_FUNC_WATCHDOG_RESET
894#if defined(CONFIG_SYS_DRAM_TEST)
895 testdram,
896#endif /* CONFIG_SYS_DRAM_TEST */
897 INIT_FUNC_WATCHDOG_RESET
898
Simon Glassc45e3592013-03-11 06:49:53 +0000899#ifdef CONFIG_POST
900 init_post,
901#endif
Simon Glass50250b52013-03-11 14:30:42 +0000902 INIT_FUNC_WATCHDOG_RESET
Simon Glassc45e3592013-03-11 06:49:53 +0000903 /*
904 * Now that we have DRAM mapped and working, we can
905 * relocate the code and continue running from DRAM.
906 *
907 * Reserve memory at end of RAM for (top down in that order):
908 * - area that won't get touched by U-Boot and Linux (optional)
909 * - kernel log buffer
910 * - protected RAM
911 * - LCD framebuffer
912 * - monitor code
913 * - board info struct
914 */
915 setup_dest_addr,
Pragnesh Patelad51fec2020-08-13 10:12:26 +0530916#ifdef CONFIG_OF_BOARD_FIXUP
917 fix_fdt,
918#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000919#ifdef CONFIG_PRAM
920 reserve_pram,
921#endif
922 reserve_round_4k,
Ovidiu Panait2a2941b2020-03-29 20:57:41 +0300923 arch_reserve_mmu,
Simon Glassfce58f52016-01-18 19:52:21 -0700924 reserve_video,
Simon Glass1008da02016-01-18 19:52:20 -0700925 reserve_trace,
Simon Glassc45e3592013-03-11 06:49:53 +0000926 reserve_uboot,
927 reserve_malloc,
928 reserve_board,
Simon Glassc45e3592013-03-11 06:49:53 +0000929 reserve_global_data,
930 reserve_fdt,
Simon Glassb9aff922017-05-22 05:05:30 -0600931 reserve_bootstage,
Simon Glassa815dab2018-11-15 18:43:52 -0700932 reserve_bloblist,
Simon Glass5ded7e52015-01-19 22:16:12 -0700933 reserve_arch,
Simon Glassc45e3592013-03-11 06:49:53 +0000934 reserve_stacks,
Simon Glass2f949c32017-03-31 08:40:32 -0600935 dram_init_banksize,
Simon Glassc45e3592013-03-11 06:49:53 +0000936 show_dram_config,
Simon Glass50250b52013-03-11 14:30:42 +0000937 INIT_FUNC_WATCHDOG_RESET
Ovidiu Panait6183c8d2020-07-24 14:12:20 +0300938 setup_bdinfo,
Simon Glassc45e3592013-03-11 06:49:53 +0000939 display_new_sp,
Simon Glass50250b52013-03-11 14:30:42 +0000940 INIT_FUNC_WATCHDOG_RESET
Simon Glassc45e3592013-03-11 06:49:53 +0000941 reloc_fdt,
Simon Glassb9aff922017-05-22 05:05:30 -0600942 reloc_bootstage,
Simon Glassa815dab2018-11-15 18:43:52 -0700943 reloc_bloblist,
Simon Glassc45e3592013-03-11 06:49:53 +0000944 setup_reloc,
Alexey Brodkin913e9f02015-02-24 19:40:36 +0300945#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glassd50b2f42015-01-01 16:18:09 -0700946 copy_uboot_to_ram,
Simon Glassd50b2f42015-01-01 16:18:09 -0700947 do_elf_reloc_fixups,
948#endif
Chris Zankel41e37372016-08-10 18:36:43 +0300949 clear_bss,
Simon Glass6e1a81a2017-01-16 07:03:49 -0700950#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
951 !CONFIG_IS_ENABLED(X86_64)
Simon Glassc45e3592013-03-11 06:49:53 +0000952 jump_to_copy,
953#endif
954 NULL,
955};
956
957void board_init_f(ulong boot_flags)
958{
Simon Glassc45e3592013-03-11 06:49:53 +0000959 gd->flags = boot_flags;
Alexey Brodkin07236912013-11-27 22:32:40 +0400960 gd->have_console = 0;
Simon Glassc45e3592013-03-11 06:49:53 +0000961
962 if (initcall_run_list(init_sequence_f))
963 hang();
964
Ben Stoltz1930e8d2015-07-31 09:31:37 -0600965#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Alexey Brodkinc157ab92015-12-16 19:24:10 +0300966 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
967 !defined(CONFIG_ARC)
Simon Glassc45e3592013-03-11 06:49:53 +0000968 /* NOTREACHED - jump_to_copy() does not return */
969 hang();
970#endif
971}
Simon Glass6d179872013-03-05 14:39:52 +0000972
Alexey Brodkin913e9f02015-02-24 19:40:36 +0300973#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass6d179872013-03-05 14:39:52 +0000974/*
975 * For now this code is only used on x86.
976 *
977 * init_sequence_f_r is the list of init functions which are run when
978 * U-Boot is executing from Flash with a semi-limited 'C' environment.
979 * The following limitations must be considered when implementing an
980 * '_f_r' function:
981 * - 'static' variables are read-only
982 * - Global Data (gd->xxx) is read/write
983 *
984 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
985 * supported). It _should_, if possible, copy global data to RAM and
986 * initialise the CPU caches (to speed up the relocation process)
987 *
988 * NOTE: At present only x86 uses this route, but it is intended that
989 * all archs will move to this when generic relocation is implemented.
990 */
Simon Glass2031fad2017-01-16 07:03:50 -0700991static const init_fnc_t init_sequence_f_r[] = {
Simon Glass6e1a81a2017-01-16 07:03:49 -0700992#if !CONFIG_IS_ENABLED(X86_64)
Simon Glass6d179872013-03-05 14:39:52 +0000993 init_cache_f_r,
Simon Glass6e1a81a2017-01-16 07:03:49 -0700994#endif
Simon Glass6d179872013-03-05 14:39:52 +0000995
996 NULL,
997};
998
999void board_init_f_r(void)
1000{
1001 if (initcall_run_list(init_sequence_f_r))
1002 hang();
1003
1004 /*
Simon Glass51f73f12016-03-11 22:06:51 -07001005 * The pre-relocation drivers may be using memory that has now gone
1006 * away. Mark serial as unavailable - this will fall back to the debug
1007 * UART if available.
Simon Glass55e32ba2017-12-04 13:48:28 -07001008 *
1009 * Do the same with log drivers since the memory may not be available.
Simon Glass51f73f12016-03-11 22:06:51 -07001010 */
Simon Glass55e32ba2017-12-04 13:48:28 -07001011 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
Simon Glassb77fe1f2017-09-05 19:49:45 -06001012#ifdef CONFIG_TIMER
1013 gd->timer = NULL;
1014#endif
Simon Glass51f73f12016-03-11 22:06:51 -07001015
1016 /*
Simon Glass6d179872013-03-05 14:39:52 +00001017 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1018 * Transfer execution from Flash to RAM by calculating the address
1019 * of the in-RAM copy of board_init_r() and calling it
1020 */
Alexey Brodkin9c832f12015-02-25 17:59:02 +03001021 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass6d179872013-03-05 14:39:52 +00001022
1023 /* NOTREACHED - board_init_r() does not return */
1024 hang();
1025}
Alexey Brodkin73503182015-03-24 11:12:47 +03001026#endif /* CONFIG_X86 */