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git01.mediatek.com / filogic / uboot / afa78aaf73763dd1fb77584ca5a9e87325bccb83 / . / arch / arm / mach-mvebu / Kconfig
blob: a320793a305979e1e5612b2e166552a884cab871 [file] [log] [blame]
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]1if ARCH_MVEBU
2
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]3config HAVE_MVEBU_EFUSE
4 bool
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]5
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]6config ARMADA_32BIT
7 bool
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]8 select BOARD_EARLY_INIT_F
Lokesh Vutla81b1a672018-04-26 18:21:26 +0530[diff] [blame]9 select CPU_V7A
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]10 select SPL_DM if SPL
11 select SPL_DM_SEQ_ALIAS if SPL
12 select SPL_OF_CONTROL if SPL
Tom Rinib7cc2fe2021-10-15 10:54:41 -0400[diff] [blame]13 select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese1f1b3e92019-04-11 08:58:32 +0200[diff] [blame]14 select SPL_SIMPLE_BUS if SPL
Michal Simek7e7ba3b2018-07-23 15:55:15 +0200[diff] [blame]15 select SUPPORT_SPL
Philip Oberfichtner5833e1b2022-08-17 15:07:12 +0200[diff] [blame]16 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese85bddff2019-04-12 16:42:28 +0200[diff] [blame]17 select TRANSLATION_OFFSET
Alexander Dahl3f3c8382023-12-21 08:26:10 +0100[diff] [blame]18 select TOOLS_KWBIMAGE if SPL
Pali Rohárc5c28df2022-04-06 16:20:20 +0200[diff] [blame]19 select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Roháraaed3282022-05-06 11:05:14 +0200[diff] [blame]20 select ARCH_VERY_EARLY_INIT
Marek Behún32a932a2024-04-04 09:50:59 +0200[diff] [blame]21 select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU
Marek Behún514628c2024-04-04 09:51:00 +0200[diff] [blame]22 select ARMADA_32BIT_SYSCON_SYSRESET if SYSRESET
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]23
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]24# ARMv7 SoCs...
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]25config ARMADA_375
26 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]27 select ARMADA_32BIT
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]28
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]29config ARMADA_38X
30 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]31 select ARMADA_32BIT
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]32 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]33
Joshua Scott4ba8e992020-11-09 10:14:08 +1300[diff] [blame]34config ARMADA_38X_HS_IMPEDANCE_THRESH
35 hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
36 depends on ARMADA_38X
37 default 0x6
38 range 0x0 0x7
39
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]40config ARMADA_XP
41 bool
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]42 select ARMADA_32BIT
43
44# ARMv8 SoCs...
45config ARMADA_3700
46 bool
47 select ARM64
Pali Rohár70d9bee2022-02-23 14:15:45 +0100[diff] [blame]48 select HAVE_MVEBU_EFUSE
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]49
Stefan Roesecb410332016-05-25 08:13:45 +0200[diff] [blame]50# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
51config ARMADA_8K
52 bool
53 select ARM64
54
Chris Packhameaab4612022-11-05 17:23:59 +1300[diff] [blame]55config ALLEYCAT_5
56 bool
57 select ARM64
58
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]59# Armada PLL frequency (used for NAND clock generation)
60config SYS_MVEBU_PLL_CLOCK
61 int
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]62 default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K || ARMADA_MSYS
Chris Packham1d496682016-10-26 14:08:30 +1300[diff] [blame]63 default "1000000000" if ARMADA_38X || ARMADA_375
64
Stefan Roese05b17652016-05-17 15:00:30 +0200[diff] [blame]65# Armada XP/38x SoC types...
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]66config MV78230
67 bool
68 select ARMADA_XP
69
70config MV78260
71 bool
72 select ARMADA_XP
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]73 imply CMD_SATA
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]74
75config MV78460
76 bool
77 select ARMADA_XP
78
Chris Packhama8f845e2019-04-11 22:22:50 +1200[diff] [blame]79config ARMADA_MSYS
80 bool
81 select ARMADA_32BIT
82
83config 98DX4251
84 bool
85 select ARMADA_MSYS
86
87config 98DX3336
88 bool
89 select ARMADA_MSYS
90
91config 98DX3236
92 bool
93 select ARMADA_MSYS
94
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]95config 88F6820
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]96 bool
97 select ARMADA_38X
98
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]99config CUSTOMER_BOARD_SUPPORT
100 bool
101
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]102config DDR4
103 bool "Support Marvell DDR4 Training driver"
104
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]105choice
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]106 prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]107 optional
108
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]109config TARGET_CLEARFOG
110 bool "Support ClearFog"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]111 select 88F6820
Baruch Siach1c5e95d2020-01-20 14:20:13 +0200[diff] [blame]112 select BOARD_LATE_INIT
Martin Rowe7eceb672023-03-27 21:24:09 +1000[diff] [blame]113 select OF_BOARD_SETUP
Stefan Roese73606402015-10-20 15:14:47 +0200[diff] [blame]114
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]115config TARGET_HELIOS4
116 bool "Support Helios4"
117 select 88F6820
118
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]119config TARGET_MVEBU_ARMADA_37XX
120 bool "Support Armada 37xx platforms"
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]121 select ARMADA_3700
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]122 imply SCSI
Stefan Roese6edf27e2016-05-17 15:04:16 +0200[diff] [blame]123
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]124config TARGET_DB_88F6720
125 bool "Support DB-88F6720 Armada 375"
126 select ARMADA_375
127
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]128config TARGET_DB_88F6820_GP
129 bool "Support DB-88F6820-GP"
Chris Packhamf5fc25b2016-09-22 12:56:13 +1200[diff] [blame]130 select 88F6820
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]131
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]132config TARGET_DB_88F6820_AMC
133 bool "Support DB-88F6820-AMC"
134 select 88F6820
135
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]136config TARGET_TURRIS_OMNIA
137 bool "Support Turris Omnia"
138 select 88F6820
Marek Behún0f2e66a2019-05-02 16:53:37 +0200[diff] [blame]139 select BOARD_LATE_INIT
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]140 select DM_I2C
141 select I2C_MUX
142 select I2C_MUX_PCA954x
Marek Behún4c3abea2021-10-09 19:33:46 +0200[diff] [blame]143 select SPL_DRIVERS_MISC
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]144 select SPL_I2C_MUX
Marek Behúnca6095b2021-10-09 19:33:45 +0200[diff] [blame]145 select SPL_SYS_MALLOC_SIMPLE
Marek Behún1e4cbb92019-05-02 16:53:28 +0200[diff] [blame]146 select SYS_I2C_MVTWSI
Marek Behún5e92efe2019-05-02 16:53:32 +0200[diff] [blame]147 select ATSHA204A
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]148
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]149config TARGET_TURRIS_MOX
Marek Behún1b010112023-10-20 16:29:16 +0200[diff] [blame]150 bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe"
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]151 select ARMADA_3700
Marek Behún1b010112023-10-20 16:29:16 +0200[diff] [blame]152 select BOARD_TYPES
153 select ENV_IS_IN_MMC
154 select ENV_IS_IN_SPI_FLASH
155 select MULTI_DTB_FIT
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]156
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]157config TARGET_MVEBU_ARMADA_8K
158 bool "Support Armada 7k/8k platforms"
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]159 select ARMADA_8K
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]160 select BOARD_LATE_INIT
Simon Glass0e5faf02017-06-14 21:28:21 -0600[diff] [blame]161 imply SCSI
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200[diff] [blame]162
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]163config TARGET_MVEBU_ALLEYCAT5
164 bool "Support AlleyCat 5 platforms"
165 select ALLEYCAT_5
166
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]167config TARGET_OCTEONTX2_CN913x
168 bool "Support CN913x platforms"
169 select ARMADA_8K
170 imply BOARD_EARLY_INIT_R
171 select BOARD_LATE_INIT
172 imply SCSI
173
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]174config TARGET_DB_MV784MP_GP
175 bool "Support db-mv784mp-gp"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]176 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]177 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]178
Tony Dinh6aebc1a2023-02-09 14:00:03 -0800[diff] [blame]179config TARGET_DS116
180 bool "Support Synology DS116"
181 select 88F6820
182
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]183config TARGET_DS414
184 bool "Support Synology DS414"
185 select MV78230
186
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]187config TARGET_MAXBCM
188 bool "Support maxbcm"
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]189 select BOARD_ECC_SUPPORT
Phil Suttera7f94ad2015-12-25 14:41:22 +0100[diff] [blame]190 select MV78460
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]191
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]192config TARGET_N2350
193 bool "Support Thecus N2350"
194 select 88F6820
195 select DDR4
196
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]197config TARGET_THEADORABLE
198 bool "Support theadorable Armada XP"
Tom Rini22d567e2017-01-22 19:43:11 -0500[diff] [blame]199 select BOARD_LATE_INIT if USB
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]200 select MV78260
Simon Glass203b3ab2017-06-14 21:28:24 -0600[diff] [blame]201 imply CMD_SATA
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]202
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]203config TARGET_CONTROLCENTERDC
204 bool "Support CONTROLCENTERDC"
205 select 88F6820
Tom Rini40a325f2022-03-30 18:07:24 -0400[diff] [blame]206 select CUSTOMER_BOARD_SUPPORT
Dirk Eibachfb605942017-02-22 16:07:23 +0100[diff] [blame]207
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]208config TARGET_X530
209 bool "Support Allied Telesis x530"
210 select 88F6820
211
Chris Packham7325f1f2023-07-10 10:47:36 +1200[diff] [blame]212config TARGET_X240
213 bool "Support Allied Telesis x240"
214 select ALLEYCAT_5
215
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]216config TARGET_DB_XC3_24G4XG
217 bool "Support DB-XC3-24G4XG"
218 select 98DX3336
219
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]220config TARGET_CRS3XX_98DX3236
221 bool "Support CRS3XX-98DX3236"
Luka Kovacicb686e222019-05-07 19:35:55 +0200[diff] [blame]222 select 98DX3236
223
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]224endchoice
225
Tom Rini59180392021-08-21 13:50:13 -0400[diff] [blame]226choice
227 prompt "DDR bus width"
228 default DDR_64BIT
229 depends on ARMADA_XP
230
231config DDR_64BIT
232 bool "64bit bus width"
233
234config DDR_32BIT
235 bool "32bit bus width"
236
237endchoice
238
Tom Rini592bcd02021-08-21 13:50:15 -0400[diff] [blame]239config DDR_LOG_LEVEL
240 int "DDR training code log level"
241 depends on ARMADA_XP
242 default 0
243 range 0 3
244 help
245 Amount of information provided on error while running the DDR
246 training code. At level 0, provides an error code in a case of
247 failure, RL, WL errors and other algorithm failure. At level 1,
248 provides the D-Unit setup (SPD/Static configuration). At level 2,
249 provides the windows margin as a results of DQS centeralization.
250 At level 3, rovides the windows margin of each DQ as a results of
251 DQS centeralization.
252
Marek Behúne8bd7582024-06-18 17:34:28 +0200[diff] [blame]253config DDR_IMMUTABLE_DEBUG_SETTINGS
254 bool "Immutable DDR debug level (always DEBUG_LEVEL_ERROR)"
255 depends on ARMADA_38X
256 help
257 Makes the DDR training code debug level settings immutable.
258 The debug level setting from board topology definition is ignored.
259 The debug level is always set to DEBUG_LEVEL_ERROR and register
260 dumps are disabled.
261 This can save around 10 KiB of space in SPL binary.
262
Marek Behún90555af2022-02-17 13:54:42 +0100[diff] [blame]263config DDR_RESET_ON_TRAINING_FAILURE
264 bool "Reset the board on DDR training failure instead of hanging"
265 depends on ARMADA_38X || ARMADA_XP
266 help
267 If DDR training fails in SPL, reset the board instead of hanging.
268 Some boards are known to fail DDR training occasionally and an
269 immediate reset may be preferable to waiting until the board is
270 reset by watchdog (if there even is one).
271
272 Note that if booting via UART and the DDR training fails, the
273 device will still hang - it doesn't make sense to reset the board
274 in such a case.
275
Tom Rini9a04d7d2022-02-25 11:19:46 -0500[diff] [blame]276config BOARD_ECC_SUPPORT
277 bool
278
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]279config SYS_BOARD
280 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]281 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]282 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]283 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]284 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]285 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]286 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]287 default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]288 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]289 default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]290 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh6aebc1a2023-02-09 14:00:03 -0800[diff] [blame]291 default "ds116" if TARGET_DS116
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]292 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]293 default "maxbcm" if TARGET_MAXBCM
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]294 default "n2350" if TARGET_N2350
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]295 default "theadorable" if TARGET_THEADORABLE
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]296 default "a38x" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]297 default "x530" if TARGET_X530
Chris Packham7325f1f2023-07-10 10:47:36 +1200[diff] [blame]298 default "x240" if TARGET_X240
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]299 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]300 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]301 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]302
303config SYS_CONFIG_NAME
304 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]305 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]306 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]307 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]308 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]309 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]310 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]311 default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]312 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh6aebc1a2023-02-09 14:00:03 -0800[diff] [blame]313 default "ds116" if TARGET_DS116
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]314 default "ds414" if TARGET_DS414
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]315 default "maxbcm" if TARGET_MAXBCM
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]316 default "n2350" if TARGET_N2350
Stefan Roese459e0642016-01-20 08:13:29 +0100[diff] [blame]317 default "theadorable" if TARGET_THEADORABLE
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]318 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]319 default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]320 default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]321 default "x530" if TARGET_X530
Chris Packham7325f1f2023-07-10 10:47:36 +1200[diff] [blame]322 default "x240" if TARGET_X240
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]323 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]324 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]325 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]326
327config SYS_VENDOR
328 default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin7f8dfea2017-02-16 13:52:22 +0200[diff] [blame]329 default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]330 default "Marvell" if TARGET_DB_88F6720
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]331 default "Marvell" if TARGET_DB_88F6820_GP
Chris Packhama90dd4c2016-09-22 12:56:14 +1200[diff] [blame]332 default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese5c806f12016-10-25 10:56:19 +0200[diff] [blame]333 default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin1d6ff1f2021-03-16 17:20:57 +0100[diff] [blame]334 default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham199e3182019-04-11 22:22:53 +1200[diff] [blame]335 default "Marvell" if TARGET_DB_XC3_24G4XG
336 default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]337 default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore77c39402018-06-11 19:39:53 -0500[diff] [blame]338 default "kobol" if TARGET_HELIOS4
Tony Dinh6aebc1a2023-02-09 14:00:03 -0800[diff] [blame]339 default "Synology" if TARGET_DS116
Phil Sutterd76eba62015-12-25 14:41:25 +0100[diff] [blame]340 default "Synology" if TARGET_DS414
Tony Dinh63eba132023-02-01 15:13:05 -0800[diff] [blame]341 default "thecus" if TARGET_N2350
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]342 default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behúnf835bed2018-04-24 17:21:31 +0200[diff] [blame]343 default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siachdaa6f082018-06-18 21:56:23 +0300[diff] [blame]344 default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packhamb55b2c92019-01-10 21:01:00 +1300[diff] [blame]345 default "alliedtelesis" if TARGET_X530
Chris Packham7325f1f2023-07-10 10:47:36 +1200[diff] [blame]346 default "alliedtelesis" if TARGET_X240
Luka Kovacic25acb8b2020-05-26 20:17:50 +0200[diff] [blame]347 default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham67b7d502022-11-05 17:24:00 +1300[diff] [blame]348 default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb9f41bf2015-12-21 13:40:37 +0100[diff] [blame]349
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]350config SYS_SOC
351 default "mvebu"
352
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]353choice
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]354 prompt "Boot method"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]355 depends on SPL
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]356
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]357config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár8d110322023-01-10 23:13:01 +0100[diff] [blame]358 bool "NOR flash (SPI or parallel)"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]359 imply ENV_IS_IN_SPI_FLASH
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]360 imply SPL_DM_SPI
361 imply SPL_SPI_FLASH_SUPPORT
362 imply SPL_SPI_LOAD
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]363 imply SPL_SPI
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]364 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]365
Pali Rohár5c5cf602023-01-10 22:55:21 +0100[diff] [blame]366config MVEBU_SPL_BOOT_DEVICE_NAND
367 bool "NAND flash (SPI or parallel)"
368 select MTD_RAW_NAND
369 select SPL_BOOTROM_SUPPORT
370
Baruch Siach8d196a42018-06-18 21:56:24 +0300[diff] [blame]371config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár8d110322023-01-10 23:13:01 +0100[diff] [blame]372 bool "eMMC or SD card"
Joel Johnsona2018ab2020-04-17 01:19:05 -0600[diff] [blame]373 imply ENV_IS_IN_MMC
374 # GPIO needed for eMMC/SD card presence detection
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]375 imply SPL_DM_GPIO
376 imply SPL_DM_MMC
377 imply SPL_GPIO
378 imply SPL_LIBDISK_SUPPORT
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]379 imply SPL_MMC
Pali Rohárcefdc032023-01-08 13:31:41 +0100[diff] [blame]380 select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Roháraa6244e2023-01-09 00:52:09 +0100[diff] [blame]381 select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]382 select SPL_BOOTROM_SUPPORT
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]383
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]384config MVEBU_SPL_BOOT_DEVICE_SATA
385 bool "SATA"
Simon Glass081a45a2021-08-08 12:20:17 -0600[diff] [blame]386 imply SPL_SATA
Pali Rohárcf97b822021-07-23 11:14:29 +0200[diff] [blame]387 imply SPL_LIBDISK_SUPPORT
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]388 select SPL_BOOTROM_SUPPORT
Baruch Siachb936a272019-05-16 13:03:58 +0300[diff] [blame]389
Pali Rohárea876902023-01-10 23:09:15 +0100[diff] [blame]390config MVEBU_SPL_BOOT_DEVICE_PEX
391 bool "PCI Express"
392 select SPL_BOOTROM_SUPPORT
393
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]394config MVEBU_SPL_BOOT_DEVICE_UART
395 bool "UART"
Pali Rohára3a38e52021-07-23 11:14:25 +0200[diff] [blame]396 select SPL_BOOTROM_SUPPORT
Baruch Siachb35c4472018-06-18 21:56:26 +0300[diff] [blame]397
Marek Behún09e16b82017-06-09 19:28:45 +0200[diff] [blame]398endchoice
399
Pali Rohár5c5cf602023-01-10 22:55:21 +0100[diff] [blame]400config MVEBU_SPL_NAND_BADBLK_LOCATION
401 hex "NAND Bad block indicator location"
402 depends on MVEBU_SPL_BOOT_DEVICE_NAND
403 range 0x0 0x1
404 help
405 Value 0x0 = SLC flash = BBI at page 0 or page 1
406 Value 0x1 = MLC flash = BBI at last page in the block
407
Pali Rohár7085f822023-03-29 21:25:58 +0200[diff] [blame]408config MVEBU_SPL_SATA_BLKSZ
409 int "SATA block size"
410 depends on MVEBU_SPL_BOOT_DEVICE_SATA
411 range 512 32768
412 default 512
413 help
414 Block size of the SATA disk in bytes.
415 Typically 512 bytes for majority of disks
416 and 4096 bytes for 4K Native disks.
417
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]418config MVEBU_EFUSE
419 bool "Enable eFuse support"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]420 depends on HAVE_MVEBU_EFUSE
421 help
422 Enable support for reading and writing eFuses on mvebu SoCs.
423
424config MVEBU_EFUSE_FAKE
425 bool "Fake eFuse access (dry run)"
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]426 depends on MVEBU_EFUSE
427 help
428 This enables a "dry run" mode where eFuses are not really programmed.
429 Instead the eFuse accesses are emulated by writing to and reading
430 from a memory block.
431 This is can be used for testing prog scripts.
432
Pali Rohár2662d2c2022-09-22 13:43:45 +0200[diff] [blame]433config MVEBU_EFUSE_VHV_GPIO
434 string "VHV_Enable GPIO name for eFuse programming"
435 depends on MVEBU_EFUSE && !ARMADA_3700
436 help
437 The eFuse programing (burning) phase requires supplying 1.8V to the
438 device on the VHV power pin, while for normal operation the VHV power
439 rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
440 document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
441 .
442 This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
443
444config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
445 bool "VHV_Enable GPIO is Active Low"
446 depends on MVEBU_EFUSE_VHV_GPIO != ""
447
Mario Six10d14492017-01-11 16:01:00 +0100[diff] [blame]448config SECURED_MODE_IMAGE
449 bool "Build image for trusted boot"
450 default false
451 depends on 88F6820
452 help
453 Build an image that employs the ARMADA SoC's trusted boot framework
454 for securely booting images.
455
456config SECURED_MODE_CSK_INDEX
457 int "Index of active CSK"
458 default 0
459 depends on SECURED_MODE_IMAGE
460
Tony Dinh89dc46d2023-03-02 19:27:29 -0800[diff] [blame]461config SF_DEFAULT_SPEED
462 int "Default speed for SPI flash in Hz"
463 default 10000000
464 depends on MVEBU_SPL_BOOT_DEVICE_SPI
465
466config SF_DEFAULT_MODE
467 hex "Default mode for SPI flash"
468 default 0x0
469 depends on MVEBU_SPL_BOOT_DEVICE_SPI
470
Marek Behún514628c2024-04-04 09:51:00 +0200[diff] [blame]471config ARMADA_32BIT_SYSCON
472 bool
473 depends on ARMADA_32BIT
474 select REGMAP
475 select SYSCON
476
Marek Behún1c657bc2024-04-04 09:50:58 +0200[diff] [blame]477config ARMADA_32BIT_SYSCON_RESET
478 bool "Support Armada XP/375/38x/39x reset controller"
479 depends on ARMADA_32BIT
480 depends on DM_RESET
Marek Behún514628c2024-04-04 09:51:00 +0200[diff] [blame]481 select ARMADA_32BIT_SYSCON
Marek Behún1c657bc2024-04-04 09:50:58 +0200[diff] [blame]482 help
483 Build support for Armada XP/375/38x/39x reset controller. This is
484 needed for PCIe support.
485
Marek Behún514628c2024-04-04 09:51:00 +0200[diff] [blame]486config ARMADA_32BIT_SYSCON_SYSRESET
487 bool "Support Armada XP/375/38x/39x sysreset via driver model"
488 depends on ARMADA_32BIT
489 depends on SYSRESET
490 select ARMADA_32BIT_SYSCON
491 help
492 Build support for Armada XP/375/38x/39x system reset via driver model.
493
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]494source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore838e49b2020-12-08 21:07:36 -0600[diff] [blame]495source "board/kobol/helios4/Kconfig"
Joel Johnson28bf4ca2020-03-23 14:21:32 -0600[diff] [blame]496
Stefan Roese383e0c12015-08-25 13:18:38 +0200[diff] [blame]497endif