blob: 7e3136910282835df7a897005934537000e542ce [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassc45e3592013-03-11 06:49:53 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
Simon Glassc45e3592013-03-11 06:49:53 +000010 */
11
12#include <common.h>
Simon Glassa815dab2018-11-15 18:43:52 -070013#include <bloblist.h>
Simon Glass1ea97892020-05-10 11:40:00 -060014#include <bootstage.h>
Simon Glass85d65312019-12-28 10:44:58 -070015#include <clock_legacy.h>
Simon Glassa73bda42015-11-08 23:47:45 -070016#include <console.h>
Mario Six97bbb602018-08-06 10:23:41 +020017#include <cpu.h>
Simon Glass1fa70f82019-11-14 12:57:34 -070018#include <cpu_func.h>
Stefan Roese7513df32022-09-02 13:57:50 +020019#include <cyclic.h>
Simon Glass1ab16922022-07-31 12:28:48 -060020#include <display_options.h>
Simon Glassa730c5d2014-07-23 06:55:04 -060021#include <dm.h>
Simon Glass79fd2142019-08-01 09:46:43 -060022#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060023#include <env_internal.h>
Simon Glass4f542532022-03-04 08:43:02 -070024#include <event.h>
Simon Glassc45e3592013-03-11 06:49:53 +000025#include <fdtdec.h>
Simon Glass15393432013-04-20 08:42:41 +000026#include <fs.h>
Simon Glassf11478f2019-12-28 10:45:07 -070027#include <hang.h>
Simon Glass50250b52013-03-11 14:30:42 +000028#include <i2c.h>
Simon Glass6980b6b2019-11-14 12:57:45 -070029#include <init.h>
Simon Glassc45e3592013-03-11 06:49:53 +000030#include <initcall.h>
Simon Glass0f2af882020-05-10 11:40:05 -060031#include <log.h>
Simon Glassd1d087d2015-02-27 22:06:36 -070032#include <malloc.h>
Joe Hershberger65b905b2015-03-22 17:08:59 -050033#include <mapmem.h>
Simon Glass62cf9122013-04-26 02:53:43 +000034#include <os.h>
Simon Glassc45e3592013-03-11 06:49:53 +000035#include <post.h>
Simon Glass6ab91072017-03-31 08:40:38 -060036#include <relocate.h>
Simon Glass36736182019-11-14 12:57:24 -070037#include <serial.h>
Simon Glasse14f1a22018-11-15 18:44:09 -070038#include <spl.h>
Jeroen Hofsteea802b982014-06-23 23:20:19 +020039#include <status_led.h>
Mario Six4481a5d2018-08-06 10:23:34 +020040#include <sysreset.h>
Simon Glass8e4f80f2016-02-24 09:14:50 -070041#include <timer.h>
Simon Glass209a1a62013-06-11 11:14:42 -070042#include <trace.h>
Simon Glassfce58f52016-01-18 19:52:21 -070043#include <video.h>
Simon Glass50250b52013-03-11 14:30:42 +000044#include <watchdog.h>
Simon Glass274e0b02020-05-10 11:39:56 -060045#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060046#include <asm/global_data.h>
Simon Glassc45e3592013-03-11 06:49:53 +000047#include <asm/io.h>
48#include <asm/sections.h>
Simon Glassa730c5d2014-07-23 06:55:04 -060049#include <dm/root.h>
Simon Glassb3c12562017-03-31 08:40:35 -060050#include <linux/errno.h>
Pali Rohár8dc23ef2022-09-18 13:23:27 +020051#include <linux/log2.h>
Simon Glassc45e3592013-03-11 06:49:53 +000052
Simon Glassc45e3592013-03-11 06:49:53 +000053DECLARE_GLOBAL_DATA_PTR;
Simon Glassc45e3592013-03-11 06:49:53 +000054
55/*
Simon Glass839855c2015-04-28 20:25:03 -060056 * TODO(sjg@chromium.org): IMO this code should be
Simon Glassc45e3592013-03-11 06:49:53 +000057 * refactored to a single function, something like:
58 *
59 * void led_set_state(enum led_colour_t colour, int on);
60 */
61/************************************************************************
62 * Coloured LED functionality
63 ************************************************************************
64 * May be supplied by boards if desired
65 */
Jeroen Hofsteea802b982014-06-23 23:20:19 +020066__weak void coloured_LED_init(void) {}
67__weak void red_led_on(void) {}
68__weak void red_led_off(void) {}
69__weak void green_led_on(void) {}
70__weak void green_led_off(void) {}
71__weak void yellow_led_on(void) {}
72__weak void yellow_led_off(void) {}
73__weak void blue_led_on(void) {}
74__weak void blue_led_off(void) {}
Simon Glassc45e3592013-03-11 06:49:53 +000075
76/*
77 * Why is gd allocated a register? Prior to reloc it might be better to
78 * just pass it around to each function in this file?
79 *
80 * After reloc one could argue that it is hardly used and doesn't need
81 * to be in a register. Or if it is it should perhaps hold pointers to all
82 * global data for all modules, so that post-reloc we can avoid the massive
83 * literal pool we get on ARM. Or perhaps just encourage each module to use
84 * a structure...
85 */
86
Sonic Zhangf503a522014-07-17 19:01:34 +080087#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glass50250b52013-03-11 14:30:42 +000088static int init_func_watchdog_init(void)
89{
Tom Rini210ebce2017-03-14 11:08:10 -040090# if defined(CONFIG_HW_WATCHDOG) && \
91 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Prasanthi Chellakumar0509c4e2018-10-09 11:46:40 -070092 defined(CONFIG_SH) || \
Anatolij Gustschin87db2942016-06-13 14:24:23 +020093 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roeseee86af22015-03-10 08:04:36 +010094 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangf503a522014-07-17 19:01:34 +080095 hw_watchdog_init();
Simon Glass50250b52013-03-11 14:30:42 +000096 puts(" Watchdog enabled\n");
Anatolij Gustschind3aa98a2016-06-13 14:24:24 +020097# endif
Stefan Roese80877fa2022-09-02 14:10:46 +020098 schedule();
Simon Glass50250b52013-03-11 14:30:42 +000099
100 return 0;
101}
102
103int init_func_watchdog_reset(void)
104{
Stefan Roese80877fa2022-09-02 14:10:46 +0200105 schedule();
Simon Glass50250b52013-03-11 14:30:42 +0000106
107 return 0;
108}
109#endif /* CONFIG_WATCHDOG */
110
Jeroen Hofstee45846052014-10-08 22:57:22 +0200111__weak void board_add_ram_info(int use_default)
Simon Glass50250b52013-03-11 14:30:42 +0000112{
113 /* please define platform specific board_add_ram_info() */
114}
115
Simon Glassc45e3592013-03-11 06:49:53 +0000116static int init_baud_rate(void)
117{
Simon Glass22c34c22017-08-03 12:22:13 -0600118 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
Simon Glassc45e3592013-03-11 06:49:53 +0000119 return 0;
120}
121
122static int display_text_info(void)
123{
Ben Stoltz1930e8d2015-07-31 09:31:37 -0600124#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100125 ulong bss_start, bss_end, text_base;
Simon Glassc45e3592013-03-11 06:49:53 +0000126
Shiji Yangeff11fa2023-08-03 09:47:17 +0800127 bss_start = (ulong)__bss_start;
128 bss_end = (ulong)__bss_end;
Albert ARIBAUD6e294722014-02-22 17:53:43 +0100129
Simon Glass72cc5382022-10-20 18:22:39 -0600130#ifdef CONFIG_TEXT_BASE
131 text_base = CONFIG_TEXT_BASE;
Sonic Zhangf503a522014-07-17 19:01:34 +0800132#else
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100133 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangf503a522014-07-17 19:01:34 +0800134#endif
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100135
136 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100137 text_base, bss_start, bss_end);
Simon Glass62cf9122013-04-26 02:53:43 +0000138#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000139
Simon Glassc45e3592013-03-11 06:49:53 +0000140 return 0;
141}
142
Mario Six4481a5d2018-08-06 10:23:34 +0200143#ifdef CONFIG_SYSRESET
144static int print_resetinfo(void)
145{
146 struct udevice *dev;
147 char status[256];
Michal Suchanek32c58c12022-10-10 20:29:40 +0200148 bool status_printed = false;
Mario Six4481a5d2018-08-06 10:23:34 +0200149 int ret;
150
Bin Meng50a132b2023-07-22 00:15:21 +0800151 /*
152 * Not all boards have sysreset drivers available during early
Michal Suchanek32c58c12022-10-10 20:29:40 +0200153 * boot, so don't fail if one can't be found.
154 */
155 for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev;
Bin Meng50a132b2023-07-22 00:15:21 +0800156 ret = uclass_next_device_check(&dev)) {
Michal Suchanek32c58c12022-10-10 20:29:40 +0200157 if (ret) {
158 debug("%s: %s sysreset device (error: %d)\n",
159 __func__, dev->name, ret);
160 continue;
161 }
Mario Six4481a5d2018-08-06 10:23:34 +0200162
Michal Suchanek32c58c12022-10-10 20:29:40 +0200163 if (!sysreset_get_status(dev, status, sizeof(status))) {
164 printf("%s%s", status_printed ? " " : "", status);
165 status_printed = true;
166 }
167 }
168 if (status_printed)
169 printf("\n");
Mario Six4481a5d2018-08-06 10:23:34 +0200170
171 return 0;
172}
173#endif
174
Mario Six97bbb602018-08-06 10:23:41 +0200175#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
176static int print_cpuinfo(void)
177{
178 struct udevice *dev;
179 char desc[512];
180 int ret;
181
Ye Li28abafd2020-05-03 21:58:50 +0800182 dev = cpu_get_current_dev();
183 if (!dev) {
184 debug("%s: Could not get CPU device\n",
185 __func__);
186 return -ENODEV;
Mario Six97bbb602018-08-06 10:23:41 +0200187 }
188
189 ret = cpu_get_desc(dev, desc, sizeof(desc));
190 if (ret) {
191 debug("%s: Could not get CPU description (err = %d)\n",
192 dev->name, ret);
193 return ret;
194 }
195
Bin Mengbe2269f2018-10-10 22:06:55 -0700196 printf("CPU: %s\n", desc);
Mario Six97bbb602018-08-06 10:23:41 +0200197
198 return 0;
199}
200#endif
201
Simon Glassc45e3592013-03-11 06:49:53 +0000202static int announce_dram_init(void)
203{
204 puts("DRAM: ");
205 return 0;
206}
207
Pali Rohár8dc23ef2022-09-18 13:23:27 +0200208/*
209 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
210 * and value in calculated unit scale multiplied by 10 (as fractional fixed
211 * point number with one decimal digit), which is human natural format,
212 * same what uses print_size() function for displaying. Mathematically it is:
213 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
214 *
215 * For example for size=87654321 we calculate scale=20 and val=836 which means
216 * that input has natural human format 83.6 M (mega = 2^20).
217 */
218#define compute_size_scale_val(size, scale, val) do { \
219 scale = ilog2(size) / 10 * 10; \
220 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
221 if (val == 10240) { val = 10; scale += 10; } \
222} while (0)
223
224/*
225 * Check if the sizes in their natural units written in decimal format with
226 * one fraction number are same.
227 */
228static int sizes_near(unsigned long long size1, unsigned long long size2)
229{
230 unsigned int size1_scale, size1_val, size2_scale, size2_val;
231
232 compute_size_scale_val(size1, size1_scale, size1_val);
233 compute_size_scale_val(size2, size2_scale, size2_val);
234
235 return size1_scale == size2_scale && size1_val == size2_val;
236}
237
Simon Glassc45e3592013-03-11 06:49:53 +0000238static int show_dram_config(void)
239{
York Sun60ac15a2014-05-02 17:28:05 -0700240 unsigned long long size;
Simon Glassc45e3592013-03-11 06:49:53 +0000241 int i;
242
243 debug("\nRAM Configuration:\n");
244 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
245 size += gd->bd->bi_dram[i].size;
Bin Mengc8964482015-08-06 01:31:20 -0700246 debug("Bank #%d: %llx ", i,
247 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glassc45e3592013-03-11 06:49:53 +0000248#ifdef DEBUG
249 print_size(gd->bd->bi_dram[i].size, "\n");
250#endif
251 }
252 debug("\nDRAM: ");
Simon Glassc45e3592013-03-11 06:49:53 +0000253
Pali Rohár8dc23ef2022-09-18 13:23:27 +0200254 print_size(gd->ram_size, "");
255 if (!sizes_near(gd->ram_size, size)) {
256 printf(" (effective ");
257 print_size(size, ")");
258 }
Simon Glass50250b52013-03-11 14:30:42 +0000259 board_add_ram_info(0);
260 putc('\n');
Simon Glassc45e3592013-03-11 06:49:53 +0000261
262 return 0;
263}
264
Simon Glass2f949c32017-03-31 08:40:32 -0600265__weak int dram_init_banksize(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000266{
Stefan Roese90cda992020-08-12 13:02:39 +0200267 gd->bd->bi_dram[0].start = gd->ram_base;
Simon Glassc45e3592013-03-11 06:49:53 +0000268 gd->bd->bi_dram[0].size = get_effective_memsize();
Simon Glass2f949c32017-03-31 08:40:32 -0600269
270 return 0;
Simon Glassc45e3592013-03-11 06:49:53 +0000271}
272
Tom Rini52b2e262021-08-18 23:12:24 -0400273#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glass50250b52013-03-11 14:30:42 +0000274static int init_func_i2c(void)
275{
276 puts("I2C: ");
trema6612902013-09-21 18:13:34 +0200277 i2c_init_all();
Simon Glass50250b52013-03-11 14:30:42 +0000278 puts("ready\n");
279 return 0;
280}
281#endif
282
Simon Glassc45e3592013-03-11 06:49:53 +0000283static int setup_mon_len(void)
284{
Michal Simek65e915c2014-05-08 16:08:44 +0200285#if defined(__ARM__) || defined(__MICROBLAZE__)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800286 gd->mon_len = (ulong)__bss_end - (ulong)_start;
Simon Glass7e9f5882023-01-15 14:15:40 -0700287#elif defined(CONFIG_SANDBOX) && !defined(__riscv)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800288 gd->mon_len = (ulong)_end - (ulong)_init;
Heinrich Schuchardte7301bb2021-05-19 12:02:39 +0200289#elif defined(CONFIG_SANDBOX)
Simon Glass7e9f5882023-01-15 14:15:40 -0700290 /* gcc does not provide _init in crti.o on RISC-V */
Heinrich Schuchardte7301bb2021-05-19 12:02:39 +0200291 gd->mon_len = 0;
292#elif defined(CONFIG_EFI_APP)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800293 gd->mon_len = (ulong)_end - (ulong)_init;
Tom Rini210ebce2017-03-14 11:08:10 -0400294#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangf503a522014-07-17 19:01:34 +0800295 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Tom Rini53320122022-04-06 09:21:25 -0400296#elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800297 gd->mon_len = (ulong)(__bss_end) - (ulong)(_start);
Simon Glass90632bd2016-05-14 18:49:28 -0600298#elif defined(CONFIG_SYS_MONITOR_BASE)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800299 /* TODO: use (ulong)__bss_end - (ulong)__text_start; ? */
300 gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass9c9f44a2013-03-11 07:06:48 +0000301#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000302 return 0;
303}
304
Simon Glasse14f1a22018-11-15 18:44:09 -0700305static int setup_spl_handoff(void)
306{
307#if CONFIG_IS_ENABLED(HANDOFF)
Simon Glass90c1a582022-01-12 19:26:17 -0700308 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
Simon Glasse14f1a22018-11-15 18:44:09 -0700309 sizeof(struct spl_handoff));
310 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
311#endif
312
313 return 0;
314}
315
Simon Glassc45e3592013-03-11 06:49:53 +0000316__weak int arch_cpu_init(void)
317{
318 return 0;
319}
320
Paul Burton1f508dd2016-09-21 11:18:46 +0100321__weak int mach_cpu_init(void)
322{
323 return 0;
324}
325
Simon Glassc45e3592013-03-11 06:49:53 +0000326/* Get the top of usable RAM */
Heinrich Schuchardt51a9aac2023-08-12 20:16:58 +0200327__weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
Simon Glassc45e3592013-03-11 06:49:53 +0000328{
Tom Rinibb4dd962022-11-16 13:10:37 -0500329#if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700330 /*
Simon Glass839855c2015-04-28 20:25:03 -0600331 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700332 * 32-bit address space. If so, clip the usable RAM so it doesn't.
333 */
Tom Rinibb4dd962022-11-16 13:10:37 -0500334 if (gd->ram_top < CFG_SYS_SDRAM_BASE)
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700335 /*
336 * Will wrap back to top of 32-bit space when reservations
337 * are made.
338 */
339 return 0;
340#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000341 return gd->ram_top;
342}
343
Ovidiu Panaitbbce5f32022-09-13 21:31:28 +0300344__weak int arch_setup_dest_addr(void)
345{
346 return 0;
347}
348
Simon Glassc45e3592013-03-11 06:49:53 +0000349static int setup_dest_addr(void)
350{
351 debug("Monitor len: %08lX\n", gd->mon_len);
352 /*
353 * Ram is setup, size stored in gd !!
354 */
Pali Rohárad37d422022-09-09 17:32:41 +0200355 debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
Tom Rini5c1e7272022-04-06 10:33:32 -0400356#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
Simon Glassc45e3592013-03-11 06:49:53 +0000357 /*
358 * Subtract specified amount of memory to hide so that it won't
359 * get "touched" at all by U-Boot. By fixing up gd->ram_size
360 * the Linux kernel should now get passed the now "corrected"
York Sun4de24ef2017-03-06 09:02:28 -0800361 * memory size and won't touch it either. This should work
362 * for arch/ppc and arch/powerpc. Only Linux board ports in
363 * arch/powerpc with bootwrapper support, that recalculate the
364 * memory size from the SDRAM controller setup will have to
365 * get fixed.
Simon Glassc45e3592013-03-11 06:49:53 +0000366 */
York Sun4de24ef2017-03-06 09:02:28 -0800367 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
368#endif
Tom Rinibb4dd962022-11-16 13:10:37 -0500369#ifdef CFG_SYS_SDRAM_BASE
370 gd->ram_base = CFG_SYS_SDRAM_BASE;
Simon Glassc45e3592013-03-11 06:49:53 +0000371#endif
Siva Durga Prasad Paladugu94a1d522018-07-16 15:56:10 +0530372 gd->ram_top = gd->ram_base + get_effective_memsize();
Simon Glassc45e3592013-03-11 06:49:53 +0000373 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadad1589242013-05-27 00:37:30 +0000374 gd->relocaddr = gd->ram_top;
Pali Rohárad37d422022-09-09 17:32:41 +0200375 debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
Ovidiu Panaitbbce5f32022-09-13 21:31:28 +0300376
377 return arch_setup_dest_addr();
Simon Glassc45e3592013-03-11 06:49:53 +0000378}
379
Tom Rini0bb9b092022-12-04 10:13:37 -0500380#ifdef CFG_PRAM
Simon Glassc45e3592013-03-11 06:49:53 +0000381/* reserve protected RAM */
382static int reserve_pram(void)
383{
384 ulong reg;
385
Tom Rini0bb9b092022-12-04 10:13:37 -0500386 reg = env_get_ulong("pram", 10, CFG_PRAM);
Masahiro Yamadad1589242013-05-27 00:37:30 +0000387 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glassc45e3592013-03-11 06:49:53 +0000388 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadad1589242013-05-27 00:37:30 +0000389 gd->relocaddr);
Simon Glassc45e3592013-03-11 06:49:53 +0000390 return 0;
391}
Tom Rini0bb9b092022-12-04 10:13:37 -0500392#endif /* CFG_PRAM */
Simon Glassc45e3592013-03-11 06:49:53 +0000393
394/* Round memory pointer down to next 4 kB limit */
395static int reserve_round_4k(void)
396{
Masahiro Yamadad1589242013-05-27 00:37:30 +0000397 gd->relocaddr &= ~(4096 - 1);
Simon Glassc45e3592013-03-11 06:49:53 +0000398 return 0;
399}
400
Ovidiu Panait2a2941b2020-03-29 20:57:41 +0300401__weak int arch_reserve_mmu(void)
402{
403 return 0;
404}
405
Devarsh Thakkar46245d42023-12-05 21:25:19 +0530406static int reserve_video_from_videoblob(void)
Simon Glassfce58f52016-01-18 19:52:21 -0700407{
Simon Glass896409c2023-07-30 11:16:05 -0600408 if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && spl_phase() > PHASE_SPL) {
Nikhil M Jainf7ec5312023-07-18 14:27:31 +0530409 struct video_handoff *ho;
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530410 int ret = 0;
Nikhil M Jainf7ec5312023-07-18 14:27:31 +0530411
412 ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
413 if (!ho)
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530414 return log_msg_ret("Missing video bloblist", -ENOENT);
415
416 ret = video_reserve_from_bloblist(ho);
417 if (ret)
418 return log_msg_ret("Invalid Video handoff info", ret);
Devarsh Thakkar46245d42023-12-05 21:25:19 +0530419
420 /* Sanity check fb from blob is before current relocaddr */
421 if (likely(gd->relocaddr > (unsigned long)ho->fb))
422 gd->relocaddr = ho->fb;
423 }
424
425 return 0;
426}
427
428/*
429 * Check if any bloblist received specifying reserved areas from previous stage and adjust
430 * gd->relocaddr accordingly, so that we start reserving after pre-reserved areas
431 * from previous stage.
432 *
433 * NOTE:
434 * IT is recommended that all bloblists from previous stage are reserved from ram_top
435 * as next stage will simply start reserving further regions after them.
436 */
437static int setup_relocaddr_from_bloblist(void)
438{
439 reserve_video_from_videoblob();
440
441 return 0;
442}
443
444static int reserve_video(void)
445{
446 if (CONFIG_IS_ENABLED(VIDEO)) {
Simon Glassb24a7d92022-10-16 15:57:41 -0600447 ulong addr;
448 int ret;
Simon Glassfce58f52016-01-18 19:52:21 -0700449
Simon Glassb24a7d92022-10-16 15:57:41 -0600450 addr = gd->relocaddr;
451 ret = video_reserve(&addr);
452 if (ret)
453 return ret;
454 debug("Reserving %luk for video at: %08lx\n",
455 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
456 gd->relocaddr = addr;
457 }
Simon Glass50250b52013-03-11 14:30:42 +0000458
459 return 0;
460}
Simon Glass50250b52013-03-11 14:30:42 +0000461
Simon Glass1008da02016-01-18 19:52:20 -0700462static int reserve_trace(void)
463{
464#ifdef CONFIG_TRACE
465 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
466 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
Heinrich Schuchardtc960b142019-06-14 21:52:22 +0200467 debug("Reserving %luk for trace data at: %08lx\n",
468 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
Simon Glass1008da02016-01-18 19:52:20 -0700469#endif
470
471 return 0;
472}
473
Simon Glassc45e3592013-03-11 06:49:53 +0000474static int reserve_uboot(void)
475{
Alexey Brodkinc76af2a2018-05-25 16:08:14 +0300476 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
477 /*
478 * reserve memory for U-Boot code, data & bss
479 * round down to next 4 kB limit
480 */
481 gd->relocaddr -= gd->mon_len;
482 gd->relocaddr &= ~(4096 - 1);
483 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
484 /* round down to next 64 kB limit so that IVPR stays aligned */
485 gd->relocaddr &= ~(65536 - 1);
486 #endif
Simon Glassc45e3592013-03-11 06:49:53 +0000487
Alexey Brodkinc76af2a2018-05-25 16:08:14 +0300488 debug("Reserving %ldk for U-Boot at: %08lx\n",
489 gd->mon_len >> 10, gd->relocaddr);
490 }
Masahiro Yamadad1589242013-05-27 00:37:30 +0000491
492 gd->start_addr_sp = gd->relocaddr;
493
Simon Glassc45e3592013-03-11 06:49:53 +0000494 return 0;
495}
496
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100497/*
498 * reserve after start_addr_sp the requested size and make the stack pointer
499 * 16-byte aligned, this alignment is needed for cast on the reserved memory
500 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
501 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
502 */
503static unsigned long reserve_stack_aligned(size_t size)
504{
505 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
506}
507
Vikas Manocha4d49e102019-08-16 09:57:44 -0700508#ifdef CONFIG_SYS_NONCACHED_MEMORY
509static int reserve_noncached(void)
510{
Stephen Warren9b496432019-08-27 11:54:31 -0600511 /*
512 * The value of gd->start_addr_sp must match the value of malloc_start
Tom Rinif38167d2022-10-28 20:27:09 -0400513 * calculated in board_r.c:initr_malloc(), which is passed to
514 * dlmalloc.c:mem_malloc_init() and then used by
Stephen Warren9b496432019-08-27 11:54:31 -0600515 * cache.c:noncached_init()
516 *
517 * These calculations must match the code in cache.c:noncached_init()
518 */
519 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
520 MMU_SECTION_SIZE;
521 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
522 MMU_SECTION_SIZE);
Vikas Manocha4d49e102019-08-16 09:57:44 -0700523 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
524 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
525
526 return 0;
527}
528#endif
529
Simon Glassc45e3592013-03-11 06:49:53 +0000530/* reserve memory for malloc() area */
531static int reserve_malloc(void)
532{
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100533 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
Simon Glassc45e3592013-03-11 06:49:53 +0000534 debug("Reserving %dk for malloc() at: %08lx\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100535 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Vikas Manocha4d49e102019-08-16 09:57:44 -0700536#ifdef CONFIG_SYS_NONCACHED_MEMORY
537 reserve_noncached();
538#endif
539
Simon Glassc45e3592013-03-11 06:49:53 +0000540 return 0;
541}
542
543/* (permanently) allocate a Board Info struct */
544static int reserve_board(void)
545{
Sonic Zhangf503a522014-07-17 19:01:34 +0800546 if (!gd->bd) {
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900547 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
548 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
549 sizeof(struct bd_info));
550 memset(gd->bd, '\0', sizeof(struct bd_info));
Sonic Zhangf503a522014-07-17 19:01:34 +0800551 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900552 sizeof(struct bd_info), gd->start_addr_sp);
Sonic Zhangf503a522014-07-17 19:01:34 +0800553 }
Simon Glassc45e3592013-03-11 06:49:53 +0000554 return 0;
555}
556
Simon Glassc45e3592013-03-11 06:49:53 +0000557static int reserve_global_data(void)
558{
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100559 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
Masahiro Yamadad1589242013-05-27 00:37:30 +0000560 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glassc45e3592013-03-11 06:49:53 +0000561 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100562 sizeof(gd_t), gd->start_addr_sp);
Simon Glassc45e3592013-03-11 06:49:53 +0000563 return 0;
564}
565
566static int reserve_fdt(void)
567{
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200568 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
569 /*
570 * If the device tree is sitting immediately above our image
571 * then we must relocate it. If it is embedded in the data
572 * section, then it will be relocated with other data.
573 */
574 if (gd->fdt_blob) {
575 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob), 32);
Simon Glassc45e3592013-03-11 06:49:53 +0000576
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200577 gd->start_addr_sp = reserve_stack_aligned(gd->fdt_size);
578 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
579 debug("Reserving %lu Bytes for FDT at: %08lx\n",
580 gd->fdt_size, gd->start_addr_sp);
581 }
Simon Glassc45e3592013-03-11 06:49:53 +0000582 }
583
584 return 0;
585}
586
Simon Glassb9aff922017-05-22 05:05:30 -0600587static int reserve_bootstage(void)
588{
589#ifdef CONFIG_BOOTSTAGE
590 int size = bootstage_get_size();
591
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100592 gd->start_addr_sp = reserve_stack_aligned(size);
Simon Glassb9aff922017-05-22 05:05:30 -0600593 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
594 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
595 gd->start_addr_sp);
596#endif
597
598 return 0;
599}
600
Patrick Delaunaya0a2b212018-03-13 13:57:00 +0100601__weak int arch_reserve_stacks(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000602{
Andreas Bießmann25429862015-02-06 23:06:45 +0100603 return 0;
604}
Simon Glass4d2aee82013-03-05 14:39:45 +0000605
Andreas Bießmann25429862015-02-06 23:06:45 +0100606static int reserve_stacks(void)
607{
608 /* make stack pointer 16-byte aligned */
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100609 gd->start_addr_sp = reserve_stack_aligned(16);
Simon Glassc45e3592013-03-11 06:49:53 +0000610
611 /*
Simon Glass839855c2015-04-28 20:25:03 -0600612 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann25429862015-02-06 23:06:45 +0100613 * gd->irq_sp
Simon Glassc45e3592013-03-11 06:49:53 +0000614 */
Andreas Bießmann25429862015-02-06 23:06:45 +0100615 return arch_reserve_stacks();
Simon Glassc45e3592013-03-11 06:49:53 +0000616}
617
Simon Glassa815dab2018-11-15 18:43:52 -0700618static int reserve_bloblist(void)
619{
620#ifdef CONFIG_BLOBLIST
Simon Glass9e945052020-09-27 18:46:18 -0600621 /* Align to a 4KB boundary for easier reading of addresses */
Simon Glassab7e7462021-01-13 20:29:43 -0700622 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp -
623 CONFIG_BLOBLIST_SIZE_RELOC, 0x1000);
624 gd->new_bloblist = map_sysmem(gd->start_addr_sp,
625 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassa815dab2018-11-15 18:43:52 -0700626#endif
627
628 return 0;
629}
630
Simon Glassc45e3592013-03-11 06:49:53 +0000631static int display_new_sp(void)
632{
Masahiro Yamadad1589242013-05-27 00:37:30 +0000633 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glassc45e3592013-03-11 06:49:53 +0000634
635 return 0;
636}
637
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300638__weak int arch_setup_bdinfo(void)
Ovidiu Panait0c5e9a02020-07-24 14:12:14 +0300639{
640 return 0;
641}
642
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300643int setup_bdinfo(void)
644{
Ovidiu Panaita5855882020-07-24 14:12:16 +0300645 struct bd_info *bd = gd->bd;
646
Ovidiu Panait5fc60602020-07-24 14:12:17 +0300647 if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
648 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
649 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
650 }
651
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300652 return arch_setup_bdinfo();
653}
654
Simon Glassc45e3592013-03-11 06:49:53 +0000655#ifdef CONFIG_POST
656static int init_post(void)
657{
658 post_bootmode_init();
659 post_run(NULL, POST_ROM | post_bootmode_get(0));
660
661 return 0;
662}
663#endif
664
Simon Glassc45e3592013-03-11 06:49:53 +0000665static int reloc_fdt(void)
666{
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200667 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200668 if (gd->new_fdt) {
669 memcpy(gd->new_fdt, gd->fdt_blob,
670 fdt_totalsize(gd->fdt_blob));
671 gd->fdt_blob = gd->new_fdt;
672 }
Simon Glassc45e3592013-03-11 06:49:53 +0000673 }
674
675 return 0;
676}
677
Simon Glassb9aff922017-05-22 05:05:30 -0600678static int reloc_bootstage(void)
679{
680#ifdef CONFIG_BOOTSTAGE
681 if (gd->flags & GD_FLG_SKIP_RELOC)
682 return 0;
683 if (gd->new_bootstage) {
684 int size = bootstage_get_size();
685
686 debug("Copying bootstage from %p to %p, size %x\n",
687 gd->bootstage, gd->new_bootstage, size);
688 memcpy(gd->new_bootstage, gd->bootstage, size);
689 gd->bootstage = gd->new_bootstage;
Simon Glass39d58522019-10-21 17:26:50 -0600690 bootstage_relocate();
Simon Glassb9aff922017-05-22 05:05:30 -0600691 }
692#endif
693
694 return 0;
695}
696
Simon Glassa815dab2018-11-15 18:43:52 -0700697static int reloc_bloblist(void)
698{
699#ifdef CONFIG_BLOBLIST
Simon Glass5d2199d2021-11-03 21:09:20 -0600700 /*
701 * Relocate only if we are supposed to send it
702 */
703 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
704 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
705 debug("Not relocating bloblist\n");
Simon Glassa815dab2018-11-15 18:43:52 -0700706 return 0;
Simon Glass5d2199d2021-11-03 21:09:20 -0600707 }
Simon Glassa815dab2018-11-15 18:43:52 -0700708 if (gd->new_bloblist) {
Simon Glassa815dab2018-11-15 18:43:52 -0700709 debug("Copying bloblist from %p to %p, size %x\n",
Raymond Mao1a99d2c2024-02-03 08:36:22 -0800710 gd->bloblist, gd->new_bloblist, gd->bloblist->total_size);
711 return bloblist_reloc(gd->new_bloblist,
712 CONFIG_BLOBLIST_SIZE_RELOC);
Simon Glassa815dab2018-11-15 18:43:52 -0700713 }
714#endif
715
716 return 0;
717}
718
Simon Glassc45e3592013-03-11 06:49:53 +0000719static int setup_reloc(void)
720{
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100721 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
Simon Glass72cc5382022-10-20 18:22:39 -0600722#ifdef CONFIG_TEXT_BASE
Lothar Waßmann160583b2017-06-08 10:18:25 +0200723#ifdef ARM
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100724 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
Michal Simekf942ebb2022-06-24 14:15:01 +0200725#elif defined(CONFIG_MICROBLAZE)
726 gd->reloc_off = gd->relocaddr - (u32)_start;
Lothar Waßmann160583b2017-06-08 10:18:25 +0200727#elif defined(CONFIG_M68K)
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100728 /*
729 * On all ColdFire arch cpu, monitor code starts always
730 * just after the default vector table location, so at 0x400
731 */
Simon Glass72cc5382022-10-20 18:22:39 -0600732 gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
Simon Glass752707a2019-04-08 13:20:41 -0600733#elif !defined(CONFIG_SANDBOX)
Simon Glass72cc5382022-10-20 18:22:39 -0600734 gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
angelo@sysam.itf245ae92015-02-12 01:40:17 +0100735#endif
Sonic Zhangf503a522014-07-17 19:01:34 +0800736#endif
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100737 }
738
Simon Glassc45e3592013-03-11 06:49:53 +0000739 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
740
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100741 if (gd->flags & GD_FLG_SKIP_RELOC) {
742 debug("Skipping relocation due to flag\n");
743 } else {
744 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
745 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
746 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
747 gd->start_addr_sp);
748 }
Simon Glassc45e3592013-03-11 06:49:53 +0000749
750 return 0;
751}
752
mario.six@gdsys.cc7e9b9d62017-02-22 16:07:22 +0100753#ifdef CONFIG_OF_BOARD_FIXUP
754static int fix_fdt(void)
755{
756 return board_fix_fdt((void *)gd->fdt_blob);
757}
758#endif
759
Simon Glassc45e3592013-03-11 06:49:53 +0000760/* ARM calls relocate_code from its crt0.S */
Simon Glasse6b03502023-07-15 21:38:52 -0600761#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glassc45e3592013-03-11 06:49:53 +0000762
763static int jump_to_copy(void)
764{
Simon Glass00dd17a2015-08-04 12:33:39 -0600765 if (gd->flags & GD_FLG_SKIP_RELOC)
766 return 0;
Simon Glass6d179872013-03-05 14:39:52 +0000767 /*
768 * x86 is special, but in a nice way. It uses a trampoline which
769 * enables the dcache if possible.
770 *
771 * For now, other archs use relocate_code(), which is implemented
772 * similarly for all archs. When we do generic relocation, hopefully
773 * we can make all archs enable the dcache prior to relocation.
774 */
Alexey Brodkin913e9f02015-02-24 19:40:36 +0300775#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass6d179872013-03-05 14:39:52 +0000776 /*
777 * SDRAM and console are now initialised. The final stack can now
778 * be setup in SDRAM. Code execution will continue in Flash, but
779 * with the stack in SDRAM and Global Data in temporary memory
780 * (CPU cache)
781 */
Simon Glass0e27b872015-08-10 20:44:32 -0600782 arch_setup_gd(gd->new_gd);
Simon Glasse6b03502023-07-15 21:38:52 -0600783# if CONFIG_IS_ENABLED(X86_64)
784 board_init_f_r_trampoline64(gd->new_gd, gd->start_addr_sp);
785# else
786 board_init_f_r_trampoline(gd->start_addr_sp);
787# endif
Simon Glass6d179872013-03-05 14:39:52 +0000788#else
Masahiro Yamadad1589242013-05-27 00:37:30 +0000789 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass6d179872013-03-05 14:39:52 +0000790#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000791
792 return 0;
793}
794#endif
795
796/* Record the board_init_f() bootstage (after arch_cpu_init()) */
Simon Glass88200332017-05-22 05:05:25 -0600797static int initf_bootstage(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000798{
Simon Glassc55d5c32017-06-07 10:28:46 -0600799 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
800 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
Simon Glass88200332017-05-22 05:05:25 -0600801 int ret;
802
Simon Glass01154cb2017-05-22 05:05:35 -0600803 ret = bootstage_init(!from_spl);
Simon Glass88200332017-05-22 05:05:25 -0600804 if (ret)
805 return ret;
Simon Glass01154cb2017-05-22 05:05:35 -0600806 if (from_spl) {
807 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
808 CONFIG_BOOTSTAGE_STASH_SIZE);
809
810 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
811 if (ret && ret != -ENOENT) {
812 debug("Failed to unstash bootstage: err=%d\n", ret);
813 return ret;
814 }
815 }
Simon Glass88200332017-05-22 05:05:25 -0600816
Simon Glassc45e3592013-03-11 06:49:53 +0000817 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
818
819 return 0;
820}
821
Simon Glassa730c5d2014-07-23 06:55:04 -0600822static int initf_dm(void)
823{
Simon Glassadad2d02023-09-26 08:14:27 -0600824#if defined(CONFIG_DM) && CONFIG_IS_ENABLED(SYS_MALLOC_F)
Simon Glassa730c5d2014-07-23 06:55:04 -0600825 int ret;
826
Simon Glassea6a6092020-05-10 11:39:59 -0600827 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
Simon Glassa730c5d2014-07-23 06:55:04 -0600828 ret = dm_init_and_scan(true);
Simon Glassea6a6092020-05-10 11:39:59 -0600829 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
Simon Glassa730c5d2014-07-23 06:55:04 -0600830 if (ret)
831 return ret;
Ovidiu Panait525a2ec2020-11-28 10:43:05 +0200832
833 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
834 ret = dm_timer_init();
835 if (ret)
836 return ret;
837 }
Simon Glass8e4f80f2016-02-24 09:14:50 -0700838#endif
Simon Glassa730c5d2014-07-23 06:55:04 -0600839
840 return 0;
841}
842
Simon Glass5ded7e52015-01-19 22:16:12 -0700843/* Architecture-specific memory reservation */
844__weak int reserve_arch(void)
845{
846 return 0;
847}
848
Ovidiu Panait8e0319f2020-01-22 22:28:25 +0200849__weak int checkcpu(void)
850{
851 return 0;
852}
853
Ovidiu Panaitc508b272020-02-05 08:54:42 +0200854__weak int clear_bss(void)
855{
856 return 0;
857}
858
Simon Glass2031fad2017-01-16 07:03:50 -0700859static const init_fnc_t init_sequence_f[] = {
Simon Glassc45e3592013-03-11 06:49:53 +0000860 setup_mon_len,
Simon Glass26b78b22015-02-27 22:06:34 -0700861#ifdef CONFIG_OF_CONTROL
Simon Glassa0877672015-02-27 22:06:35 -0700862 fdtdec_setup,
Simon Glass26b78b22015-02-27 22:06:34 -0700863#endif
Heinrich Schuchardt2aecfc52019-06-02 00:53:24 +0200864#ifdef CONFIG_TRACE_EARLY
Simon Glass209a1a62013-06-11 11:14:42 -0700865 trace_early_init,
Kevin Hilman676f0192014-12-09 15:03:58 -0800866#endif
Simon Glasscfcb8862014-11-10 18:00:18 -0700867 initf_malloc,
Simon Glass55e32ba2017-12-04 13:48:28 -0700868 log_init,
Simon Glasse635af12017-05-22 05:05:31 -0600869 initf_bootstage, /* uses its own timer, so does not need DM */
Simon Glass4f542532022-03-04 08:43:02 -0700870 event_init,
Simon Glassa28f39c2023-09-26 08:14:51 -0600871 bloblist_maybe_init,
Simon Glasse14f1a22018-11-15 18:44:09 -0700872 setup_spl_handoff,
Ovidiu Panait85a31ac2020-11-28 10:43:04 +0200873#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
874 console_record_init,
875#endif
Simon Glassfcebb7b2023-08-21 21:16:59 -0600876 INITCALL_EVENT(EVT_FSP_INIT_F),
Simon Glassc45e3592013-03-11 06:49:53 +0000877 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton1f508dd2016-09-21 11:18:46 +0100878 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass6df5de22014-09-03 17:36:59 -0600879 initf_dm,
Simon Glassc45e3592013-03-11 06:49:53 +0000880#if defined(CONFIG_BOARD_EARLY_INIT_F)
881 board_early_init_f,
882#endif
Simon Glass6829d8c2017-03-28 10:27:26 -0600883#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glass70064a72017-03-28 10:27:19 -0600884 /* get CPU and bus clocks according to the environment variable */
Simon Glass50250b52013-03-11 14:30:42 +0000885 get_clocks, /* get CPU and bus clocks (etc.) */
Simon Glasse8d20d42017-03-28 10:27:23 -0600886#endif
Marek Vasut4c77f062023-03-23 01:20:40 +0100887#if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
Simon Glassc45e3592013-03-11 06:49:53 +0000888 timer_init, /* initialize timer */
Angelo Dureghellocd226852017-05-10 23:58:06 +0200889#endif
Simon Glass50250b52013-03-11 14:30:42 +0000890#if defined(CONFIG_BOARD_POSTCLK_INIT)
891 board_postclk_init,
892#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000893 env_init, /* initialize environment */
894 init_baud_rate, /* initialze baudrate settings */
895 serial_init, /* serial communications setup */
896 console_init_f, /* stage 1 init of console */
897 display_options, /* say that we are here */
898 display_text_info, /* show debugging info if required */
Simon Glass50250b52013-03-11 14:30:42 +0000899 checkcpu,
Mario Six4481a5d2018-08-06 10:23:34 +0200900#if defined(CONFIG_SYSRESET)
901 print_resetinfo,
902#endif
Simon Glass68c1d012017-01-23 13:31:25 -0700903#if defined(CONFIG_DISPLAY_CPUINFO)
Simon Glassc45e3592013-03-11 06:49:53 +0000904 print_cpuinfo, /* display cpu info (and speed) */
Simon Glass68c1d012017-01-23 13:31:25 -0700905#endif
Cooper Jr., Franklind8b354a2017-06-16 17:25:12 -0500906#if defined(CONFIG_DTB_RESELECT)
907 embedded_dtb_select,
908#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000909#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada9607f7a2015-01-14 17:07:05 +0900910 show_board_info,
Simon Glassc45e3592013-03-11 06:49:53 +0000911#endif
Simon Glass50250b52013-03-11 14:30:42 +0000912 INIT_FUNC_WATCHDOG_INIT
Simon Glass6b42d382023-08-21 21:16:54 -0600913 INITCALL_EVENT(EVT_MISC_INIT_F),
Simon Glass50250b52013-03-11 14:30:42 +0000914 INIT_FUNC_WATCHDOG_RESET
Tom Rini52b2e262021-08-18 23:12:24 -0400915#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glass50250b52013-03-11 14:30:42 +0000916 init_func_i2c,
917#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000918 announce_dram_init,
Simon Glassc45e3592013-03-11 06:49:53 +0000919 dram_init, /* configure available RAM banks */
Simon Glass50250b52013-03-11 14:30:42 +0000920#ifdef CONFIG_POST
921 post_init_f,
922#endif
923 INIT_FUNC_WATCHDOG_RESET
Tom Rini6a5dccc2022-11-16 13:10:41 -0500924#if defined(CFG_SYS_DRAM_TEST)
Simon Glass50250b52013-03-11 14:30:42 +0000925 testdram,
Tom Rini6a5dccc2022-11-16 13:10:41 -0500926#endif /* CFG_SYS_DRAM_TEST */
Simon Glass50250b52013-03-11 14:30:42 +0000927 INIT_FUNC_WATCHDOG_RESET
928
Simon Glassc45e3592013-03-11 06:49:53 +0000929#ifdef CONFIG_POST
930 init_post,
931#endif
Simon Glass50250b52013-03-11 14:30:42 +0000932 INIT_FUNC_WATCHDOG_RESET
Simon Glassc45e3592013-03-11 06:49:53 +0000933 /*
934 * Now that we have DRAM mapped and working, we can
935 * relocate the code and continue running from DRAM.
936 *
937 * Reserve memory at end of RAM for (top down in that order):
938 * - area that won't get touched by U-Boot and Linux (optional)
939 * - kernel log buffer
940 * - protected RAM
941 * - LCD framebuffer
942 * - monitor code
943 * - board info struct
944 */
945 setup_dest_addr,
Pragnesh Patelad51fec2020-08-13 10:12:26 +0530946#ifdef CONFIG_OF_BOARD_FIXUP
947 fix_fdt,
948#endif
Tom Rini0bb9b092022-12-04 10:13:37 -0500949#ifdef CFG_PRAM
Simon Glassc45e3592013-03-11 06:49:53 +0000950 reserve_pram,
951#endif
952 reserve_round_4k,
Devarsh Thakkar46245d42023-12-05 21:25:19 +0530953 setup_relocaddr_from_bloblist,
Ovidiu Panait2a2941b2020-03-29 20:57:41 +0300954 arch_reserve_mmu,
Simon Glassfce58f52016-01-18 19:52:21 -0700955 reserve_video,
Simon Glass1008da02016-01-18 19:52:20 -0700956 reserve_trace,
Simon Glassc45e3592013-03-11 06:49:53 +0000957 reserve_uboot,
958 reserve_malloc,
959 reserve_board,
Simon Glassc45e3592013-03-11 06:49:53 +0000960 reserve_global_data,
961 reserve_fdt,
Simon Glassb9aff922017-05-22 05:05:30 -0600962 reserve_bootstage,
Simon Glassa815dab2018-11-15 18:43:52 -0700963 reserve_bloblist,
Simon Glass5ded7e52015-01-19 22:16:12 -0700964 reserve_arch,
Simon Glassc45e3592013-03-11 06:49:53 +0000965 reserve_stacks,
Simon Glass2f949c32017-03-31 08:40:32 -0600966 dram_init_banksize,
Simon Glassc45e3592013-03-11 06:49:53 +0000967 show_dram_config,
Simon Glass50250b52013-03-11 14:30:42 +0000968 INIT_FUNC_WATCHDOG_RESET
Ovidiu Panait6183c8d2020-07-24 14:12:20 +0300969 setup_bdinfo,
Simon Glassc45e3592013-03-11 06:49:53 +0000970 display_new_sp,
Simon Glass50250b52013-03-11 14:30:42 +0000971 INIT_FUNC_WATCHDOG_RESET
Simon Glassc45e3592013-03-11 06:49:53 +0000972 reloc_fdt,
Simon Glassb9aff922017-05-22 05:05:30 -0600973 reloc_bootstage,
Simon Glassa815dab2018-11-15 18:43:52 -0700974 reloc_bloblist,
Simon Glassc45e3592013-03-11 06:49:53 +0000975 setup_reloc,
Alexey Brodkin913e9f02015-02-24 19:40:36 +0300976#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glassd50b2f42015-01-01 16:18:09 -0700977 copy_uboot_to_ram,
Simon Glassd50b2f42015-01-01 16:18:09 -0700978 do_elf_reloc_fixups,
979#endif
Chris Zankel41e37372016-08-10 18:36:43 +0300980 clear_bss,
Rasmus Villemoesc794e492022-10-28 13:50:54 +0200981 /*
982 * Deregister all cyclic functions before relocation, so that
983 * gd->cyclic_list does not contain any references to pre-relocation
984 * devices. Drivers will register their cyclic functions anew when the
985 * devices are probed again.
986 *
987 * This should happen as late as possible so that the window where a
988 * watchdog device is not serviced is as small as possible.
989 */
990 cyclic_unregister_all,
Simon Glasse6b03502023-07-15 21:38:52 -0600991#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glassc45e3592013-03-11 06:49:53 +0000992 jump_to_copy,
993#endif
994 NULL,
995};
996
997void board_init_f(ulong boot_flags)
998{
Simon Glassc45e3592013-03-11 06:49:53 +0000999 gd->flags = boot_flags;
Alexey Brodkin07236912013-11-27 22:32:40 +04001000 gd->have_console = 0;
Simon Glassc45e3592013-03-11 06:49:53 +00001001
1002 if (initcall_run_list(init_sequence_f))
1003 hang();
1004
Ben Stoltz1930e8d2015-07-31 09:31:37 -06001005#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Alexey Brodkinc157ab92015-12-16 19:24:10 +03001006 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1007 !defined(CONFIG_ARC)
Simon Glassc45e3592013-03-11 06:49:53 +00001008 /* NOTREACHED - jump_to_copy() does not return */
1009 hang();
1010#endif
1011}
Simon Glass6d179872013-03-05 14:39:52 +00001012
Alexey Brodkin913e9f02015-02-24 19:40:36 +03001013#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass6d179872013-03-05 14:39:52 +00001014/*
1015 * For now this code is only used on x86.
1016 *
1017 * init_sequence_f_r is the list of init functions which are run when
1018 * U-Boot is executing from Flash with a semi-limited 'C' environment.
1019 * The following limitations must be considered when implementing an
1020 * '_f_r' function:
1021 * - 'static' variables are read-only
1022 * - Global Data (gd->xxx) is read/write
1023 *
1024 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1025 * supported). It _should_, if possible, copy global data to RAM and
1026 * initialise the CPU caches (to speed up the relocation process)
1027 *
1028 * NOTE: At present only x86 uses this route, but it is intended that
1029 * all archs will move to this when generic relocation is implemented.
1030 */
Simon Glass2031fad2017-01-16 07:03:50 -07001031static const init_fnc_t init_sequence_f_r[] = {
Simon Glass6e1a81a2017-01-16 07:03:49 -07001032#if !CONFIG_IS_ENABLED(X86_64)
Simon Glass6d179872013-03-05 14:39:52 +00001033 init_cache_f_r,
Simon Glass6e1a81a2017-01-16 07:03:49 -07001034#endif
Simon Glass6d179872013-03-05 14:39:52 +00001035
1036 NULL,
1037};
1038
1039void board_init_f_r(void)
1040{
1041 if (initcall_run_list(init_sequence_f_r))
1042 hang();
1043
1044 /*
Simon Glass51f73f12016-03-11 22:06:51 -07001045 * The pre-relocation drivers may be using memory that has now gone
1046 * away. Mark serial as unavailable - this will fall back to the debug
1047 * UART if available.
Simon Glass55e32ba2017-12-04 13:48:28 -07001048 *
1049 * Do the same with log drivers since the memory may not be available.
Simon Glass51f73f12016-03-11 22:06:51 -07001050 */
Simon Glass55e32ba2017-12-04 13:48:28 -07001051 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
Simon Glassb77fe1f2017-09-05 19:49:45 -06001052#ifdef CONFIG_TIMER
1053 gd->timer = NULL;
1054#endif
Simon Glass51f73f12016-03-11 22:06:51 -07001055
1056 /*
Simon Glass6d179872013-03-05 14:39:52 +00001057 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1058 * Transfer execution from Flash to RAM by calculating the address
1059 * of the in-RAM copy of board_init_r() and calling it
1060 */
Alexey Brodkin9c832f12015-02-25 17:59:02 +03001061 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass6d179872013-03-05 14:39:52 +00001062
1063 /* NOTREACHED - board_init_r() does not return */
1064 hang();
1065}
Alexey Brodkin73503182015-03-24 11:12:47 +03001066#endif /* CONFIG_X86 */