blob: c8a612d6070963ffd260a1186ea26db44986b079 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassc45e3592013-03-11 06:49:53 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
4 * (C) Copyright 2002-2006
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
7 * (C) Copyright 2002
8 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
9 * Marius Groeger <mgroeger@sysgo.de>
Simon Glassc45e3592013-03-11 06:49:53 +000010 */
11
Tom Rinidec7ea02024-05-20 13:35:03 -060012#include <config.h>
Simon Glassa815dab2018-11-15 18:43:52 -070013#include <bloblist.h>
Simon Glass1ea97892020-05-10 11:40:00 -060014#include <bootstage.h>
Simon Glass85d65312019-12-28 10:44:58 -070015#include <clock_legacy.h>
Simon Glassa73bda42015-11-08 23:47:45 -070016#include <console.h>
Mario Six97bbb602018-08-06 10:23:41 +020017#include <cpu.h>
Simon Glass1fa70f82019-11-14 12:57:34 -070018#include <cpu_func.h>
Stefan Roese7513df32022-09-02 13:57:50 +020019#include <cyclic.h>
Simon Glass1ab16922022-07-31 12:28:48 -060020#include <display_options.h>
Simon Glassa730c5d2014-07-23 06:55:04 -060021#include <dm.h>
Simon Glass79fd2142019-08-01 09:46:43 -060022#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060023#include <env_internal.h>
Simon Glass4f542532022-03-04 08:43:02 -070024#include <event.h>
Simon Glassc45e3592013-03-11 06:49:53 +000025#include <fdtdec.h>
Simon Glass15393432013-04-20 08:42:41 +000026#include <fs.h>
Simon Glassf11478f2019-12-28 10:45:07 -070027#include <hang.h>
Simon Glass50250b52013-03-11 14:30:42 +000028#include <i2c.h>
Simon Glass6980b6b2019-11-14 12:57:45 -070029#include <init.h>
Simon Glassc45e3592013-03-11 06:49:53 +000030#include <initcall.h>
Simon Glass0f2af882020-05-10 11:40:05 -060031#include <log.h>
Simon Glassd1d087d2015-02-27 22:06:36 -070032#include <malloc.h>
Joe Hershberger65b905b2015-03-22 17:08:59 -050033#include <mapmem.h>
Simon Glass62cf9122013-04-26 02:53:43 +000034#include <os.h>
Simon Glassc45e3592013-03-11 06:49:53 +000035#include <post.h>
Simon Glass6ab91072017-03-31 08:40:38 -060036#include <relocate.h>
Simon Glass36736182019-11-14 12:57:24 -070037#include <serial.h>
Simon Glasse14f1a22018-11-15 18:44:09 -070038#include <spl.h>
Jeroen Hofsteea802b982014-06-23 23:20:19 +020039#include <status_led.h>
Mario Six4481a5d2018-08-06 10:23:34 +020040#include <sysreset.h>
Jerome Forissier1fd58d42025-04-04 15:50:36 +020041#include <time.h>
Simon Glass8e4f80f2016-02-24 09:14:50 -070042#include <timer.h>
Simon Glass209a1a62013-06-11 11:14:42 -070043#include <trace.h>
Simon Glass45aec8e2024-08-07 16:47:34 -060044#include <upl.h>
Simon Glassfce58f52016-01-18 19:52:21 -070045#include <video.h>
Simon Glass50250b52013-03-11 14:30:42 +000046#include <watchdog.h>
Simon Glass274e0b02020-05-10 11:39:56 -060047#include <asm/cache.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060048#include <asm/global_data.h>
Simon Glassc45e3592013-03-11 06:49:53 +000049#include <asm/io.h>
50#include <asm/sections.h>
Simon Glassa730c5d2014-07-23 06:55:04 -060051#include <dm/root.h>
Simon Glassb3c12562017-03-31 08:40:35 -060052#include <linux/errno.h>
Pali Rohár8dc23ef2022-09-18 13:23:27 +020053#include <linux/log2.h>
Simon Glassc45e3592013-03-11 06:49:53 +000054
Simon Glassc45e3592013-03-11 06:49:53 +000055DECLARE_GLOBAL_DATA_PTR;
Simon Glassc45e3592013-03-11 06:49:53 +000056
57/*
Simon Glass839855c2015-04-28 20:25:03 -060058 * TODO(sjg@chromium.org): IMO this code should be
Simon Glassc45e3592013-03-11 06:49:53 +000059 * refactored to a single function, something like:
60 *
61 * void led_set_state(enum led_colour_t colour, int on);
62 */
63/************************************************************************
64 * Coloured LED functionality
65 ************************************************************************
66 * May be supplied by boards if desired
67 */
Jeroen Hofsteea802b982014-06-23 23:20:19 +020068__weak void coloured_LED_init(void) {}
69__weak void red_led_on(void) {}
70__weak void red_led_off(void) {}
71__weak void green_led_on(void) {}
72__weak void green_led_off(void) {}
73__weak void yellow_led_on(void) {}
74__weak void yellow_led_off(void) {}
75__weak void blue_led_on(void) {}
76__weak void blue_led_off(void) {}
Simon Glassc45e3592013-03-11 06:49:53 +000077
78/*
79 * Why is gd allocated a register? Prior to reloc it might be better to
80 * just pass it around to each function in this file?
81 *
82 * After reloc one could argue that it is hardly used and doesn't need
83 * to be in a register. Or if it is it should perhaps hold pointers to all
84 * global data for all modules, so that post-reloc we can avoid the massive
85 * literal pool we get on ARM. Or perhaps just encourage each module to use
86 * a structure...
87 */
88
Sonic Zhangf503a522014-07-17 19:01:34 +080089#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glass50250b52013-03-11 14:30:42 +000090static int init_func_watchdog_init(void)
91{
Tom Rini210ebce2017-03-14 11:08:10 -040092# if defined(CONFIG_HW_WATCHDOG) && \
93 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Prasanthi Chellakumar0509c4e2018-10-09 11:46:40 -070094 defined(CONFIG_SH) || \
Anatolij Gustschin87db2942016-06-13 14:24:23 +020095 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roeseee86af22015-03-10 08:04:36 +010096 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangf503a522014-07-17 19:01:34 +080097 hw_watchdog_init();
Simon Glass50250b52013-03-11 14:30:42 +000098 puts(" Watchdog enabled\n");
Anatolij Gustschind3aa98a2016-06-13 14:24:24 +020099# endif
Stefan Roese80877fa2022-09-02 14:10:46 +0200100 schedule();
Simon Glass50250b52013-03-11 14:30:42 +0000101
102 return 0;
103}
104
105int init_func_watchdog_reset(void)
106{
Stefan Roese80877fa2022-09-02 14:10:46 +0200107 schedule();
Simon Glass50250b52013-03-11 14:30:42 +0000108
109 return 0;
110}
111#endif /* CONFIG_WATCHDOG */
112
Jeroen Hofstee45846052014-10-08 22:57:22 +0200113__weak void board_add_ram_info(int use_default)
Simon Glass50250b52013-03-11 14:30:42 +0000114{
115 /* please define platform specific board_add_ram_info() */
116}
117
Simon Glassc45e3592013-03-11 06:49:53 +0000118static int init_baud_rate(void)
119{
Simon Glass22c34c22017-08-03 12:22:13 -0600120 gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
Simon Glassc45e3592013-03-11 06:49:53 +0000121 return 0;
122}
123
124static int display_text_info(void)
125{
Ben Stoltz1930e8d2015-07-31 09:31:37 -0600126#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100127 ulong bss_start, bss_end, text_base;
Simon Glassc45e3592013-03-11 06:49:53 +0000128
Shiji Yangeff11fa2023-08-03 09:47:17 +0800129 bss_start = (ulong)__bss_start;
130 bss_end = (ulong)__bss_end;
Albert ARIBAUD6e294722014-02-22 17:53:43 +0100131
Simon Glass72cc5382022-10-20 18:22:39 -0600132#ifdef CONFIG_TEXT_BASE
133 text_base = CONFIG_TEXT_BASE;
Sonic Zhangf503a522014-07-17 19:01:34 +0800134#else
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100135 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangf503a522014-07-17 19:01:34 +0800136#endif
Daniel Schwierzeck17c2af62014-11-15 23:46:53 +0100137
138 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100139 text_base, bss_start, bss_end);
Simon Glass62cf9122013-04-26 02:53:43 +0000140#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000141
Simon Glassc45e3592013-03-11 06:49:53 +0000142 return 0;
143}
144
Mario Six4481a5d2018-08-06 10:23:34 +0200145#ifdef CONFIG_SYSRESET
146static int print_resetinfo(void)
147{
148 struct udevice *dev;
149 char status[256];
Michal Suchanek32c58c12022-10-10 20:29:40 +0200150 bool status_printed = false;
Mario Six4481a5d2018-08-06 10:23:34 +0200151 int ret;
152
Bin Meng50a132b2023-07-22 00:15:21 +0800153 /*
154 * Not all boards have sysreset drivers available during early
Michal Suchanek32c58c12022-10-10 20:29:40 +0200155 * boot, so don't fail if one can't be found.
156 */
157 for (ret = uclass_first_device_check(UCLASS_SYSRESET, &dev); dev;
Bin Meng50a132b2023-07-22 00:15:21 +0800158 ret = uclass_next_device_check(&dev)) {
Michal Suchanek32c58c12022-10-10 20:29:40 +0200159 if (ret) {
160 debug("%s: %s sysreset device (error: %d)\n",
161 __func__, dev->name, ret);
162 continue;
163 }
Mario Six4481a5d2018-08-06 10:23:34 +0200164
Michal Suchanek32c58c12022-10-10 20:29:40 +0200165 if (!sysreset_get_status(dev, status, sizeof(status))) {
166 printf("%s%s", status_printed ? " " : "", status);
167 status_printed = true;
168 }
169 }
170 if (status_printed)
171 printf("\n");
Mario Six4481a5d2018-08-06 10:23:34 +0200172
173 return 0;
174}
175#endif
176
Mario Six97bbb602018-08-06 10:23:41 +0200177#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
178static int print_cpuinfo(void)
179{
180 struct udevice *dev;
181 char desc[512];
182 int ret;
183
Ye Li28abafd2020-05-03 21:58:50 +0800184 dev = cpu_get_current_dev();
185 if (!dev) {
186 debug("%s: Could not get CPU device\n",
187 __func__);
188 return -ENODEV;
Mario Six97bbb602018-08-06 10:23:41 +0200189 }
190
191 ret = cpu_get_desc(dev, desc, sizeof(desc));
192 if (ret) {
193 debug("%s: Could not get CPU description (err = %d)\n",
194 dev->name, ret);
195 return ret;
196 }
197
Bin Mengbe2269f2018-10-10 22:06:55 -0700198 printf("CPU: %s\n", desc);
Mario Six97bbb602018-08-06 10:23:41 +0200199
200 return 0;
201}
202#endif
203
Simon Glassc45e3592013-03-11 06:49:53 +0000204static int announce_dram_init(void)
205{
206 puts("DRAM: ");
207 return 0;
208}
209
Pali Rohár8dc23ef2022-09-18 13:23:27 +0200210/*
211 * From input size calculate its nearest rounded unit scale (multiply of 2^10)
212 * and value in calculated unit scale multiplied by 10 (as fractional fixed
213 * point number with one decimal digit), which is human natural format,
214 * same what uses print_size() function for displaying. Mathematically it is:
215 * round_nearest(val * 2^scale) = size * 10; where: 10 <= val < 10240.
216 *
217 * For example for size=87654321 we calculate scale=20 and val=836 which means
218 * that input has natural human format 83.6 M (mega = 2^20).
219 */
220#define compute_size_scale_val(size, scale, val) do { \
221 scale = ilog2(size) / 10 * 10; \
222 val = (10 * size + ((1ULL << scale) >> 1)) >> scale; \
223 if (val == 10240) { val = 10; scale += 10; } \
224} while (0)
225
226/*
227 * Check if the sizes in their natural units written in decimal format with
228 * one fraction number are same.
229 */
230static int sizes_near(unsigned long long size1, unsigned long long size2)
231{
232 unsigned int size1_scale, size1_val, size2_scale, size2_val;
233
234 compute_size_scale_val(size1, size1_scale, size1_val);
235 compute_size_scale_val(size2, size2_scale, size2_val);
236
237 return size1_scale == size2_scale && size1_val == size2_val;
238}
239
Simon Glassc45e3592013-03-11 06:49:53 +0000240static int show_dram_config(void)
241{
York Sun60ac15a2014-05-02 17:28:05 -0700242 unsigned long long size;
Simon Glassc45e3592013-03-11 06:49:53 +0000243 int i;
244
245 debug("\nRAM Configuration:\n");
246 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
247 size += gd->bd->bi_dram[i].size;
Bin Mengc8964482015-08-06 01:31:20 -0700248 debug("Bank #%d: %llx ", i,
249 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glassc45e3592013-03-11 06:49:53 +0000250#ifdef DEBUG
251 print_size(gd->bd->bi_dram[i].size, "\n");
252#endif
253 }
254 debug("\nDRAM: ");
Simon Glassc45e3592013-03-11 06:49:53 +0000255
Pali Rohár8dc23ef2022-09-18 13:23:27 +0200256 print_size(gd->ram_size, "");
257 if (!sizes_near(gd->ram_size, size)) {
Neha Malcom Francis802e00e2025-03-19 19:33:26 +0530258 printf(" (total ");
Pali Rohár8dc23ef2022-09-18 13:23:27 +0200259 print_size(size, ")");
260 }
Simon Glass50250b52013-03-11 14:30:42 +0000261 board_add_ram_info(0);
262 putc('\n');
Simon Glassc45e3592013-03-11 06:49:53 +0000263
264 return 0;
265}
266
Simon Glass2f949c32017-03-31 08:40:32 -0600267__weak int dram_init_banksize(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000268{
Stefan Roese90cda992020-08-12 13:02:39 +0200269 gd->bd->bi_dram[0].start = gd->ram_base;
Simon Glassc45e3592013-03-11 06:49:53 +0000270 gd->bd->bi_dram[0].size = get_effective_memsize();
Simon Glass2f949c32017-03-31 08:40:32 -0600271
272 return 0;
Simon Glassc45e3592013-03-11 06:49:53 +0000273}
274
Tom Rini52b2e262021-08-18 23:12:24 -0400275#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Simon Glass50250b52013-03-11 14:30:42 +0000276static int init_func_i2c(void)
277{
278 puts("I2C: ");
trema6612902013-09-21 18:13:34 +0200279 i2c_init_all();
Simon Glass50250b52013-03-11 14:30:42 +0000280 puts("ready\n");
281 return 0;
282}
283#endif
284
Simon Glassc45e3592013-03-11 06:49:53 +0000285static int setup_mon_len(void)
286{
Stefan Bosch26f51302024-01-26 12:50:55 +0000287#if defined(CONFIG_ARCH_NEXELL)
288 gd->mon_len = (ulong)__bss_end - (ulong)__image_copy_start;
289#elif defined(__ARM__) || defined(__MICROBLAZE__)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800290 gd->mon_len = (ulong)__bss_end - (ulong)_start;
Simon Glass7e9f5882023-01-15 14:15:40 -0700291#elif defined(CONFIG_SANDBOX) && !defined(__riscv)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800292 gd->mon_len = (ulong)_end - (ulong)_init;
Heinrich Schuchardte7301bb2021-05-19 12:02:39 +0200293#elif defined(CONFIG_SANDBOX)
Simon Glass7e9f5882023-01-15 14:15:40 -0700294 /* gcc does not provide _init in crti.o on RISC-V */
Heinrich Schuchardte7301bb2021-05-19 12:02:39 +0200295 gd->mon_len = 0;
296#elif defined(CONFIG_EFI_APP)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800297 gd->mon_len = (ulong)_end - (ulong)_init;
Tom Rini210ebce2017-03-14 11:08:10 -0400298#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangf503a522014-07-17 19:01:34 +0800299 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Tom Rini53320122022-04-06 09:21:25 -0400300#elif defined(CONFIG_SH) || defined(CONFIG_RISCV)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800301 gd->mon_len = (ulong)(__bss_end) - (ulong)(_start);
Simon Glass90632bd2016-05-14 18:49:28 -0600302#elif defined(CONFIG_SYS_MONITOR_BASE)
Shiji Yangeff11fa2023-08-03 09:47:17 +0800303 /* TODO: use (ulong)__bss_end - (ulong)__text_start; ? */
304 gd->mon_len = (ulong)__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass9c9f44a2013-03-11 07:06:48 +0000305#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000306 return 0;
307}
308
Simon Glass1577b132024-12-01 07:42:35 -0700309static int setup_spl_handoff(void)
310{
311#if CONFIG_IS_ENABLED(HANDOFF)
312 gd->spl_handoff = bloblist_find(BLOBLISTT_U_BOOT_SPL_HANDOFF,
313 sizeof(struct spl_handoff));
314 debug("Found SPL hand-off info %p\n", gd->spl_handoff);
315#endif
316
317 return 0;
318}
319
Simon Glassc45e3592013-03-11 06:49:53 +0000320__weak int arch_cpu_init(void)
321{
322 return 0;
323}
324
Paul Burton1f508dd2016-09-21 11:18:46 +0100325__weak int mach_cpu_init(void)
326{
327 return 0;
328}
329
Simon Glassc45e3592013-03-11 06:49:53 +0000330/* Get the top of usable RAM */
Heinrich Schuchardt51a9aac2023-08-12 20:16:58 +0200331__weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
Simon Glassc45e3592013-03-11 06:49:53 +0000332{
Tom Rinibb4dd962022-11-16 13:10:37 -0500333#if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700334 /*
Simon Glass839855c2015-04-28 20:25:03 -0600335 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700336 * 32-bit address space. If so, clip the usable RAM so it doesn't.
337 */
Tom Rinibb4dd962022-11-16 13:10:37 -0500338 if (gd->ram_top < CFG_SYS_SDRAM_BASE)
Stephen Warren0ba4a8a2014-12-23 10:34:49 -0700339 /*
340 * Will wrap back to top of 32-bit space when reservations
341 * are made.
342 */
343 return 0;
344#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000345 return gd->ram_top;
346}
347
Ovidiu Panaitbbce5f32022-09-13 21:31:28 +0300348__weak int arch_setup_dest_addr(void)
349{
350 return 0;
351}
352
Simon Glassc45e3592013-03-11 06:49:53 +0000353static int setup_dest_addr(void)
354{
Simon Glass0b6675d2024-08-21 10:19:16 -0600355 debug("Monitor len: %08x\n", gd->mon_len);
Simon Glassc45e3592013-03-11 06:49:53 +0000356 /*
357 * Ram is setup, size stored in gd !!
358 */
Pali Rohárad37d422022-09-09 17:32:41 +0200359 debug("Ram size: %08llX\n", (unsigned long long)gd->ram_size);
Tom Rini5c1e7272022-04-06 10:33:32 -0400360#if CONFIG_VAL(SYS_MEM_TOP_HIDE)
Simon Glassc45e3592013-03-11 06:49:53 +0000361 /*
362 * Subtract specified amount of memory to hide so that it won't
363 * get "touched" at all by U-Boot. By fixing up gd->ram_size
364 * the Linux kernel should now get passed the now "corrected"
York Sun4de24ef2017-03-06 09:02:28 -0800365 * memory size and won't touch it either. This should work
366 * for arch/ppc and arch/powerpc. Only Linux board ports in
367 * arch/powerpc with bootwrapper support, that recalculate the
368 * memory size from the SDRAM controller setup will have to
369 * get fixed.
Simon Glassc45e3592013-03-11 06:49:53 +0000370 */
York Sun4de24ef2017-03-06 09:02:28 -0800371 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
372#endif
Tom Rinibb4dd962022-11-16 13:10:37 -0500373#ifdef CFG_SYS_SDRAM_BASE
374 gd->ram_base = CFG_SYS_SDRAM_BASE;
Simon Glassc45e3592013-03-11 06:49:53 +0000375#endif
Siva Durga Prasad Paladugu94a1d522018-07-16 15:56:10 +0530376 gd->ram_top = gd->ram_base + get_effective_memsize();
Simon Glassc45e3592013-03-11 06:49:53 +0000377 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadad1589242013-05-27 00:37:30 +0000378 gd->relocaddr = gd->ram_top;
Pali Rohárad37d422022-09-09 17:32:41 +0200379 debug("Ram top: %08llX\n", (unsigned long long)gd->ram_top);
Ovidiu Panaitbbce5f32022-09-13 21:31:28 +0300380
381 return arch_setup_dest_addr();
Simon Glassc45e3592013-03-11 06:49:53 +0000382}
383
Tom Rini0bb9b092022-12-04 10:13:37 -0500384#ifdef CFG_PRAM
Simon Glassc45e3592013-03-11 06:49:53 +0000385/* reserve protected RAM */
386static int reserve_pram(void)
387{
388 ulong reg;
389
Tom Rini0bb9b092022-12-04 10:13:37 -0500390 reg = env_get_ulong("pram", 10, CFG_PRAM);
Masahiro Yamadad1589242013-05-27 00:37:30 +0000391 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glassc45e3592013-03-11 06:49:53 +0000392 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadad1589242013-05-27 00:37:30 +0000393 gd->relocaddr);
Simon Glassc45e3592013-03-11 06:49:53 +0000394 return 0;
395}
Tom Rini0bb9b092022-12-04 10:13:37 -0500396#endif /* CFG_PRAM */
Simon Glassc45e3592013-03-11 06:49:53 +0000397
398/* Round memory pointer down to next 4 kB limit */
399static int reserve_round_4k(void)
400{
Masahiro Yamadad1589242013-05-27 00:37:30 +0000401 gd->relocaddr &= ~(4096 - 1);
Simon Glassc45e3592013-03-11 06:49:53 +0000402 return 0;
403}
404
Ovidiu Panait2a2941b2020-03-29 20:57:41 +0300405__weak int arch_reserve_mmu(void)
406{
407 return 0;
408}
409
Devarsh Thakkar46245d42023-12-05 21:25:19 +0530410static int reserve_video_from_videoblob(void)
Simon Glassfce58f52016-01-18 19:52:21 -0700411{
Simon Glassd4dce4a2024-09-29 19:49:36 -0600412 if (IS_ENABLED(CONFIG_SPL_VIDEO_HANDOFF) && xpl_phase() > PHASE_SPL) {
Nikhil M Jainf7ec5312023-07-18 14:27:31 +0530413 struct video_handoff *ho;
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530414 int ret = 0;
Nikhil M Jainf7ec5312023-07-18 14:27:31 +0530415
416 ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
417 if (!ho)
Devarsh Thakkar2febd462023-12-05 21:25:20 +0530418 return log_msg_ret("Missing video bloblist", -ENOENT);
419
420 ret = video_reserve_from_bloblist(ho);
421 if (ret)
422 return log_msg_ret("Invalid Video handoff info", ret);
Devarsh Thakkar46245d42023-12-05 21:25:19 +0530423
424 /* Sanity check fb from blob is before current relocaddr */
425 if (likely(gd->relocaddr > (unsigned long)ho->fb))
426 gd->relocaddr = ho->fb;
427 }
428
429 return 0;
430}
431
432/*
433 * Check if any bloblist received specifying reserved areas from previous stage and adjust
434 * gd->relocaddr accordingly, so that we start reserving after pre-reserved areas
435 * from previous stage.
436 *
437 * NOTE:
438 * IT is recommended that all bloblists from previous stage are reserved from ram_top
439 * as next stage will simply start reserving further regions after them.
440 */
441static int setup_relocaddr_from_bloblist(void)
442{
443 reserve_video_from_videoblob();
444
445 return 0;
446}
447
448static int reserve_video(void)
449{
450 if (CONFIG_IS_ENABLED(VIDEO)) {
Simon Glassb24a7d92022-10-16 15:57:41 -0600451 ulong addr;
452 int ret;
Simon Glassfce58f52016-01-18 19:52:21 -0700453
Simon Glassb24a7d92022-10-16 15:57:41 -0600454 addr = gd->relocaddr;
455 ret = video_reserve(&addr);
456 if (ret)
457 return ret;
458 debug("Reserving %luk for video at: %08lx\n",
459 ((unsigned long)gd->relocaddr - addr) >> 10, addr);
460 gd->relocaddr = addr;
461 }
Simon Glass50250b52013-03-11 14:30:42 +0000462
463 return 0;
464}
Simon Glass50250b52013-03-11 14:30:42 +0000465
Simon Glass1008da02016-01-18 19:52:20 -0700466static int reserve_trace(void)
467{
468#ifdef CONFIG_TRACE
469 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
470 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
Heinrich Schuchardtc960b142019-06-14 21:52:22 +0200471 debug("Reserving %luk for trace data at: %08lx\n",
472 (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
Simon Glass1008da02016-01-18 19:52:20 -0700473#endif
474
475 return 0;
476}
477
Simon Glassc45e3592013-03-11 06:49:53 +0000478static int reserve_uboot(void)
479{
Jesse Taube36d255f2025-04-09 14:08:33 -0400480 /*
481 * This should be the first place GD_FLG_SKIP_RELOC is read from.
482 * Set GD_FLG_SKIP_RELOC flag if CONFIG_SKIP_RELOCATE is enabled.
483 */
484 if (CONFIG_IS_ENABLED(SKIP_RELOCATE))
485 gd->flags |= GD_FLG_SKIP_RELOC;
486
Alexey Brodkinc76af2a2018-05-25 16:08:14 +0300487 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
488 /*
489 * reserve memory for U-Boot code, data & bss
490 * round down to next 4 kB limit
491 */
492 gd->relocaddr -= gd->mon_len;
493 gd->relocaddr &= ~(4096 - 1);
494 #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
495 /* round down to next 64 kB limit so that IVPR stays aligned */
496 gd->relocaddr &= ~(65536 - 1);
497 #endif
Simon Glassc45e3592013-03-11 06:49:53 +0000498
Simon Glass0b6675d2024-08-21 10:19:16 -0600499 debug("Reserving %dk for U-Boot at: %08lx\n",
Alexey Brodkinc76af2a2018-05-25 16:08:14 +0300500 gd->mon_len >> 10, gd->relocaddr);
501 }
Masahiro Yamadad1589242013-05-27 00:37:30 +0000502
503 gd->start_addr_sp = gd->relocaddr;
504
Simon Glassc45e3592013-03-11 06:49:53 +0000505 return 0;
506}
507
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100508/*
509 * reserve after start_addr_sp the requested size and make the stack pointer
510 * 16-byte aligned, this alignment is needed for cast on the reserved memory
511 * ref = x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
512 * = ARMv8 Instruction Set Overview: quad word, 16 bytes
513 */
514static unsigned long reserve_stack_aligned(size_t size)
515{
516 return ALIGN_DOWN(gd->start_addr_sp - size, 16);
517}
518
Vikas Manocha4d49e102019-08-16 09:57:44 -0700519#ifdef CONFIG_SYS_NONCACHED_MEMORY
520static int reserve_noncached(void)
521{
Stephen Warren9b496432019-08-27 11:54:31 -0600522 /*
Simon Glassa9c12f12024-10-21 10:19:25 +0200523 * The value of gd->start_addr_sp must match the value of
524 * mem_malloc_start calculated in board_r.c:initr_malloc(), which is
525 * passed to dlmalloc.c:mem_malloc_init() and then used by
Stephen Warren9b496432019-08-27 11:54:31 -0600526 * cache.c:noncached_init()
527 *
528 * These calculations must match the code in cache.c:noncached_init()
529 */
530 gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
531 MMU_SECTION_SIZE;
532 gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
533 MMU_SECTION_SIZE);
Vikas Manocha4d49e102019-08-16 09:57:44 -0700534 debug("Reserving %dM for noncached_alloc() at: %08lx\n",
535 CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
536
537 return 0;
538}
539#endif
540
Simon Glassc45e3592013-03-11 06:49:53 +0000541/* reserve memory for malloc() area */
542static int reserve_malloc(void)
543{
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100544 gd->start_addr_sp = reserve_stack_aligned(TOTAL_MALLOC_LEN);
Simon Glassc45e3592013-03-11 06:49:53 +0000545 debug("Reserving %dk for malloc() at: %08lx\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100546 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Vikas Manocha4d49e102019-08-16 09:57:44 -0700547#ifdef CONFIG_SYS_NONCACHED_MEMORY
548 reserve_noncached();
549#endif
550
Simon Glassc45e3592013-03-11 06:49:53 +0000551 return 0;
552}
553
554/* (permanently) allocate a Board Info struct */
555static int reserve_board(void)
556{
Sonic Zhangf503a522014-07-17 19:01:34 +0800557 if (!gd->bd) {
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900558 gd->start_addr_sp = reserve_stack_aligned(sizeof(struct bd_info));
559 gd->bd = (struct bd_info *)map_sysmem(gd->start_addr_sp,
560 sizeof(struct bd_info));
561 memset(gd->bd, '\0', sizeof(struct bd_info));
Sonic Zhangf503a522014-07-17 19:01:34 +0800562 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900563 sizeof(struct bd_info), gd->start_addr_sp);
Sonic Zhangf503a522014-07-17 19:01:34 +0800564 }
Simon Glassc45e3592013-03-11 06:49:53 +0000565 return 0;
566}
567
Simon Glassc45e3592013-03-11 06:49:53 +0000568static int reserve_global_data(void)
569{
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100570 gd->start_addr_sp = reserve_stack_aligned(sizeof(gd_t));
Masahiro Yamadad1589242013-05-27 00:37:30 +0000571 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glassc45e3592013-03-11 06:49:53 +0000572 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Mario Six80b66dd2018-01-15 11:10:02 +0100573 sizeof(gd_t), gd->start_addr_sp);
Simon Glassc45e3592013-03-11 06:49:53 +0000574 return 0;
575}
576
577static int reserve_fdt(void)
578{
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200579 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
580 /*
581 * If the device tree is sitting immediately above our image
582 * then we must relocate it. If it is embedded in the data
583 * section, then it will be relocated with other data.
584 */
585 if (gd->fdt_blob) {
Simon Glass00f860f2024-08-21 10:19:10 -0600586 gd->boardf->fdt_size =
587 ALIGN(fdt_totalsize(gd->fdt_blob), 32);
Simon Glassc45e3592013-03-11 06:49:53 +0000588
Simon Glass00f860f2024-08-21 10:19:10 -0600589 gd->start_addr_sp = reserve_stack_aligned(
590 gd->boardf->fdt_size);
591 gd->boardf->new_fdt = map_sysmem(gd->start_addr_sp,
592 gd->boardf->fdt_size);
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200593 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Simon Glass00f860f2024-08-21 10:19:10 -0600594 gd->boardf->fdt_size, gd->start_addr_sp);
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200595 }
Simon Glassc45e3592013-03-11 06:49:53 +0000596 }
597
598 return 0;
599}
600
Simon Glassb9aff922017-05-22 05:05:30 -0600601static int reserve_bootstage(void)
602{
603#ifdef CONFIG_BOOTSTAGE
Simon Glassa036dbb2024-10-21 10:19:28 +0200604 int size = bootstage_get_size(true);
Simon Glassb9aff922017-05-22 05:05:30 -0600605
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100606 gd->start_addr_sp = reserve_stack_aligned(size);
Simon Glassd5d6f682024-08-21 10:19:11 -0600607 gd->boardf->new_bootstage = map_sysmem(gd->start_addr_sp, size);
Simon Glassb9aff922017-05-22 05:05:30 -0600608 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
609 gd->start_addr_sp);
610#endif
611
612 return 0;
613}
614
Patrick Delaunaya0a2b212018-03-13 13:57:00 +0100615__weak int arch_reserve_stacks(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000616{
Andreas Bießmann25429862015-02-06 23:06:45 +0100617 return 0;
618}
Simon Glass4d2aee82013-03-05 14:39:45 +0000619
Andreas Bießmann25429862015-02-06 23:06:45 +0100620static int reserve_stacks(void)
621{
622 /* make stack pointer 16-byte aligned */
Patrick Delaunaye177cbc2020-03-10 10:15:05 +0100623 gd->start_addr_sp = reserve_stack_aligned(16);
Simon Glassc45e3592013-03-11 06:49:53 +0000624
625 /*
Simon Glass839855c2015-04-28 20:25:03 -0600626 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann25429862015-02-06 23:06:45 +0100627 * gd->irq_sp
Simon Glassc45e3592013-03-11 06:49:53 +0000628 */
Andreas Bießmann25429862015-02-06 23:06:45 +0100629 return arch_reserve_stacks();
Simon Glassc45e3592013-03-11 06:49:53 +0000630}
631
Simon Glassa815dab2018-11-15 18:43:52 -0700632static int reserve_bloblist(void)
633{
634#ifdef CONFIG_BLOBLIST
Raymond Maoba72dd12025-02-19 16:02:19 -0800635 ulong size = bloblist_get_total_size();
636
637 if (size < CONFIG_BLOBLIST_SIZE_RELOC)
638 size = CONFIG_BLOBLIST_SIZE_RELOC;
639
Simon Glass9e945052020-09-27 18:46:18 -0600640 /* Align to a 4KB boundary for easier reading of addresses */
Raymond Maoba72dd12025-02-19 16:02:19 -0800641 gd->start_addr_sp = ALIGN_DOWN(gd->start_addr_sp - size, 0x1000);
642 gd->boardf->new_bloblist = map_sysmem(gd->start_addr_sp, size);
Simon Glassa815dab2018-11-15 18:43:52 -0700643#endif
644
645 return 0;
646}
647
Simon Glassc45e3592013-03-11 06:49:53 +0000648static int display_new_sp(void)
649{
Masahiro Yamadad1589242013-05-27 00:37:30 +0000650 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glassc45e3592013-03-11 06:49:53 +0000651
652 return 0;
653}
654
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300655__weak int arch_setup_bdinfo(void)
Ovidiu Panait0c5e9a02020-07-24 14:12:14 +0300656{
657 return 0;
658}
659
Ovidiu Panait3d0b0402020-07-24 14:12:15 +0300660int setup_bdinfo(void)
661{
662 return arch_setup_bdinfo();
663}
664
Simon Glassc45e3592013-03-11 06:49:53 +0000665#ifdef CONFIG_POST
666static int init_post(void)
667{
668 post_bootmode_init();
669 post_run(NULL, POST_ROM | post_bootmode_get(0));
670
671 return 0;
672}
673#endif
674
Simon Glassc45e3592013-03-11 06:49:53 +0000675static int reloc_fdt(void)
676{
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200677 if (!IS_ENABLED(CONFIG_OF_EMBED)) {
Simon Glass7f67b372024-08-21 10:19:09 -0600678 if (gd->boardf->new_fdt) {
679 memcpy(gd->boardf->new_fdt, gd->fdt_blob,
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200680 fdt_totalsize(gd->fdt_blob));
Simon Glass7f67b372024-08-21 10:19:09 -0600681 gd->fdt_blob = gd->boardf->new_fdt;
Ovidiu Panaitb6225b52020-11-28 10:43:07 +0200682 }
Simon Glassc45e3592013-03-11 06:49:53 +0000683 }
684
685 return 0;
686}
687
Simon Glassb9aff922017-05-22 05:05:30 -0600688static int reloc_bootstage(void)
689{
690#ifdef CONFIG_BOOTSTAGE
691 if (gd->flags & GD_FLG_SKIP_RELOC)
692 return 0;
Simon Glassd5d6f682024-08-21 10:19:11 -0600693 if (gd->boardf->new_bootstage)
694 bootstage_relocate(gd->boardf->new_bootstage);
Simon Glassb9aff922017-05-22 05:05:30 -0600695#endif
696
697 return 0;
698}
699
Simon Glassa815dab2018-11-15 18:43:52 -0700700static int reloc_bloblist(void)
701{
702#ifdef CONFIG_BLOBLIST
Simon Glass5d2199d2021-11-03 21:09:20 -0600703 /*
704 * Relocate only if we are supposed to send it
705 */
706 if ((gd->flags & GD_FLG_SKIP_RELOC) &&
707 CONFIG_BLOBLIST_SIZE == CONFIG_BLOBLIST_SIZE_RELOC) {
708 debug("Not relocating bloblist\n");
Simon Glassa815dab2018-11-15 18:43:52 -0700709 return 0;
Simon Glass5d2199d2021-11-03 21:09:20 -0600710 }
Simon Glassda0eeb82024-08-21 10:19:12 -0600711 if (gd->boardf->new_bloblist) {
Raymond Maoba72dd12025-02-19 16:02:19 -0800712 ulong size = bloblist_get_total_size();
713
714 if (size < CONFIG_BLOBLIST_SIZE_RELOC)
715 size = CONFIG_BLOBLIST_SIZE_RELOC;
716
717 debug("Copying bloblist from %p to %p, size %lx\n",
718 gd->bloblist, gd->boardf->new_bloblist, size);
719 return bloblist_reloc(gd->boardf->new_bloblist, size);
Simon Glassa815dab2018-11-15 18:43:52 -0700720 }
721#endif
722
723 return 0;
724}
725
Eugene Urieve84d69a2024-03-31 23:03:25 +0300726void mcheck_on_ramrelocation(size_t offset);
Simon Glassc45e3592013-03-11 06:49:53 +0000727static int setup_reloc(void)
728{
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100729 if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
Simon Glass72cc5382022-10-20 18:22:39 -0600730#ifdef CONFIG_TEXT_BASE
Lothar Waßmann160583b2017-06-08 10:18:25 +0200731#ifdef ARM
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100732 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
Michal Simekf942ebb2022-06-24 14:15:01 +0200733#elif defined(CONFIG_MICROBLAZE)
734 gd->reloc_off = gd->relocaddr - (u32)_start;
Lothar Waßmann160583b2017-06-08 10:18:25 +0200735#elif defined(CONFIG_M68K)
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100736 /*
737 * On all ColdFire arch cpu, monitor code starts always
738 * just after the default vector table location, so at 0x400
739 */
Simon Glass72cc5382022-10-20 18:22:39 -0600740 gd->reloc_off = gd->relocaddr - (CONFIG_TEXT_BASE + 0x400);
Simon Glass752707a2019-04-08 13:20:41 -0600741#elif !defined(CONFIG_SANDBOX)
Simon Glass72cc5382022-10-20 18:22:39 -0600742 gd->reloc_off = gd->relocaddr - CONFIG_TEXT_BASE;
angelo@sysam.itf245ae92015-02-12 01:40:17 +0100743#endif
Sonic Zhangf503a522014-07-17 19:01:34 +0800744#endif
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100745 }
746
Simon Glassc45e3592013-03-11 06:49:53 +0000747 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
748
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100749 if (gd->flags & GD_FLG_SKIP_RELOC) {
750 debug("Skipping relocation due to flag\n");
751 } else {
Eugene Urieve84d69a2024-03-31 23:03:25 +0300752#ifdef MCHECK_HEAP_PROTECTION
753 mcheck_on_ramrelocation(gd->reloc_off);
754#endif
Marek Vasut8c4a68e2021-11-13 18:34:04 +0100755 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
756 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
757 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
758 gd->start_addr_sp);
759 }
Simon Glassc45e3592013-03-11 06:49:53 +0000760
761 return 0;
762}
763
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200764#if CONFIG_IS_ENABLED(OF_BOARD_FIXUP)
mario.six@gdsys.cc7e9b9d62017-02-22 16:07:22 +0100765static int fix_fdt(void)
766{
767 return board_fix_fdt((void *)gd->fdt_blob);
768}
769#endif
770
Simon Glassc45e3592013-03-11 06:49:53 +0000771/* ARM calls relocate_code from its crt0.S */
Simon Glasse6b03502023-07-15 21:38:52 -0600772#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX)
Simon Glassc45e3592013-03-11 06:49:53 +0000773
774static int jump_to_copy(void)
775{
Simon Glass00dd17a2015-08-04 12:33:39 -0600776 if (gd->flags & GD_FLG_SKIP_RELOC)
777 return 0;
Simon Glass6d179872013-03-05 14:39:52 +0000778 /*
779 * x86 is special, but in a nice way. It uses a trampoline which
780 * enables the dcache if possible.
781 *
782 * For now, other archs use relocate_code(), which is implemented
783 * similarly for all archs. When we do generic relocation, hopefully
784 * we can make all archs enable the dcache prior to relocation.
785 */
Alexey Brodkin913e9f02015-02-24 19:40:36 +0300786#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass6d179872013-03-05 14:39:52 +0000787 /*
788 * SDRAM and console are now initialised. The final stack can now
789 * be setup in SDRAM. Code execution will continue in Flash, but
790 * with the stack in SDRAM and Global Data in temporary memory
791 * (CPU cache)
792 */
Simon Glass0e27b872015-08-10 20:44:32 -0600793 arch_setup_gd(gd->new_gd);
Simon Glasse6b03502023-07-15 21:38:52 -0600794# if CONFIG_IS_ENABLED(X86_64)
795 board_init_f_r_trampoline64(gd->new_gd, gd->start_addr_sp);
796# else
797 board_init_f_r_trampoline(gd->start_addr_sp);
798# endif
Simon Glass6d179872013-03-05 14:39:52 +0000799#else
Masahiro Yamadad1589242013-05-27 00:37:30 +0000800 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass6d179872013-03-05 14:39:52 +0000801#endif
Simon Glassc45e3592013-03-11 06:49:53 +0000802
803 return 0;
804}
805#endif
806
807/* Record the board_init_f() bootstage (after arch_cpu_init()) */
Simon Glass88200332017-05-22 05:05:25 -0600808static int initf_bootstage(void)
Simon Glassc45e3592013-03-11 06:49:53 +0000809{
Simon Glassc55d5c32017-06-07 10:28:46 -0600810 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
811 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
Simon Glass88200332017-05-22 05:05:25 -0600812 int ret;
813
Simon Glass01154cb2017-05-22 05:05:35 -0600814 ret = bootstage_init(!from_spl);
Simon Glass88200332017-05-22 05:05:25 -0600815 if (ret)
816 return ret;
Simon Glass01154cb2017-05-22 05:05:35 -0600817 if (from_spl) {
Jonas Karlmanca052692024-08-03 12:41:44 +0000818 ret = bootstage_unstash_default();
Simon Glass01154cb2017-05-22 05:05:35 -0600819 if (ret && ret != -ENOENT) {
820 debug("Failed to unstash bootstage: err=%d\n", ret);
821 return ret;
822 }
823 }
Simon Glass88200332017-05-22 05:05:25 -0600824
Simon Glassc45e3592013-03-11 06:49:53 +0000825 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
826
827 return 0;
828}
829
Simon Glassa730c5d2014-07-23 06:55:04 -0600830static int initf_dm(void)
831{
Simon Glassa730c5d2014-07-23 06:55:04 -0600832 int ret;
833
Simon Glass9ab26112024-11-20 08:36:39 -0700834 if (!CONFIG_IS_ENABLED(SYS_MALLOC_F))
835 return 0;
836
Simon Glassea6a6092020-05-10 11:39:59 -0600837 bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
Simon Glassa730c5d2014-07-23 06:55:04 -0600838 ret = dm_init_and_scan(true);
839 if (ret)
840 return ret;
Ovidiu Panait525a2ec2020-11-28 10:43:05 +0200841
Simon Glass775fc112024-11-20 08:36:41 -0700842 ret = dm_autoprobe();
843 if (ret)
844 return ret;
Simon Glass079ef952025-02-26 09:26:14 -0700845 bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
Simon Glass775fc112024-11-20 08:36:41 -0700846
Ovidiu Panait525a2ec2020-11-28 10:43:05 +0200847 if (IS_ENABLED(CONFIG_TIMER_EARLY)) {
848 ret = dm_timer_init();
849 if (ret)
850 return ret;
851 }
Simon Glassa730c5d2014-07-23 06:55:04 -0600852
853 return 0;
854}
855
Simon Glass5ded7e52015-01-19 22:16:12 -0700856/* Architecture-specific memory reservation */
857__weak int reserve_arch(void)
858{
859 return 0;
860}
861
Ovidiu Panait8e0319f2020-01-22 22:28:25 +0200862__weak int checkcpu(void)
863{
864 return 0;
865}
866
Ovidiu Panaitc508b272020-02-05 08:54:42 +0200867__weak int clear_bss(void)
868{
869 return 0;
870}
871
Simon Glass45aec8e2024-08-07 16:47:34 -0600872static int initf_upl(void)
873{
874 struct upl *upl;
875 int ret;
876
877 if (!IS_ENABLED(CONFIG_UPL_IN) || !(gd->flags & GD_FLG_UPL))
878 return 0;
879
880 upl = malloc(sizeof(struct upl));
881 if (upl)
882 ret = upl_read_handoff(upl, oftree_default());
883 if (ret) {
884 printf("UPL handoff: read failure (err=%dE)\n", ret);
885 return ret;
886 }
887 gd_set_upl(upl);
888
889 return 0;
890}
891
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200892static void initcall_run_f(void)
893{
894 /*
895 * Please do not add logic to this function (variables, if (), etc.).
896 * For simplicity it should remain an ordered list of function calls.
897 */
898 INITCALL(setup_mon_len);
899#if CONFIG_IS_ENABLED(OF_CONTROL)
900 INITCALL(fdtdec_setup);
Simon Glass26b78b22015-02-27 22:06:34 -0700901#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200902#if CONFIG_IS_ENABLED(TRACE_EARLY)
903 INITCALL(trace_early_init);
Kevin Hilman676f0192014-12-09 15:03:58 -0800904#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200905 INITCALL(initf_malloc);
906 INITCALL(initf_upl);
907 INITCALL(log_init);
908 INITCALL(initf_bootstage); /* uses its own timer, so does not need DM */
909 INITCALL(event_init);
910 INITCALL(bloblist_maybe_init);
911 INITCALL(setup_spl_handoff);
912#if CONFIG_IS_ENABLED(CONSOLE_RECORD_INIT_F)
913 INITCALL(console_record_init);
Ovidiu Panait85a31ac2020-11-28 10:43:04 +0200914#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200915 INITCALL_EVT(EVT_FSP_INIT_F);
916 INITCALL(arch_cpu_init); /* basic arch cpu dependent setup */
917 INITCALL(mach_cpu_init); /* SoC/machine dependent CPU setup */
918 INITCALL(initf_dm);
919#if CONFIG_IS_ENABLED(BOARD_EARLY_INIT_F)
920 INITCALL(board_early_init_f);
Simon Glassc45e3592013-03-11 06:49:53 +0000921#endif
Simon Glass6829d8c2017-03-28 10:27:26 -0600922#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glass70064a72017-03-28 10:27:19 -0600923 /* get CPU and bus clocks according to the environment variable */
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200924 INITCALL(get_clocks); /* get CPU and bus clocks (etc.) */
Simon Glasse8d20d42017-03-28 10:27:23 -0600925#endif
Marek Vasut4c77f062023-03-23 01:20:40 +0100926#if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200927 INITCALL(timer_init); /* initialize timer */
Angelo Dureghellocd226852017-05-10 23:58:06 +0200928#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200929#if CONFIG_IS_ENABLED(BOARD_POSTCLK_INIT)
930 INITCALL(board_postclk_init);
Simon Glass50250b52013-03-11 14:30:42 +0000931#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200932 INITCALL(env_init); /* initialize environment */
933 INITCALL(init_baud_rate); /* initialze baudrate settings */
934 INITCALL(serial_init); /* serial communications setup */
935 INITCALL(console_init_f); /* stage 1 init of console */
936 INITCALL(display_options); /* say that we are here */
937 INITCALL(display_text_info); /* show debugging info if required */
938 INITCALL(checkcpu);
939#if CONFIG_IS_ENABLED(SYSRESET)
940 INITCALL(print_resetinfo);
Mario Six4481a5d2018-08-06 10:23:34 +0200941#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200942 /* display cpu info (and speed) */
943#if CONFIG_IS_ENABLED(DISPLAY_CPUINFO)
944 INITCALL(print_cpuinfo);
Simon Glass68c1d012017-01-23 13:31:25 -0700945#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200946#if CONFIG_IS_ENABLED(DTB_RESELECT)
947 INITCALL(embedded_dtb_select);
Cooper Jr., Franklind8b354a2017-06-16 17:25:12 -0500948#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200949#if CONFIG_IS_ENABLED(DISPLAY_BOARDINFO)
950 INITCALL(show_board_info);
Simon Glassc45e3592013-03-11 06:49:53 +0000951#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200952 WATCHDOG_INIT();
953 INITCALL_EVT(EVT_MISC_INIT_F);
954 WATCHDOG_RESET();
Tom Rini52b2e262021-08-18 23:12:24 -0400955#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200956 INITCALL(init_func_i2c);
Simon Glass50250b52013-03-11 14:30:42 +0000957#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200958 INITCALL(announce_dram_init);
959 INITCALL(dram_init); /* configure available RAM banks */
960#if CONFIG_IS_ENABLED(POST)
961 INITCALL(post_init_f);
Simon Glass50250b52013-03-11 14:30:42 +0000962#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200963 WATCHDOG_RESET();
Tom Rini6a5dccc2022-11-16 13:10:41 -0500964#if defined(CFG_SYS_DRAM_TEST)
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200965 INITCALL(testdram);
Tom Rini6a5dccc2022-11-16 13:10:41 -0500966#endif /* CFG_SYS_DRAM_TEST */
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200967 WATCHDOG_RESET();
968#if CONFIG_IS_ENABLED(POST)
969 INITCALL(init_post);
Simon Glassc45e3592013-03-11 06:49:53 +0000970#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200971 WATCHDOG_RESET();
Simon Glassc45e3592013-03-11 06:49:53 +0000972 /*
973 * Now that we have DRAM mapped and working, we can
974 * relocate the code and continue running from DRAM.
975 *
976 * Reserve memory at end of RAM for (top down in that order):
977 * - area that won't get touched by U-Boot and Linux (optional)
978 * - kernel log buffer
979 * - protected RAM
980 * - LCD framebuffer
981 * - monitor code
982 * - board info struct
983 */
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200984 INITCALL(setup_dest_addr);
985#if CONFIG_IS_ENABLED(OF_BOARD_FIXUP) && \
986 !CONFIG_IS_ENABLED(OF_INITIAL_DTB_READONLY)
987 INITCALL(fix_fdt);
Pragnesh Patelad51fec2020-08-13 10:12:26 +0530988#endif
Tom Rini0bb9b092022-12-04 10:13:37 -0500989#ifdef CFG_PRAM
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200990 INITCALL(reserve_pram);
Simon Glassc45e3592013-03-11 06:49:53 +0000991#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +0200992 INITCALL(reserve_round_4k);
993 INITCALL(setup_relocaddr_from_bloblist);
994 INITCALL(arch_reserve_mmu);
995 INITCALL(reserve_video);
996 INITCALL(reserve_trace);
997 INITCALL(reserve_uboot);
998 INITCALL(reserve_malloc);
999 INITCALL(reserve_board);
1000 INITCALL(reserve_global_data);
1001 INITCALL(reserve_fdt);
1002#if CONFIG_IS_ENABLED(OF_BOARD_FIXUP) && \
1003 CONFIG_IS_ENABLED(OF_INITIAL_DTB_READONLY)
1004 INITCALL(reloc_fdt);
1005 INITCALL(fix_fdt);
Pali Rohár64a15c82024-06-06 18:33:21 +02001006#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001007 INITCALL(reserve_bootstage);
1008 INITCALL(reserve_bloblist);
1009 INITCALL(reserve_arch);
1010 INITCALL(reserve_stacks);
1011 INITCALL(dram_init_banksize);
1012 INITCALL(show_dram_config);
1013 WATCHDOG_RESET();
1014 INITCALL(setup_bdinfo);
1015 INITCALL(display_new_sp);
1016 WATCHDOG_RESET();
1017#if !CONFIG_IS_ENABLED(OF_BOARD_FIXUP) || \
1018 !CONFIG_IS_ENABLED(INITIAL_DTB_READONLY)
1019 INITCALL(reloc_fdt);
Pali Rohár64a15c82024-06-06 18:33:21 +02001020#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001021 INITCALL(reloc_bootstage);
1022 INITCALL(reloc_bloblist);
1023 INITCALL(setup_reloc);
1024#if CONFIG_IS_ENABLED(X86) || CONFIG_IS_ENABLED(ARC)
1025 INITCALL(copy_uboot_to_ram);
1026 INITCALL(do_elf_reloc_fixups);
Simon Glassd50b2f42015-01-01 16:18:09 -07001027#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001028 INITCALL(clear_bss);
Rasmus Villemoesc794e492022-10-28 13:50:54 +02001029 /*
1030 * Deregister all cyclic functions before relocation, so that
1031 * gd->cyclic_list does not contain any references to pre-relocation
1032 * devices. Drivers will register their cyclic functions anew when the
1033 * devices are probed again.
1034 *
1035 * This should happen as late as possible so that the window where a
1036 * watchdog device is not serviced is as small as possible.
1037 */
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001038 INITCALL(cyclic_unregister_all);
1039#if !CONFIG_IS_ENABLED(ARM) && !CONFIG_IS_ENABLED(SANDBOX)
1040 INITCALL(jump_to_copy);
Simon Glassc45e3592013-03-11 06:49:53 +00001041#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001042}
Simon Glassc45e3592013-03-11 06:49:53 +00001043
1044void board_init_f(ulong boot_flags)
1045{
Simon Glass7f67b372024-08-21 10:19:09 -06001046 struct board_f boardf;
1047
Simon Glassc45e3592013-03-11 06:49:53 +00001048 gd->flags = boot_flags;
Simon Glassd4b0fdb2024-08-21 10:19:04 -06001049 gd->flags &= ~GD_FLG_HAVE_CONSOLE;
Simon Glass7f67b372024-08-21 10:19:09 -06001050 gd->boardf = &boardf;
Simon Glassc45e3592013-03-11 06:49:53 +00001051
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001052 initcall_run_f();
Simon Glassc45e3592013-03-11 06:49:53 +00001053
Ben Stoltz1930e8d2015-07-31 09:31:37 -06001054#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Alexey Brodkinc157ab92015-12-16 19:24:10 +03001055 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
1056 !defined(CONFIG_ARC)
Simon Glassc45e3592013-03-11 06:49:53 +00001057 /* NOTREACHED - jump_to_copy() does not return */
1058 hang();
1059#endif
1060}
Simon Glass6d179872013-03-05 14:39:52 +00001061
Alexey Brodkin913e9f02015-02-24 19:40:36 +03001062#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass6d179872013-03-05 14:39:52 +00001063/*
1064 * For now this code is only used on x86.
1065 *
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001066 * Run init functions which are run when U-Boot is executing from Flash with a
1067 * semi-limited 'C' environment.
Simon Glass6d179872013-03-05 14:39:52 +00001068 * The following limitations must be considered when implementing an
1069 * '_f_r' function:
1070 * - 'static' variables are read-only
1071 * - Global Data (gd->xxx) is read/write
1072 *
1073 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1074 * supported). It _should_, if possible, copy global data to RAM and
1075 * initialise the CPU caches (to speed up the relocation process)
1076 *
1077 * NOTE: At present only x86 uses this route, but it is intended that
1078 * all archs will move to this when generic relocation is implemented.
1079 */
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001080static void initcall_run_f_r(void)
1081{
Simon Glass4cf8e1a2025-06-04 07:09:02 -06001082#if !CONFIG_IS_ENABLED(X86_64)
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001083 INITCALL(init_cache_f_r);
Simon Glass6e1a81a2017-01-16 07:03:49 -07001084#endif
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001085}
Simon Glass6d179872013-03-05 14:39:52 +00001086
1087void board_init_f_r(void)
1088{
Jerome Forissier1fd58d42025-04-04 15:50:36 +02001089 initcall_run_f_r();
Simon Glass6d179872013-03-05 14:39:52 +00001090
1091 /*
Simon Glass51f73f12016-03-11 22:06:51 -07001092 * The pre-relocation drivers may be using memory that has now gone
1093 * away. Mark serial as unavailable - this will fall back to the debug
1094 * UART if available.
Simon Glass55e32ba2017-12-04 13:48:28 -07001095 *
1096 * Do the same with log drivers since the memory may not be available.
Simon Glass51f73f12016-03-11 22:06:51 -07001097 */
Simon Glass55e32ba2017-12-04 13:48:28 -07001098 gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
Simon Glassb77fe1f2017-09-05 19:49:45 -06001099#ifdef CONFIG_TIMER
1100 gd->timer = NULL;
1101#endif
Simon Glass51f73f12016-03-11 22:06:51 -07001102
1103 /*
Simon Glass6d179872013-03-05 14:39:52 +00001104 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1105 * Transfer execution from Flash to RAM by calculating the address
1106 * of the in-RAM copy of board_init_r() and calling it
1107 */
Alexey Brodkin9c832f12015-02-25 17:59:02 +03001108 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass6d179872013-03-05 14:39:52 +00001109
1110 /* NOTREACHED - board_init_r() does not return */
1111 hang();
1112}
Alexey Brodkin73503182015-03-24 11:12:47 +03001113#endif /* CONFIG_X86 */