blob: c383e82a6be6d02725e37b933010aa15120c7329 [file] [log] [blame]
Stefan Roese65da15e2018-09-05 15:12:35 +02001menu "MediaTek MIPS platforms"
developer89f051b2019-04-30 11:13:58 +08002 depends on ARCH_MTMIPS
Stefan Roese65da15e2018-09-05 15:12:35 +02003
4config SYS_MALLOC_F_LEN
5 default 0x1000
6
7config SYS_SOC
developer89f051b2019-04-30 11:13:58 +08008 default "mt7628" if SOC_MT7628
Stefan Roese65da15e2018-09-05 15:12:35 +02009
developer26f763e2020-04-21 09:28:26 +020010config SYS_DCACHE_SIZE
11 default 32768
12
13config SYS_DCACHE_LINE_SIZE
14 default 32
15
16config SYS_ICACHE_SIZE
17 default 65536
18
19config SYS_ICACHE_LINE_SIZE
20 default 32
21
developer29b37c52020-04-21 09:28:34 +020022config SYS_TEXT_BASE
developer19d572e2020-04-21 09:28:47 +020023 default 0x9c000000 if !SPL
24 default 0x80200000 if SPL
25
26config SPL_TEXT_BASE
developer29b37c52020-04-21 09:28:34 +020027 default 0x9c000000
28
developer19d572e2020-04-21 09:28:47 +020029config SPL_PAYLOAD
30 default "u-boot-lzma.img" if SPL_LZMA
31
32config BUILD_TARGET
33 default "u-boot-with-spl.bin" if SPL
34
Stefan Roese65da15e2018-09-05 15:12:35 +020035choice
36 prompt "MediaTek MIPS SoC select"
37
developer89f051b2019-04-30 11:13:58 +080038config SOC_MT7628
39 bool "MT7628"
Stefan Roese65da15e2018-09-05 15:12:35 +020040 select MIPS_L1_CACHE_SHIFT_5
developer29b37c52020-04-21 09:28:34 +020041 select MIPS_INIT_STACK_IN_SRAM
42 select MIPS_SRAM_INIT
43 select SYS_MIPS_CACHE_INIT_RAM_LOAD
developer591826e2019-09-25 17:45:43 +080044 select PINCTRL_MT7628
45 select MTK_SERIAL
developer93f74002020-11-12 16:35:28 +080046 select SYSRESET
developer3b3015f2020-04-21 09:28:30 +020047 select SYSRESET_RESETCTL
developer19d572e2020-04-21 09:28:47 +020048 select SPL_SEPARATE_BSS if SPL
49 select SPL_INIT_STACK_WITHOUT_MALLOC_F if SPL
50 select SPL_LOADER_SUPPORT if SPL
51 select SPL_OF_CONTROL if SPL_DM
52 select SPL_SIMPLE_BUS if SPL_DM
53 select SPL_DM_SERIAL if SPL_DM
54 select SPL_CLK if SPL_DM && SPL_SERIAL_SUPPORT
55 select SPL_SYSRESET if SPL_DM
56 select SPL_OF_LIBFDT if SPL_OF_CONTROL
Stefan Roese65da15e2018-09-05 15:12:35 +020057 help
developer89f051b2019-04-30 11:13:58 +080058 This supports MediaTek MT7628/MT7688.
Stefan Roese65da15e2018-09-05 15:12:35 +020059
60endchoice
61
developer37e34ba2020-11-12 16:35:23 +080062source "arch/mips/mach-mtmips/mt7628/Kconfig"
Stefan Roese2052a932018-08-16 15:27:30 +020063
Stefan Roese65da15e2018-09-05 15:12:35 +020064endmenu