Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 1 | menu "MediaTek MIPS platforms" |
developer | 89f051b | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 2 | depends on ARCH_MTMIPS |
Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 3 | |
| 4 | config SYS_MALLOC_F_LEN |
| 5 | default 0x1000 |
| 6 | |
| 7 | config SYS_SOC |
developer | 89f051b | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 8 | default "mt7628" if SOC_MT7628 |
Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 9 | |
developer | 26f763e | 2020-04-21 09:28:26 +0200 | [diff] [blame] | 10 | config SYS_DCACHE_SIZE |
| 11 | default 32768 |
| 12 | |
| 13 | config SYS_DCACHE_LINE_SIZE |
| 14 | default 32 |
| 15 | |
| 16 | config SYS_ICACHE_SIZE |
| 17 | default 65536 |
| 18 | |
| 19 | config SYS_ICACHE_LINE_SIZE |
| 20 | default 32 |
| 21 | |
Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 22 | choice |
| 23 | prompt "MediaTek MIPS SoC select" |
| 24 | |
developer | 89f051b | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 25 | config SOC_MT7628 |
| 26 | bool "MT7628" |
Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 27 | select MIPS_L1_CACHE_SHIFT_5 |
developer | 591826e | 2019-09-25 17:45:43 +0800 | [diff] [blame] | 28 | select PINCTRL_MT7628 |
| 29 | select MTK_SERIAL |
developer | 3b3015f | 2020-04-21 09:28:30 +0200 | [diff] [blame^] | 30 | select SYSRESET_RESETCTL |
Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 31 | help |
developer | 89f051b | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 32 | This supports MediaTek MT7628/MT7688. |
Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 33 | |
| 34 | endchoice |
| 35 | |
| 36 | choice |
| 37 | prompt "Board select" |
| 38 | |
Stefan Roese | 115802d | 2018-08-16 15:27:31 +0200 | [diff] [blame] | 39 | config BOARD_GARDENA_SMART_GATEWAY_MT7688 |
Stefan Roese | f08cc08 | 2019-03-15 09:09:34 +0100 | [diff] [blame] | 40 | bool "GARDENA smart Gateway" |
developer | 89f051b | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 41 | depends on SOC_MT7628 |
Stefan Roese | d0fdd67 | 2018-10-09 08:59:13 +0200 | [diff] [blame] | 42 | select BOARD_LATE_INIT |
Stefan Roese | 115802d | 2018-08-16 15:27:31 +0200 | [diff] [blame] | 43 | select SUPPORTS_BOOT_RAM |
| 44 | help |
Stefan Roese | f08cc08 | 2019-03-15 09:09:34 +0100 | [diff] [blame] | 45 | GARDENA smart Gateway boards have a MT7688 SoC with 128 MiB of RAM |
Stefan Roese | 115802d | 2018-08-16 15:27:31 +0200 | [diff] [blame] | 46 | and 8 MiB of flash (SPI NOR) and additional SPI NAND storage. |
| 47 | |
Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 48 | config BOARD_LINKIT_SMART_7688 |
| 49 | bool "LinkIt Smart 7688" |
developer | 89f051b | 2019-04-30 11:13:58 +0800 | [diff] [blame] | 50 | depends on SOC_MT7628 |
Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 51 | select SUPPORTS_BOOT_RAM |
| 52 | help |
| 53 | Seeed LinkIt Smart 7688 boards have a MT7688 SoC with 128 MiB of RAM |
| 54 | and 32 MiB of flash (SPI). |
| 55 | Between its different peripherals there's an integrated switch with 4 |
| 56 | ethernet ports, 1 USB port, 1 UART, GPIO buttons and LEDs, and |
| 57 | a MT7688 (PCIe). |
| 58 | |
Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 59 | endchoice |
| 60 | |
| 61 | choice |
| 62 | prompt "Boot mode" |
| 63 | |
| 64 | config BOOT_RAM |
| 65 | bool "RAM boot" |
| 66 | depends on SUPPORTS_BOOT_RAM |
| 67 | help |
| 68 | This builds an image that is linked to a RAM address. It can be used |
| 69 | for booting from CFE via TFTP using an ELF image, but it can also be |
| 70 | booted from RAM by other bootloaders using a BIN image. |
| 71 | |
| 72 | config BOOT_ROM |
| 73 | bool "ROM boot" |
| 74 | depends on SUPPORTS_BOOT_RAM |
| 75 | help |
| 76 | This builds an image that is linked to a ROM address. It can be |
| 77 | used as main bootloader image which is programmed onto the onboard |
| 78 | flash storage (SPI NOR). |
| 79 | |
| 80 | endchoice |
| 81 | |
| 82 | choice |
| 83 | prompt "DDR2 size" |
| 84 | |
| 85 | config ONBOARD_DDR2_SIZE_256MBIT |
| 86 | bool "256MBit (32MByte) total size" |
| 87 | depends on BOOT_ROM |
| 88 | help |
| 89 | Use 256MBit (32MByte) of DDR total size |
| 90 | |
| 91 | config ONBOARD_DDR2_SIZE_512MBIT |
| 92 | bool "512MBit (64MByte) total size" |
| 93 | depends on BOOT_ROM |
| 94 | help |
| 95 | Use 512MBit (64MByte) of DDR total size |
| 96 | |
| 97 | config ONBOARD_DDR2_SIZE_1024MBIT |
| 98 | bool "1024MBit (128MByte) total size" |
| 99 | depends on BOOT_ROM |
| 100 | help |
| 101 | Use 1024MBit (128MByte) of DDR total size |
| 102 | |
| 103 | config ONBOARD_DDR2_SIZE_2048MBIT |
| 104 | bool "2048MBit (256MByte) total size" |
| 105 | depends on BOOT_ROM |
| 106 | help |
| 107 | Use 2048MBit (256MByte) of DDR total size |
| 108 | |
| 109 | endchoice |
| 110 | |
| 111 | choice |
| 112 | prompt "DDR2 chip width" |
| 113 | |
| 114 | config ONBOARD_DDR2_CHIP_WIDTH_8BIT |
| 115 | bool "8bit DDR chip width" |
| 116 | depends on BOOT_ROM |
| 117 | help |
| 118 | Use DDR chips with 8bit width |
| 119 | |
| 120 | config ONBOARD_DDR2_CHIP_WIDTH_16BIT |
| 121 | bool "16bit DDR chip width" |
| 122 | depends on BOOT_ROM |
| 123 | help |
| 124 | Use DDR chips with 16bit width |
| 125 | |
| 126 | endchoice |
| 127 | |
| 128 | choice |
| 129 | prompt "DDR2 bus width" |
| 130 | |
| 131 | config ONBOARD_DDR2_BUS_WIDTH_16BIT |
| 132 | bool "16bit DDR bus width" |
| 133 | depends on BOOT_ROM |
| 134 | help |
| 135 | Use 16bit DDR bus width |
| 136 | |
| 137 | config ONBOARD_DDR2_BUS_WIDTH_32BIT |
| 138 | bool "32bit DDR bus width" |
| 139 | depends on BOOT_ROM |
| 140 | help |
| 141 | Use 32bit DDR bus width |
| 142 | |
| 143 | endchoice |
| 144 | |
| 145 | config SUPPORTS_BOOT_RAM |
| 146 | bool |
| 147 | |
Stefan Roese | 115802d | 2018-08-16 15:27:31 +0200 | [diff] [blame] | 148 | source "board/gardena/smart-gateway-mt7688/Kconfig" |
Stefan Roese | 2052a93 | 2018-08-16 15:27:30 +0200 | [diff] [blame] | 149 | source "board/seeed/linkit-smart-7688/Kconfig" |
| 150 | |
Stefan Roese | 65da15e | 2018-09-05 15:12:35 +0200 | [diff] [blame] | 151 | endmenu |