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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +02002/*
3 * Copyright (C) 2004-2006 Atmel Corporation
4 *
Andreas Bießmannfb378682010-09-03 10:28:05 +02005 * Modified to support C structur SoC access by
6 * Andreas Bießmann <biessmann@corscience.de>
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +02007 */
8#include <common.h>
Wenyou Yang7c56e102017-04-14 15:01:28 +08009#include <clk.h>
Simon Glass7cbab242014-10-29 13:09:00 -060010#include <dm.h>
11#include <errno.h>
Jean-Christophe PLAGNIOL-VILLARDd5ee38e2009-03-27 23:26:42 +010012#include <watchdog.h>
Marek Vasutff093ed2012-09-13 16:50:30 +020013#include <serial.h>
Wenyou Yang6b611e62016-10-17 09:49:55 +080014#include <debug_uart.h>
Marek Vasutff093ed2012-09-13 16:50:30 +020015#include <linux/compiler.h>
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020016
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020017#include <asm/io.h>
Simon Glass7cbab242014-10-29 13:09:00 -060018#ifdef CONFIG_DM_SERIAL
19#include <asm/arch/atmel_serial.h>
20#endif
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010021#include <asm/arch/clk.h>
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010022#include <asm/arch/hardware.h>
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020023
24#include "atmel_usart.h"
25
26DECLARE_GLOBAL_DATA_PTR;
27
Wenyou Yangb045a602017-04-14 15:01:27 +080028#ifndef CONFIG_DM_SERIAL
Simon Glass1e5c2a82014-10-29 13:08:59 -060029static void atmel_serial_setbrg_internal(atmel_usart3_t *usart, int id,
30 int baudrate)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020031{
32 unsigned long divisor;
33 unsigned long usart_hz;
34
35 /*
36 * Master Clock
37 * Baud Rate = --------------
38 * 16 * CD
39 */
Simon Glass1e5c2a82014-10-29 13:08:59 -060040 usart_hz = get_usart_clk_rate(id);
41 divisor = (usart_hz / 16 + baudrate / 2) / baudrate;
Andreas Bießmannfb378682010-09-03 10:28:05 +020042 writel(USART3_BF(CD, divisor), &usart->brgr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020043}
44
Simon Glass1e5c2a82014-10-29 13:08:59 -060045static void atmel_serial_init_internal(atmel_usart3_t *usart)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020046{
Xu, Hong9db57992011-08-02 01:05:04 +000047 /*
48 * Just in case: drain transmitter register
49 * 1000us is enough for baudrate >= 9600
50 */
51 if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
52 __udelay(1000);
53
Andreas Bießmannfb378682010-09-03 10:28:05 +020054 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
Simon Glass1e5c2a82014-10-29 13:08:59 -060055}
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020056
Simon Glass1e5c2a82014-10-29 13:08:59 -060057static void atmel_serial_activate(atmel_usart3_t *usart)
58{
Andreas Bießmannfb378682010-09-03 10:28:05 +020059 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010060 | USART3_BF(USCLKS, USART3_USCLKS_MCK)
61 | USART3_BF(CHRL, USART3_CHRL_8)
62 | USART3_BF(PAR, USART3_PAR_NONE)
Andreas Bießmannfb378682010-09-03 10:28:05 +020063 | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
64 &usart->mr);
Xu, Hong9db57992011-08-02 01:05:04 +000065 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
66 /* 100us is enough for the new settings to be settled */
67 __udelay(100);
Simon Glass1e5c2a82014-10-29 13:08:59 -060068}
69
70static void atmel_serial_setbrg(void)
71{
72 atmel_serial_setbrg_internal((atmel_usart3_t *)CONFIG_USART_BASE,
73 CONFIG_USART_ID, gd->baudrate);
74}
75
76static int atmel_serial_init(void)
77{
78 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
79
80 atmel_serial_init_internal(usart);
81 serial_setbrg();
82 atmel_serial_activate(usart);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020083
84 return 0;
85}
86
Marek Vasutff093ed2012-09-13 16:50:30 +020087static void atmel_serial_putc(char c)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020088{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010089 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +020090
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020091 if (c == '\n')
92 serial_putc('\r');
93
Andreas Bießmannfb378682010-09-03 10:28:05 +020094 while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
95 writel(c, &usart->thr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020096}
97
Marek Vasutff093ed2012-09-13 16:50:30 +020098static int atmel_serial_getc(void)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020099{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +0100100 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +0200101
102 while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
Jean-Christophe PLAGNIOL-VILLARDd5ee38e2009-03-27 23:26:42 +0100103 WATCHDOG_RESET();
Andreas Bießmannfb378682010-09-03 10:28:05 +0200104 return readl(&usart->rhr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +0200105}
106
Marek Vasutff093ed2012-09-13 16:50:30 +0200107static int atmel_serial_tstc(void)
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +0200108{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +0100109 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +0200110 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +0200111}
Marek Vasutff093ed2012-09-13 16:50:30 +0200112
Marek Vasutff093ed2012-09-13 16:50:30 +0200113static struct serial_device atmel_serial_drv = {
114 .name = "atmel_serial",
115 .start = atmel_serial_init,
116 .stop = NULL,
117 .setbrg = atmel_serial_setbrg,
118 .putc = atmel_serial_putc,
Marek Vasutd9c64492012-10-06 14:07:02 +0000119 .puts = default_serial_puts,
Marek Vasutff093ed2012-09-13 16:50:30 +0200120 .getc = atmel_serial_getc,
121 .tstc = atmel_serial_tstc,
122};
123
124void atmel_serial_initialize(void)
125{
126 serial_register(&atmel_serial_drv);
127}
128
129__weak struct serial_device *default_serial_console(void)
130{
131 return &atmel_serial_drv;
132}
Simon Glass7cbab242014-10-29 13:09:00 -0600133#endif
134
135#ifdef CONFIG_DM_SERIAL
Wenyou Yang7c56e102017-04-14 15:01:28 +0800136enum serial_clk_type {
137 CLK_TYPE_NORMAL = 0,
138 CLK_TYPE_DBGU,
139};
Simon Glass7cbab242014-10-29 13:09:00 -0600140
141struct atmel_serial_priv {
142 atmel_usart3_t *usart;
Wenyou Yang7c56e102017-04-14 15:01:28 +0800143 ulong usart_clk_rate;
Simon Glass7cbab242014-10-29 13:09:00 -0600144};
145
Wenyou Yangb045a602017-04-14 15:01:27 +0800146static void _atmel_serial_set_brg(atmel_usart3_t *usart,
147 ulong usart_clk_rate, int baudrate)
148{
149 unsigned long divisor;
150
151 divisor = (usart_clk_rate / 16 + baudrate / 2) / baudrate;
152 writel(USART3_BF(CD, divisor), &usart->brgr);
153}
154
155void _atmel_serial_init(atmel_usart3_t *usart,
156 ulong usart_clk_rate, int baudrate)
157{
158 writel(USART3_BIT(RXDIS) | USART3_BIT(TXDIS), &usart->cr);
159
160 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL) |
161 USART3_BF(USCLKS, USART3_USCLKS_MCK) |
162 USART3_BF(CHRL, USART3_CHRL_8) |
163 USART3_BF(PAR, USART3_PAR_NONE) |
164 USART3_BF(NBSTOP, USART3_NBSTOP_1)), &usart->mr);
165
166 _atmel_serial_set_brg(usart, usart_clk_rate, baudrate);
167
168 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
169 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
170}
171
Simon Glass7cbab242014-10-29 13:09:00 -0600172int atmel_serial_setbrg(struct udevice *dev, int baudrate)
173{
174 struct atmel_serial_priv *priv = dev_get_priv(dev);
175
Wenyou Yang7c56e102017-04-14 15:01:28 +0800176 _atmel_serial_set_brg(priv->usart, priv->usart_clk_rate, baudrate);
Simon Glass7cbab242014-10-29 13:09:00 -0600177
178 return 0;
179}
180
181static int atmel_serial_getc(struct udevice *dev)
182{
183 struct atmel_serial_priv *priv = dev_get_priv(dev);
184
185 if (!(readl(&priv->usart->csr) & USART3_BIT(RXRDY)))
186 return -EAGAIN;
187
188 return readl(&priv->usart->rhr);
189}
190
191static int atmel_serial_putc(struct udevice *dev, const char ch)
192{
193 struct atmel_serial_priv *priv = dev_get_priv(dev);
194
195 if (!(readl(&priv->usart->csr) & USART3_BIT(TXRDY)))
196 return -EAGAIN;
197
198 writel(ch, &priv->usart->thr);
199
200 return 0;
201}
202
203static int atmel_serial_pending(struct udevice *dev, bool input)
204{
205 struct atmel_serial_priv *priv = dev_get_priv(dev);
206 uint32_t csr = readl(&priv->usart->csr);
207
208 if (input)
209 return csr & USART3_BIT(RXRDY) ? 1 : 0;
210 else
211 return csr & USART3_BIT(TXEMPTY) ? 0 : 1;
212}
213
214static const struct dm_serial_ops atmel_serial_ops = {
215 .putc = atmel_serial_putc,
216 .pending = atmel_serial_pending,
217 .getc = atmel_serial_getc,
218 .setbrg = atmel_serial_setbrg,
219};
220
Wenyou Yang7c56e102017-04-14 15:01:28 +0800221static int atmel_serial_enable_clk(struct udevice *dev)
222{
223 struct atmel_serial_priv *priv = dev_get_priv(dev);
224 struct clk clk;
225 ulong clk_rate;
226 int ret;
227
228 ret = clk_get_by_index(dev, 0, &clk);
229 if (ret)
230 return -EINVAL;
231
232 if (dev_get_driver_data(dev) == CLK_TYPE_NORMAL) {
233 ret = clk_enable(&clk);
234 if (ret)
235 return ret;
236 }
237
238 clk_rate = clk_get_rate(&clk);
239 if (!clk_rate)
240 return -EINVAL;
241
242 priv->usart_clk_rate = clk_rate;
243
244 clk_free(&clk);
245
246 return 0;
247}
248
Simon Glass7cbab242014-10-29 13:09:00 -0600249static int atmel_serial_probe(struct udevice *dev)
250{
251 struct atmel_serial_platdata *plat = dev->platdata;
252 struct atmel_serial_priv *priv = dev_get_priv(dev);
Wenyou Yang7c56e102017-04-14 15:01:28 +0800253 int ret;
Wenyou Yangb0e59ee2016-06-01 08:36:56 +0800254#if CONFIG_IS_ENABLED(OF_CONTROL)
255 fdt_addr_t addr_base;
Simon Glass7cbab242014-10-29 13:09:00 -0600256
Simon Glassba1dea42017-05-17 17:18:05 -0600257 addr_base = devfdt_get_addr(dev);
Wenyou Yangb0e59ee2016-06-01 08:36:56 +0800258 if (addr_base == FDT_ADDR_T_NONE)
259 return -ENODEV;
260
261 plat->base_addr = (uint32_t)addr_base;
262#endif
Simon Glass7cbab242014-10-29 13:09:00 -0600263 priv->usart = (atmel_usart3_t *)plat->base_addr;
Wenyou Yangb045a602017-04-14 15:01:27 +0800264
Wenyou Yang7c56e102017-04-14 15:01:28 +0800265 ret = atmel_serial_enable_clk(dev);
266 if (ret)
267 return ret;
268
269 _atmel_serial_init(priv->usart, priv->usart_clk_rate, gd->baudrate);
Simon Glass7cbab242014-10-29 13:09:00 -0600270
271 return 0;
272}
273
Wenyou Yangb0e59ee2016-06-01 08:36:56 +0800274#if CONFIG_IS_ENABLED(OF_CONTROL)
275static const struct udevice_id atmel_serial_ids[] = {
Wenyou Yang7c56e102017-04-14 15:01:28 +0800276 {
277 .compatible = "atmel,at91sam9260-dbgu",
278 .data = CLK_TYPE_DBGU,
279 },
280 {
281 .compatible = "atmel,at91sam9260-usart",
282 .data = CLK_TYPE_NORMAL,
283 },
Wenyou Yangb0e59ee2016-06-01 08:36:56 +0800284 { }
285};
286#endif
287
Simon Glass7cbab242014-10-29 13:09:00 -0600288U_BOOT_DRIVER(serial_atmel) = {
289 .name = "serial_atmel",
290 .id = UCLASS_SERIAL,
Wenyou Yangb0e59ee2016-06-01 08:36:56 +0800291#if CONFIG_IS_ENABLED(OF_CONTROL)
292 .of_match = atmel_serial_ids,
293 .platdata_auto_alloc_size = sizeof(struct atmel_serial_platdata),
294#endif
Simon Glass7cbab242014-10-29 13:09:00 -0600295 .probe = atmel_serial_probe,
296 .ops = &atmel_serial_ops,
Bin Mengbdb33d82018-10-24 06:36:36 -0700297#if !CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glass7cbab242014-10-29 13:09:00 -0600298 .flags = DM_FLAG_PRE_RELOC,
Bin Mengbdb33d82018-10-24 06:36:36 -0700299#endif
Simon Glass7cbab242014-10-29 13:09:00 -0600300 .priv_auto_alloc_size = sizeof(struct atmel_serial_priv),
301};
302#endif
Wenyou Yang6b611e62016-10-17 09:49:55 +0800303
304#ifdef CONFIG_DEBUG_UART_ATMEL
305static inline void _debug_uart_init(void)
306{
307 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE;
308
Wenyou Yangb045a602017-04-14 15:01:27 +0800309 _atmel_serial_init(usart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
Wenyou Yang6b611e62016-10-17 09:49:55 +0800310}
311
312static inline void _debug_uart_putc(int ch)
313{
314 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_DEBUG_UART_BASE;
315
316 while (!(readl(&usart->csr) & USART3_BIT(TXRDY)))
317 ;
318
319 writel(ch, &usart->thr);
320}
321
322DEBUG_UART_FUNCS
323#endif