blob: 943ef70fa601f7d4d8093183c9d1a6220a32c0dc [file] [log] [blame]
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +02001/*
2 * Copyright (C) 2004-2006 Atmel Corporation
3 *
Andreas Bießmannfb378682010-09-03 10:28:05 +02004 * Modified to support C structur SoC access by
5 * Andreas Bießmann <biessmann@corscience.de>
6 *
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +02007 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <common.h>
Jean-Christophe PLAGNIOL-VILLARDd5ee38e2009-03-27 23:26:42 +010022#include <watchdog.h>
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020023
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020024#include <asm/io.h>
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010025#include <asm/arch/clk.h>
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010026#include <asm/arch/hardware.h>
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020027
28#include "atmel_usart.h"
29
30DECLARE_GLOBAL_DATA_PTR;
31
32void serial_setbrg(void)
33{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010034 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020035 unsigned long divisor;
36 unsigned long usart_hz;
37
38 /*
39 * Master Clock
40 * Baud Rate = --------------
41 * 16 * CD
42 */
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010043 usart_hz = get_usart_clk_rate(CONFIG_USART_ID);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020044 divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
Andreas Bießmannfb378682010-09-03 10:28:05 +020045 writel(USART3_BF(CD, divisor), &usart->brgr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020046}
47
48int serial_init(void)
49{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010050 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +020051
Xu, Hong9db57992011-08-02 01:05:04 +000052 /*
53 * Just in case: drain transmitter register
54 * 1000us is enough for baudrate >= 9600
55 */
56 if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY)))
57 __udelay(1000);
58
Andreas Bießmannfb378682010-09-03 10:28:05 +020059 writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020060
61 serial_setbrg();
62
Andreas Bießmannfb378682010-09-03 10:28:05 +020063 writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
Haavard Skinnemoen0a2743f2006-11-19 18:06:53 +010064 | USART3_BF(USCLKS, USART3_USCLKS_MCK)
65 | USART3_BF(CHRL, USART3_CHRL_8)
66 | USART3_BF(PAR, USART3_PAR_NONE)
Andreas Bießmannfb378682010-09-03 10:28:05 +020067 | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
68 &usart->mr);
Xu, Hong9db57992011-08-02 01:05:04 +000069 writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr);
70 /* 100us is enough for the new settings to be settled */
71 __udelay(100);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020072
73 return 0;
74}
75
76void serial_putc(char c)
77{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010078 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +020079
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020080 if (c == '\n')
81 serial_putc('\r');
82
Andreas Bießmannfb378682010-09-03 10:28:05 +020083 while (!(readl(&usart->csr) & USART3_BIT(TXRDY)));
84 writel(c, &usart->thr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +020085}
86
87void serial_puts(const char *s)
88{
89 while (*s)
90 serial_putc(*s++);
91}
92
93int serial_getc(void)
94{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +010095 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +020096
97 while (!(readl(&usart->csr) & USART3_BIT(RXRDY)))
Jean-Christophe PLAGNIOL-VILLARDd5ee38e2009-03-27 23:26:42 +010098 WATCHDOG_RESET();
Andreas Bießmannfb378682010-09-03 10:28:05 +020099 return readl(&usart->rhr);
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +0200100}
101
102int serial_tstc(void)
103{
Reinhard Meyer7f619cb2010-11-03 16:32:56 +0100104 atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
Andreas Bießmannfb378682010-09-03 10:28:05 +0200105 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0;
Wolfgang Denk5e1d9ec2006-10-24 14:31:24 +0200106}