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Lokesh Vutla9bdec002018-08-27 15:57:08 +05301if ARCH_K3
2
3choice
4 prompt "Texas Instruments' K3 based SoC select"
5 optional
6
Andrew Davis1be5e972022-07-15 10:25:27 -05007config SOC_K3_AM654
8 bool "TI's K3 based AM654 SoC Family Support"
Lokesh Vutla32886442018-08-27 15:57:09 +05309
Lokesh Vutlaa2285322019-06-13 10:29:42 +053010config SOC_K3_J721E
11 bool "TI's K3 based J721E SoC Family Support"
12
David Huang61098202022-01-25 20:56:31 +053013config SOC_K3_J721S2
14 bool "TI's K3 based J721S2 SoC Family Support"
15
Dave Gerlach96571ec2021-04-23 11:27:32 -050016config SOC_K3_AM642
17 bool "TI's K3 based AM642 SoC Family Support"
18
Suman Anna27fa4122022-05-25 13:38:42 +053019config SOC_K3_AM625
20 bool "TI's K3 based AM625 SoC Family Support"
21
Bryan Brattlofdaa39a62022-11-03 19:13:55 -050022config SOC_K3_AM62A7
23 bool "TI's K3 based AM62A7 SoC Family Support"
24
Lokesh Vutla9bdec002018-08-27 15:57:08 +053025endchoice
26
Nishanth Menon27ee03c2023-11-04 02:21:44 -050027if SOC_K3_J721E
28config SOC_K3_J721E_J7200
29 bool "TI's K3 based J7200 SoC variant Family Support"
30endif
31
Lokesh Vutla9bdec002018-08-27 15:57:08 +053032config SYS_SOC
33 default "k3"
34
Lokesh Vutla32886442018-08-27 15:57:09 +053035config SYS_K3_NON_SECURE_MSRAM_SIZE
36 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050037 default 0x80000 if SOC_K3_AM654
David Huang61098202022-01-25 20:56:31 +053038 default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2
Dave Gerlach96571ec2021-04-23 11:27:32 -050039 default 0x1c0000 if SOC_K3_AM642
Bryan Brattlofdaa39a62022-11-03 19:13:55 -050040 default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
Lokesh Vutla32886442018-08-27 15:57:09 +053041 help
Dave Gerlach96571ec2021-04-23 11:27:32 -050042 Describes the total size of the MCU or OCMC MSRAM present on
43 the SoC in use. This doesn't specify the total size of SPL as
44 ROM can use some part of this RAM. Once ROM gives control to
45 SPL then this complete size can be usable.
Lokesh Vutla32886442018-08-27 15:57:09 +053046
47config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
48 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050049 default 0x58000 if SOC_K3_AM654
David Huang61098202022-01-25 20:56:31 +053050 default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2
Dave Gerlach96571ec2021-04-23 11:27:32 -050051 default 0x180000 if SOC_K3_AM642
Bryan Brattlofdaa39a62022-11-03 19:13:55 -050052 default 0x38000 if SOC_K3_AM625 || SOC_K3_AM62A7
Lokesh Vutla32886442018-08-27 15:57:09 +053053 help
54 Describes the maximum size of the image that ROM can download
55 from any boot media.
56
57config SYS_K3_MCU_SCRATCHPAD_BASE
58 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050059 default 0x40280000 if SOC_K3_AM654
Manorit Chawdhry282095b2023-07-14 11:22:25 +053060 default 0x41cff9fc if SOC_K3_J721S2
Manorit Chawdhryc4188b92023-05-16 10:24:36 +053061 default 0x41cff9fc if SOC_K3_J721E
Lokesh Vutla32886442018-08-27 15:57:09 +053062 help
63 Describes the base address of MCU Scratchpad RAM.
64
65config SYS_K3_MCU_SCRATCHPAD_SIZE
66 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050067 default 0x200 if SOC_K3_AM654
David Huang61098202022-01-25 20:56:31 +053068 default 0x200 if SOC_K3_J721E || SOC_K3_J721S2
Lokesh Vutla32886442018-08-27 15:57:09 +053069 help
70 Describes the size of MCU Scratchpad RAM.
71
Lokesh Vutlac7bfb852018-08-27 15:57:11 +053072config SYS_K3_BOOT_PARAM_TABLE_INDEX
73 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050074 default 0x41c7fbfc if SOC_K3_AM654
Andreas Dannenberg4524b3f2019-06-27 20:03:21 -050075 default 0x41cffbfc if SOC_K3_J721E
David Huang61098202022-01-25 20:56:31 +053076 default 0x41cfdbfc if SOC_K3_J721S2
Dave Gerlach96571ec2021-04-23 11:27:32 -050077 default 0x701bebfc if SOC_K3_AM642
Bryan Brattlofcdea1212022-12-23 19:15:23 -060078 default 0x43c3f290 if SOC_K3_AM625
79 default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
80 default 0x7000f290 if SOC_K3_AM62A7 && ARM64
Lokesh Vutlac7bfb852018-08-27 15:57:11 +053081 help
82 Address at which ROM stores the value which determines if SPL
83 is booted up by primary boot media or secondary boot media.
84
Lokesh Vutla6b6a3942018-11-02 19:51:04 +053085config SYS_K3_KEY
86 string "Key used to generate x509 certificate"
87 help
88 This option enables to provide a custom key that can be used for
89 generating x509 certificate for spl binary. If not needed leave
90 it blank so that a random key is generated and used.
91
92config SYS_K3_BOOT_CORE_ID
93 int
94 default 16
95
Andreas Dannenbergd13ec8c2019-08-15 15:55:28 -050096config K3_EARLY_CONS
97 bool "Activate to allow for an early console during SPL"
98 depends on SPL
99 help
100 Turn this option on to enable an early console functionality in SPL
101 before the main console is being brought up. This can be useful in
102 situations where the main console is dependent on System Firmware
103 (SYSFW) being up and running, which is usually not the case during
104 the very early stages of boot. Using this early console functionality
105 will allow for an alternate serial port to be used to support things
106 like UART-based boot and early diagnostic messages until the main
107 console is ready to get activated.
108
109config K3_EARLY_CONS_IDX
110 depends on K3_EARLY_CONS
111 int "Index of serial device to use for SPL early console"
112 default 1
113 help
114 Use this option to set the index of the serial device to be used
115 for the early console during SPL execution.
116
Lokesh Vutla5d83fd22018-11-02 19:51:05 +0530117config SYS_K3_SPL_ATF
118 bool "Start Cortex-A from SPL"
Andrew Davis05a116d2023-11-14 09:59:49 -0600119 depends on CPU_V7R
Lokesh Vutla5d83fd22018-11-02 19:51:05 +0530120 help
121 Enabling this will try to start Cortex-A (typically with ATF)
122 after SPL from R5.
123
Aswath Govindraju560ea8a2021-06-04 22:00:31 +0530124config K3_ATF_LOAD_ADDR
125 hex "Load address of ATF image"
126 default 0x70000000
127 help
128 The load address for the ATF image. This value defaults to 0x70000000
129 if not provided in the board defconfig file.
130
Tero Kristo18b8c032021-06-11 11:45:03 +0300131config K3_DM_FW
132 bool "Separate DM firmware image"
Andrew Davis05a116d2023-11-14 09:59:49 -0600133 depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
Tero Kristo18b8c032021-06-11 11:45:03 +0300134 default y
135 help
136 Enabling this will indicate that the system has separate DM
137 and TIFS firmware images in place, instead of a single SYSFW
138 firmware. Due to DM being executed on the same core as R5 SPL
139 bootloader, it makes RM and PM services not being available
140 during R5 SPL execution time.
141
Yogesh Siraswar26ebaed2022-07-15 11:38:53 -0500142config K3_X509_SWRV
143 int "SWRV for X509 certificate used for boot images"
144 default 1
145 help
146 SWRV for X509 certificate used for boot images
147
Andrew Davisc6f2a232023-11-14 09:59:50 -0600148if CPU_V7R
149source "arch/arm/mach-k3/r5/Kconfig"
150endif
151
Andrew Davisecfef3c2023-11-01 15:35:26 -0500152source "arch/arm/mach-k3/am65x/Kconfig"
Andrew Davisac35ed32023-11-01 15:35:27 -0500153source "arch/arm/mach-k3/am64x/Kconfig"
Andrew Davis308b6002023-11-01 15:35:28 -0500154source "arch/arm/mach-k3/am62x/Kconfig"
Andrew Davis11ab49e2023-11-01 15:35:29 -0500155source "arch/arm/mach-k3/am62ax/Kconfig"
Andrew Davisec2d8122023-11-01 15:35:25 -0500156source "arch/arm/mach-k3/j721e/Kconfig"
Andrew Davisba38c1b2023-11-01 15:35:30 -0500157source "arch/arm/mach-k3/j721s2/Kconfig"
Andrew Davis308b6002023-11-01 15:35:28 -0500158
Lokesh Vutla9bdec002018-08-27 15:57:08 +0530159endif