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Lokesh Vutla9bdec002018-08-27 15:57:08 +05301if ARCH_K3
2
3choice
4 prompt "Texas Instruments' K3 based SoC select"
5 optional
6
Andrew Davis1be5e972022-07-15 10:25:27 -05007config SOC_K3_AM654
8 bool "TI's K3 based AM654 SoC Family Support"
Lokesh Vutla32886442018-08-27 15:57:09 +05309
Lokesh Vutlaa2285322019-06-13 10:29:42 +053010config SOC_K3_J721E
11 bool "TI's K3 based J721E SoC Family Support"
12
David Huang61098202022-01-25 20:56:31 +053013config SOC_K3_J721S2
14 bool "TI's K3 based J721S2 SoC Family Support"
15
Dave Gerlach96571ec2021-04-23 11:27:32 -050016config SOC_K3_AM642
17 bool "TI's K3 based AM642 SoC Family Support"
18
Suman Anna27fa4122022-05-25 13:38:42 +053019config SOC_K3_AM625
20 bool "TI's K3 based AM625 SoC Family Support"
21
Bryan Brattlofdaa39a62022-11-03 19:13:55 -050022config SOC_K3_AM62A7
23 bool "TI's K3 based AM62A7 SoC Family Support"
24
Lokesh Vutla9bdec002018-08-27 15:57:08 +053025endchoice
26
27config SYS_SOC
28 default "k3"
29
Lokesh Vutla32886442018-08-27 15:57:09 +053030config SYS_K3_NON_SECURE_MSRAM_SIZE
31 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050032 default 0x80000 if SOC_K3_AM654
David Huang61098202022-01-25 20:56:31 +053033 default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2
Dave Gerlach96571ec2021-04-23 11:27:32 -050034 default 0x1c0000 if SOC_K3_AM642
Bryan Brattlofdaa39a62022-11-03 19:13:55 -050035 default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
Lokesh Vutla32886442018-08-27 15:57:09 +053036 help
Dave Gerlach96571ec2021-04-23 11:27:32 -050037 Describes the total size of the MCU or OCMC MSRAM present on
38 the SoC in use. This doesn't specify the total size of SPL as
39 ROM can use some part of this RAM. Once ROM gives control to
40 SPL then this complete size can be usable.
Lokesh Vutla32886442018-08-27 15:57:09 +053041
42config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
43 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050044 default 0x58000 if SOC_K3_AM654
David Huang61098202022-01-25 20:56:31 +053045 default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2
Dave Gerlach96571ec2021-04-23 11:27:32 -050046 default 0x180000 if SOC_K3_AM642
Bryan Brattlofdaa39a62022-11-03 19:13:55 -050047 default 0x38000 if SOC_K3_AM625 || SOC_K3_AM62A7
Lokesh Vutla32886442018-08-27 15:57:09 +053048 help
49 Describes the maximum size of the image that ROM can download
50 from any boot media.
51
52config SYS_K3_MCU_SCRATCHPAD_BASE
53 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050054 default 0x40280000 if SOC_K3_AM654
Manorit Chawdhry282095b2023-07-14 11:22:25 +053055 default 0x41cff9fc if SOC_K3_J721S2
Manorit Chawdhryc4188b92023-05-16 10:24:36 +053056 default 0x41cff9fc if SOC_K3_J721E
Lokesh Vutla32886442018-08-27 15:57:09 +053057 help
58 Describes the base address of MCU Scratchpad RAM.
59
60config SYS_K3_MCU_SCRATCHPAD_SIZE
61 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050062 default 0x200 if SOC_K3_AM654
David Huang61098202022-01-25 20:56:31 +053063 default 0x200 if SOC_K3_J721E || SOC_K3_J721S2
Lokesh Vutla32886442018-08-27 15:57:09 +053064 help
65 Describes the size of MCU Scratchpad RAM.
66
Lokesh Vutlac7bfb852018-08-27 15:57:11 +053067config SYS_K3_BOOT_PARAM_TABLE_INDEX
68 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050069 default 0x41c7fbfc if SOC_K3_AM654
Andreas Dannenberg4524b3f2019-06-27 20:03:21 -050070 default 0x41cffbfc if SOC_K3_J721E
David Huang61098202022-01-25 20:56:31 +053071 default 0x41cfdbfc if SOC_K3_J721S2
Dave Gerlach96571ec2021-04-23 11:27:32 -050072 default 0x701bebfc if SOC_K3_AM642
Bryan Brattlofcdea1212022-12-23 19:15:23 -060073 default 0x43c3f290 if SOC_K3_AM625
74 default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
75 default 0x7000f290 if SOC_K3_AM62A7 && ARM64
Lokesh Vutlac7bfb852018-08-27 15:57:11 +053076 help
77 Address at which ROM stores the value which determines if SPL
78 is booted up by primary boot media or secondary boot media.
79
Lokesh Vutla6b6a3942018-11-02 19:51:04 +053080config SYS_K3_KEY
81 string "Key used to generate x509 certificate"
82 help
83 This option enables to provide a custom key that can be used for
84 generating x509 certificate for spl binary. If not needed leave
85 it blank so that a random key is generated and used.
86
87config SYS_K3_BOOT_CORE_ID
88 int
89 default 16
90
Andreas Dannenbergd13ec8c2019-08-15 15:55:28 -050091config K3_EARLY_CONS
92 bool "Activate to allow for an early console during SPL"
93 depends on SPL
94 help
95 Turn this option on to enable an early console functionality in SPL
96 before the main console is being brought up. This can be useful in
97 situations where the main console is dependent on System Firmware
98 (SYSFW) being up and running, which is usually not the case during
99 the very early stages of boot. Using this early console functionality
100 will allow for an alternate serial port to be used to support things
101 like UART-based boot and early diagnostic messages until the main
102 console is ready to get activated.
103
104config K3_EARLY_CONS_IDX
105 depends on K3_EARLY_CONS
106 int "Index of serial device to use for SPL early console"
107 default 1
108 help
109 Use this option to set the index of the serial device to be used
110 for the early console during SPL execution.
111
Lokesh Vutla5d83fd22018-11-02 19:51:05 +0530112config SYS_K3_SPL_ATF
113 bool "Start Cortex-A from SPL"
Andrew Davis05a116d2023-11-14 09:59:49 -0600114 depends on CPU_V7R
Lokesh Vutla5d83fd22018-11-02 19:51:05 +0530115 help
116 Enabling this will try to start Cortex-A (typically with ATF)
117 after SPL from R5.
118
Aswath Govindraju560ea8a2021-06-04 22:00:31 +0530119config K3_ATF_LOAD_ADDR
120 hex "Load address of ATF image"
121 default 0x70000000
122 help
123 The load address for the ATF image. This value defaults to 0x70000000
124 if not provided in the board defconfig file.
125
Tero Kristo18b8c032021-06-11 11:45:03 +0300126config K3_DM_FW
127 bool "Separate DM firmware image"
Andrew Davis05a116d2023-11-14 09:59:49 -0600128 depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
Tero Kristo18b8c032021-06-11 11:45:03 +0300129 default y
130 help
131 Enabling this will indicate that the system has separate DM
132 and TIFS firmware images in place, instead of a single SYSFW
133 firmware. Due to DM being executed on the same core as R5 SPL
134 bootloader, it makes RM and PM services not being available
135 during R5 SPL execution time.
136
Yogesh Siraswar26ebaed2022-07-15 11:38:53 -0500137config K3_X509_SWRV
138 int "SWRV for X509 certificate used for boot images"
139 default 1
140 help
141 SWRV for X509 certificate used for boot images
142
Andrew Davisc6f2a232023-11-14 09:59:50 -0600143if CPU_V7R
144source "arch/arm/mach-k3/r5/Kconfig"
145endif
146
Andrew Davisecfef3c2023-11-01 15:35:26 -0500147source "arch/arm/mach-k3/am65x/Kconfig"
Andrew Davisac35ed32023-11-01 15:35:27 -0500148source "arch/arm/mach-k3/am64x/Kconfig"
Andrew Davis308b6002023-11-01 15:35:28 -0500149source "arch/arm/mach-k3/am62x/Kconfig"
Andrew Davis11ab49e2023-11-01 15:35:29 -0500150source "arch/arm/mach-k3/am62ax/Kconfig"
Andrew Davisec2d8122023-11-01 15:35:25 -0500151source "arch/arm/mach-k3/j721e/Kconfig"
Andrew Davisba38c1b2023-11-01 15:35:30 -0500152source "arch/arm/mach-k3/j721s2/Kconfig"
Andrew Davis308b6002023-11-01 15:35:28 -0500153
Lokesh Vutla9bdec002018-08-27 15:57:08 +0530154endif