Lokesh Vutla | 9bdec00 | 2018-08-27 15:57:08 +0530 | [diff] [blame] | 1 | if ARCH_K3 |
| 2 | |
| 3 | choice |
| 4 | prompt "Texas Instruments' K3 based SoC select" |
| 5 | optional |
| 6 | |
Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 7 | config SOC_K3_AM6 |
| 8 | bool "TI's K3 based AM6 SoC Family Support" |
| 9 | |
Lokesh Vutla | a228532 | 2019-06-13 10:29:42 +0530 | [diff] [blame] | 10 | config SOC_K3_J721E |
| 11 | bool "TI's K3 based J721E SoC Family Support" |
| 12 | |
David Huang | 6109820 | 2022-01-25 20:56:31 +0530 | [diff] [blame^] | 13 | config SOC_K3_J721S2 |
| 14 | bool "TI's K3 based J721S2 SoC Family Support" |
| 15 | |
Dave Gerlach | 96571ec | 2021-04-23 11:27:32 -0500 | [diff] [blame] | 16 | config SOC_K3_AM642 |
| 17 | bool "TI's K3 based AM642 SoC Family Support" |
| 18 | |
Lokesh Vutla | 9bdec00 | 2018-08-27 15:57:08 +0530 | [diff] [blame] | 19 | endchoice |
| 20 | |
| 21 | config SYS_SOC |
| 22 | default "k3" |
| 23 | |
Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 24 | config SYS_K3_NON_SECURE_MSRAM_SIZE |
| 25 | hex |
Lokesh Vutla | a228532 | 2019-06-13 10:29:42 +0530 | [diff] [blame] | 26 | default 0x80000 if SOC_K3_AM6 |
David Huang | 6109820 | 2022-01-25 20:56:31 +0530 | [diff] [blame^] | 27 | default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2 |
Dave Gerlach | 96571ec | 2021-04-23 11:27:32 -0500 | [diff] [blame] | 28 | default 0x1c0000 if SOC_K3_AM642 |
Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 29 | help |
Dave Gerlach | 96571ec | 2021-04-23 11:27:32 -0500 | [diff] [blame] | 30 | Describes the total size of the MCU or OCMC MSRAM present on |
| 31 | the SoC in use. This doesn't specify the total size of SPL as |
| 32 | ROM can use some part of this RAM. Once ROM gives control to |
| 33 | SPL then this complete size can be usable. |
Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 34 | |
| 35 | config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE |
| 36 | hex |
Lokesh Vutla | a228532 | 2019-06-13 10:29:42 +0530 | [diff] [blame] | 37 | default 0x58000 if SOC_K3_AM6 |
David Huang | 6109820 | 2022-01-25 20:56:31 +0530 | [diff] [blame^] | 38 | default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2 |
Dave Gerlach | 96571ec | 2021-04-23 11:27:32 -0500 | [diff] [blame] | 39 | default 0x180000 if SOC_K3_AM642 |
Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 40 | help |
| 41 | Describes the maximum size of the image that ROM can download |
| 42 | from any boot media. |
| 43 | |
| 44 | config SYS_K3_MCU_SCRATCHPAD_BASE |
| 45 | hex |
| 46 | default 0x40280000 if SOC_K3_AM6 |
David Huang | 6109820 | 2022-01-25 20:56:31 +0530 | [diff] [blame^] | 47 | default 0x40280000 if SOC_K3_J721E || SOC_K3_J721S2 |
Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 48 | help |
| 49 | Describes the base address of MCU Scratchpad RAM. |
| 50 | |
| 51 | config SYS_K3_MCU_SCRATCHPAD_SIZE |
| 52 | hex |
| 53 | default 0x200 if SOC_K3_AM6 |
David Huang | 6109820 | 2022-01-25 20:56:31 +0530 | [diff] [blame^] | 54 | default 0x200 if SOC_K3_J721E || SOC_K3_J721S2 |
Lokesh Vutla | 3288644 | 2018-08-27 15:57:09 +0530 | [diff] [blame] | 55 | help |
| 56 | Describes the size of MCU Scratchpad RAM. |
| 57 | |
Lokesh Vutla | c7bfb85 | 2018-08-27 15:57:11 +0530 | [diff] [blame] | 58 | config SYS_K3_BOOT_PARAM_TABLE_INDEX |
| 59 | hex |
| 60 | default 0x41c7fbfc if SOC_K3_AM6 |
Andreas Dannenberg | 4524b3f | 2019-06-27 20:03:21 -0500 | [diff] [blame] | 61 | default 0x41cffbfc if SOC_K3_J721E |
David Huang | 6109820 | 2022-01-25 20:56:31 +0530 | [diff] [blame^] | 62 | default 0x41cfdbfc if SOC_K3_J721S2 |
Dave Gerlach | 96571ec | 2021-04-23 11:27:32 -0500 | [diff] [blame] | 63 | default 0x701bebfc if SOC_K3_AM642 |
Lokesh Vutla | c7bfb85 | 2018-08-27 15:57:11 +0530 | [diff] [blame] | 64 | help |
| 65 | Address at which ROM stores the value which determines if SPL |
| 66 | is booted up by primary boot media or secondary boot media. |
| 67 | |
Lokesh Vutla | 6b6a394 | 2018-11-02 19:51:04 +0530 | [diff] [blame] | 68 | config SYS_K3_KEY |
| 69 | string "Key used to generate x509 certificate" |
| 70 | help |
| 71 | This option enables to provide a custom key that can be used for |
| 72 | generating x509 certificate for spl binary. If not needed leave |
| 73 | it blank so that a random key is generated and used. |
| 74 | |
| 75 | config SYS_K3_BOOT_CORE_ID |
| 76 | int |
| 77 | default 16 |
| 78 | |
Andreas Dannenberg | d13ec8c | 2019-08-15 15:55:28 -0500 | [diff] [blame] | 79 | config K3_EARLY_CONS |
| 80 | bool "Activate to allow for an early console during SPL" |
| 81 | depends on SPL |
| 82 | help |
| 83 | Turn this option on to enable an early console functionality in SPL |
| 84 | before the main console is being brought up. This can be useful in |
| 85 | situations where the main console is dependent on System Firmware |
| 86 | (SYSFW) being up and running, which is usually not the case during |
| 87 | the very early stages of boot. Using this early console functionality |
| 88 | will allow for an alternate serial port to be used to support things |
| 89 | like UART-based boot and early diagnostic messages until the main |
| 90 | console is ready to get activated. |
| 91 | |
| 92 | config K3_EARLY_CONS_IDX |
| 93 | depends on K3_EARLY_CONS |
| 94 | int "Index of serial device to use for SPL early console" |
| 95 | default 1 |
| 96 | help |
| 97 | Use this option to set the index of the serial device to be used |
| 98 | for the early console during SPL execution. |
| 99 | |
Andreas Dannenberg | 04e5ea8 | 2019-06-04 17:55:47 -0500 | [diff] [blame] | 100 | config K3_LOAD_SYSFW |
| 101 | bool |
| 102 | depends on SPL |
| 103 | |
| 104 | config K3_SYSFW_IMAGE_NAME |
| 105 | string "File name of SYSFW firmware and configuration blob" |
| 106 | depends on K3_LOAD_SYSFW |
| 107 | default "sysfw.itb" |
| 108 | help |
| 109 | Filename of the combined System Firmware and configuration image tree |
| 110 | blob to be loaded when booting from a filesystem. |
| 111 | |
| 112 | config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_SECT |
| 113 | hex "MMC sector to load SYSFW firmware and configuration blob from" |
| 114 | depends on K3_LOAD_SYSFW && SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR |
| 115 | default 0x3600 |
| 116 | help |
| 117 | Address on the MMC to load the combined System Firmware and |
| 118 | configuration image tree blob from, when the MMC is being used |
| 119 | in raw mode. Units: MMC sectors (1 sector = 512 bytes). |
| 120 | |
| 121 | config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART |
| 122 | hex "MMC partition to load SYSFW firmware and configuration blob from" |
| 123 | depends on K3_LOAD_SYSFW && SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION |
| 124 | default 2 |
| 125 | help |
| 126 | Partition on the MMC to the combined System Firmware and configuration |
| 127 | image tree blob from, when the MMC is being used in raw mode. |
| 128 | |
| 129 | config K3_SYSFW_IMAGE_SIZE_MAX |
| 130 | int "Amount of memory dynamically allocated for loading SYSFW blob" |
| 131 | depends on K3_LOAD_SYSFW |
Andrew F. Davis | 4ef3059 | 2020-04-30 15:12:19 -0400 | [diff] [blame] | 132 | default 278000 |
Andreas Dannenberg | 04e5ea8 | 2019-06-04 17:55:47 -0500 | [diff] [blame] | 133 | help |
| 134 | Amount of memory (in bytes) reserved through dynamic allocation at |
| 135 | runtime for loading the combined System Firmware and configuration image |
| 136 | tree blob. Keep it as tight as possible, as this directly affects the |
| 137 | overall SPL memory footprint. |
| 138 | |
Lokesh Vutla | a5f2756 | 2020-02-04 11:09:50 +0530 | [diff] [blame] | 139 | config K3_SYSFW_IMAGE_SPI_OFFS |
| 140 | hex "SPI offset of SYSFW firmware and configuration blob" |
| 141 | depends on K3_LOAD_SYSFW |
| 142 | default 0x6C0000 |
| 143 | help |
| 144 | Offset of the combined System Firmware and configuration image tree |
| 145 | blob to be loaded when booting from a SPI flash memory. |
| 146 | |
Lokesh Vutla | 5d83fd2 | 2018-11-02 19:51:05 +0530 | [diff] [blame] | 147 | config SYS_K3_SPL_ATF |
| 148 | bool "Start Cortex-A from SPL" |
| 149 | depends on SPL && CPU_V7R |
| 150 | help |
| 151 | Enabling this will try to start Cortex-A (typically with ATF) |
| 152 | after SPL from R5. |
| 153 | |
Aswath Govindraju | 560ea8a | 2021-06-04 22:00:31 +0530 | [diff] [blame] | 154 | config K3_ATF_LOAD_ADDR |
| 155 | hex "Load address of ATF image" |
| 156 | default 0x70000000 |
| 157 | help |
| 158 | The load address for the ATF image. This value defaults to 0x70000000 |
| 159 | if not provided in the board defconfig file. |
| 160 | |
Tero Kristo | 18b8c03 | 2021-06-11 11:45:03 +0300 | [diff] [blame] | 161 | config K3_DM_FW |
| 162 | bool "Separate DM firmware image" |
David Huang | 6109820 | 2022-01-25 20:56:31 +0530 | [diff] [blame^] | 163 | depends on SPL && CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN |
Tero Kristo | 18b8c03 | 2021-06-11 11:45:03 +0300 | [diff] [blame] | 164 | default y |
| 165 | help |
| 166 | Enabling this will indicate that the system has separate DM |
| 167 | and TIFS firmware images in place, instead of a single SYSFW |
| 168 | firmware. Due to DM being executed on the same core as R5 SPL |
| 169 | bootloader, it makes RM and PM services not being available |
| 170 | during R5 SPL execution time. |
| 171 | |
Lokesh Vutla | 029f921 | 2018-08-27 15:59:06 +0530 | [diff] [blame] | 172 | source "board/ti/am65x/Kconfig" |
Dave Gerlach | 3dc33f1 | 2021-04-23 11:27:42 -0500 | [diff] [blame] | 173 | source "board/ti/am64x/Kconfig" |
Lokesh Vutla | 1a9dd21 | 2019-06-13 10:29:49 +0530 | [diff] [blame] | 174 | source "board/ti/j721e/Kconfig" |
Jan Kiszka | 8ff2ff8 | 2021-09-18 08:17:53 +0200 | [diff] [blame] | 175 | source "board/siemens/iot2050/Kconfig" |
David Huang | 6109820 | 2022-01-25 20:56:31 +0530 | [diff] [blame^] | 176 | source "board/ti/j721s2/Kconfig" |
Lokesh Vutla | 9bdec00 | 2018-08-27 15:57:08 +0530 | [diff] [blame] | 177 | endif |