blob: 217def3bb46b7ecafb012a4c037327ed1493a681 [file] [log] [blame]
Lokesh Vutla9bdec002018-08-27 15:57:08 +05301if ARCH_K3
2
3choice
4 prompt "Texas Instruments' K3 based SoC select"
5 optional
6
Apurva Nandana727fa02024-02-24 01:51:40 +05307config SOC_K3_AM625
8 bool "TI's K3 based AM625 SoC Family Support"
9
10config SOC_K3_AM62A7
11 bool "TI's K3 based AM62A7 SoC Family Support"
12
13config SOC_K3_AM642
14 bool "TI's K3 based AM642 SoC Family Support"
15
Andrew Davis1be5e972022-07-15 10:25:27 -050016config SOC_K3_AM654
17 bool "TI's K3 based AM654 SoC Family Support"
Lokesh Vutla32886442018-08-27 15:57:09 +053018
Lokesh Vutlaa2285322019-06-13 10:29:42 +053019config SOC_K3_J721E
20 bool "TI's K3 based J721E SoC Family Support"
21
David Huang61098202022-01-25 20:56:31 +053022config SOC_K3_J721S2
23 bool "TI's K3 based J721S2 SoC Family Support"
24
Apurva Nandan67ebc302024-02-24 01:51:41 +053025config SOC_K3_J784S4
26 bool "TI's K3 based J784S4 SoC Family Support"
27
Lokesh Vutla9bdec002018-08-27 15:57:08 +053028endchoice
29
Nishanth Menon27ee03c2023-11-04 02:21:44 -050030if SOC_K3_J721E
31config SOC_K3_J721E_J7200
32 bool "TI's K3 based J7200 SoC variant Family Support"
33endif
34
Lokesh Vutla9bdec002018-08-27 15:57:08 +053035config SYS_SOC
36 default "k3"
37
Lokesh Vutla32886442018-08-27 15:57:09 +053038config SYS_K3_NON_SECURE_MSRAM_SIZE
39 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050040 default 0x80000 if SOC_K3_AM654
Apurva Nandan67ebc302024-02-24 01:51:41 +053041 default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
Dave Gerlach96571ec2021-04-23 11:27:32 -050042 default 0x1c0000 if SOC_K3_AM642
Bryan Brattlofdaa39a62022-11-03 19:13:55 -050043 default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
Lokesh Vutla32886442018-08-27 15:57:09 +053044 help
Dave Gerlach96571ec2021-04-23 11:27:32 -050045 Describes the total size of the MCU or OCMC MSRAM present on
46 the SoC in use. This doesn't specify the total size of SPL as
47 ROM can use some part of this RAM. Once ROM gives control to
48 SPL then this complete size can be usable.
Lokesh Vutla32886442018-08-27 15:57:09 +053049
50config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
51 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050052 default 0x58000 if SOC_K3_AM654
Apurva Nandan67ebc302024-02-24 01:51:41 +053053 default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
Dave Gerlach96571ec2021-04-23 11:27:32 -050054 default 0x180000 if SOC_K3_AM642
Bryan Brattlofdaa39a62022-11-03 19:13:55 -050055 default 0x38000 if SOC_K3_AM625 || SOC_K3_AM62A7
Lokesh Vutla32886442018-08-27 15:57:09 +053056 help
57 Describes the maximum size of the image that ROM can download
58 from any boot media.
59
60config SYS_K3_MCU_SCRATCHPAD_BASE
61 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050062 default 0x40280000 if SOC_K3_AM654
Apurva Nandan67ebc302024-02-24 01:51:41 +053063 default 0x41cff9fc if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
Lokesh Vutla32886442018-08-27 15:57:09 +053064 help
65 Describes the base address of MCU Scratchpad RAM.
66
67config SYS_K3_MCU_SCRATCHPAD_SIZE
68 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050069 default 0x200 if SOC_K3_AM654
Apurva Nandan67ebc302024-02-24 01:51:41 +053070 default 0x200 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
Lokesh Vutla32886442018-08-27 15:57:09 +053071 help
72 Describes the size of MCU Scratchpad RAM.
73
Lokesh Vutlac7bfb852018-08-27 15:57:11 +053074config SYS_K3_BOOT_PARAM_TABLE_INDEX
75 hex
Andrew Davis1be5e972022-07-15 10:25:27 -050076 default 0x41c7fbfc if SOC_K3_AM654
Andreas Dannenberg4524b3f2019-06-27 20:03:21 -050077 default 0x41cffbfc if SOC_K3_J721E
Apurva Nandan67ebc302024-02-24 01:51:41 +053078 default 0x41cfdbfc if SOC_K3_J721S2 || SOC_K3_J784S4
Dave Gerlach96571ec2021-04-23 11:27:32 -050079 default 0x701bebfc if SOC_K3_AM642
Bryan Brattlofcdea1212022-12-23 19:15:23 -060080 default 0x43c3f290 if SOC_K3_AM625
81 default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
82 default 0x7000f290 if SOC_K3_AM62A7 && ARM64
Lokesh Vutlac7bfb852018-08-27 15:57:11 +053083 help
84 Address at which ROM stores the value which determines if SPL
85 is booted up by primary boot media or secondary boot media.
86
Lokesh Vutla6b6a3942018-11-02 19:51:04 +053087config SYS_K3_KEY
88 string "Key used to generate x509 certificate"
89 help
90 This option enables to provide a custom key that can be used for
91 generating x509 certificate for spl binary. If not needed leave
92 it blank so that a random key is generated and used.
93
94config SYS_K3_BOOT_CORE_ID
95 int
96 default 16
97
Andreas Dannenbergd13ec8c2019-08-15 15:55:28 -050098config K3_EARLY_CONS
99 bool "Activate to allow for an early console during SPL"
100 depends on SPL
101 help
102 Turn this option on to enable an early console functionality in SPL
103 before the main console is being brought up. This can be useful in
104 situations where the main console is dependent on System Firmware
105 (SYSFW) being up and running, which is usually not the case during
106 the very early stages of boot. Using this early console functionality
107 will allow for an alternate serial port to be used to support things
108 like UART-based boot and early diagnostic messages until the main
109 console is ready to get activated.
110
111config K3_EARLY_CONS_IDX
112 depends on K3_EARLY_CONS
113 int "Index of serial device to use for SPL early console"
114 default 1
115 help
116 Use this option to set the index of the serial device to be used
117 for the early console during SPL execution.
118
Lokesh Vutla5d83fd22018-11-02 19:51:05 +0530119config SYS_K3_SPL_ATF
120 bool "Start Cortex-A from SPL"
Andrew Davis05a116d2023-11-14 09:59:49 -0600121 depends on CPU_V7R
Lokesh Vutla5d83fd22018-11-02 19:51:05 +0530122 help
123 Enabling this will try to start Cortex-A (typically with ATF)
124 after SPL from R5.
125
Aswath Govindraju560ea8a2021-06-04 22:00:31 +0530126config K3_ATF_LOAD_ADDR
127 hex "Load address of ATF image"
128 default 0x70000000
129 help
130 The load address for the ATF image. This value defaults to 0x70000000
131 if not provided in the board defconfig file.
132
Tero Kristo18b8c032021-06-11 11:45:03 +0300133config K3_DM_FW
134 bool "Separate DM firmware image"
Apurva Nandan67ebc302024-02-24 01:51:41 +0530135 depends on CPU_V7R && (SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_AM625 || SOC_K3_AM62A7 || SOC_K3_J784S4) && !CLK_TI_SCI && !TI_SCI_POWER_DOMAIN
Tero Kristo18b8c032021-06-11 11:45:03 +0300136 default y
137 help
138 Enabling this will indicate that the system has separate DM
139 and TIFS firmware images in place, instead of a single SYSFW
140 firmware. Due to DM being executed on the same core as R5 SPL
141 bootloader, it makes RM and PM services not being available
142 during R5 SPL execution time.
143
Yogesh Siraswar26ebaed2022-07-15 11:38:53 -0500144config K3_X509_SWRV
145 int "SWRV for X509 certificate used for boot images"
146 default 1
147 help
148 SWRV for X509 certificate used for boot images
149
Andrew Davisc6f2a232023-11-14 09:59:50 -0600150if CPU_V7R
151source "arch/arm/mach-k3/r5/Kconfig"
152endif
153
Andrew Davisecfef3c2023-11-01 15:35:26 -0500154source "arch/arm/mach-k3/am65x/Kconfig"
Andrew Davisac35ed32023-11-01 15:35:27 -0500155source "arch/arm/mach-k3/am64x/Kconfig"
Andrew Davis308b6002023-11-01 15:35:28 -0500156source "arch/arm/mach-k3/am62x/Kconfig"
Andrew Davis11ab49e2023-11-01 15:35:29 -0500157source "arch/arm/mach-k3/am62ax/Kconfig"
Andrew Davisec2d8122023-11-01 15:35:25 -0500158source "arch/arm/mach-k3/j721e/Kconfig"
Andrew Davisba38c1b2023-11-01 15:35:30 -0500159source "arch/arm/mach-k3/j721s2/Kconfig"
Andrew Davis308b6002023-11-01 15:35:28 -0500160
Lokesh Vutla9bdec002018-08-27 15:57:08 +0530161endif