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Steve Sakoman1ad21582010-06-08 13:07:46 -07001/*
2 *
Sricharan9310ff72011-11-15 09:49:55 -05003 * Common functions for OMAP4/5 based boards
Steve Sakoman1ad21582010-06-08 13:07:46 -07004 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 *
8 * Author :
9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com>
11 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Steve Sakoman1ad21582010-06-08 13:07:46 -070013 */
14#include <common.h>
Lokesh Vutlaac8bd3c2017-05-05 13:45:27 +053015#include <debug_uart.h>
Tom Rini28591df2012-08-13 12:03:19 -070016#include <spl.h>
Steve Sakoman1ad21582010-06-08 13:07:46 -070017#include <asm/arch/sys_proto.h>
Alexey Brodkin267d8e22014-02-26 17:47:58 +040018#include <linux/sizes.h>
Sricharan62a86502011-11-15 09:50:00 -050019#include <asm/emif.h>
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +000020#include <asm/omap_common.h>
Lokesh Vutla28049632013-02-12 01:33:45 +000021#include <linux/compiler.h>
R Sricharan06396c12013-03-04 20:04:45 +000022#include <asm/system.h>
23
Nishanth Menon4e5dd662010-11-19 11:19:40 -050024DECLARE_GLOBAL_DATA_PTR;
25
Aneesh Vf908b632011-07-21 09:10:01 -040026void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
27{
28 int i;
29 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
30
31 for (i = 0; i < size; i++, pad++)
32 writew(pad->val, base + pad->offset);
33}
34
Aneesh Vf908b632011-07-21 09:10:01 -040035static void set_mux_conf_regs(void)
36{
Sricharan9310ff72011-11-15 09:49:55 -050037 switch (omap_hw_init_context()) {
Aneesh Vf908b632011-07-21 09:10:01 -040038 case OMAP_INIT_CONTEXT_SPL:
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010039 set_muxconf_regs();
Aneesh Vf908b632011-07-21 09:10:01 -040040 break;
41 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
Aneesh Vf908b632011-07-21 09:10:01 -040042 break;
43 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
44 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010045 set_muxconf_regs();
Aneesh Vf908b632011-07-21 09:10:01 -040046 break;
47 }
48}
49
Sricharan9310ff72011-11-15 09:49:55 -050050u32 cortex_rev(void)
Aneesh V162ced32011-07-21 09:10:04 -040051{
52
53 unsigned int rev;
54
55 /* Read Main ID Register (MIDR) */
56 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
57
58 return rev;
59}
60
Tom Rini01b2dd92013-05-31 10:44:23 -040061static void omap_rev_string(void)
Aneesh V162ced32011-07-21 09:10:04 -040062{
Sricharan9310ff72011-11-15 09:49:55 -050063 u32 omap_rev = omap_revision();
Lokesh Vutla43c296f2013-02-12 21:29:03 +000064 u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
Sricharan9310ff72011-11-15 09:49:55 -050065 u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
66 u32 major_rev = (omap_rev & 0x00000F00) >> 8;
67 u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
Aneesh V162ced32011-07-21 09:10:04 -040068
Daniel Allredfd684b22016-05-19 19:10:52 -050069 const char *sec_s;
70
71 switch (get_device_type()) {
72 case TST_DEVICE:
73 sec_s = "TST";
74 break;
75 case EMU_DEVICE:
76 sec_s = "EMU";
77 break;
78 case HS_DEVICE:
79 sec_s = "HS";
80 break;
81 case GP_DEVICE:
82 sec_s = "GP";
83 break;
84 default:
85 sec_s = "?";
86 }
87
Lokesh Vutla43c296f2013-02-12 21:29:03 +000088 if (soc_variant)
89 printf("OMAP");
90 else
91 printf("DRA");
Daniel Allredfd684b22016-05-19 19:10:52 -050092 printf("%x-%s ES%x.%x\n", omap_variant, sec_s, major_rev, minor_rev);
Aneesh V162ced32011-07-21 09:10:04 -040093}
94
Sricharan308fe922011-11-15 09:50:03 -050095#ifdef CONFIG_SPL_BUILD
Tom Rinife3b0c72012-08-13 11:37:56 -070096void spl_display_print(void)
97{
98 omap_rev_string();
99}
Sricharan308fe922011-11-15 09:50:03 -0500100#endif
101
Lokesh Vutla28049632013-02-12 01:33:45 +0000102void __weak srcomp_enable(void)
103{
SRICHARAN R4af19882013-04-24 00:41:23 +0000104}
105
Kipisz, Steven4466dfb2016-02-24 12:30:57 -0600106/**
107 * do_board_detect() - Detect board description
108 *
109 * Function to detect board description. This is expected to be
110 * overridden in the SoC family board file where desired.
111 */
112void __weak do_board_detect(void)
113{
114}
115
Keerthy35740ec2016-05-24 11:45:05 +0530116/**
117 * vcores_init() - Assign omap_vcores based on board
118 *
119 * Function to pick the vcores based on board. This is expected to be
120 * overridden in the SoC family board file where desired.
121 */
122void __weak vcores_init(void)
123{
124}
125
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530126void s_init(void)
127{
128}
129
130/**
131 * early_system_init - Does Early system initialization.
132 *
133 * Does early system init of watchdog, muxing, andclocks
Aneesh Vf908b632011-07-21 09:10:01 -0400134 * Watchdog disable is done always. For the rest what gets done
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530135 * depends on the boot mode in which this function is executed when
136 * 1. SPL running from SRAM
137 * 2. U-Boot running from FLASH
138 * 3. U-Boot loaded to SDRAM by SPL
139 * 4. U-Boot loaded to SDRAM by ROM code using the
Aneesh Vf908b632011-07-21 09:10:01 -0400140 * Configuration Header feature
141 * Please have a look at the respective functions to see what gets
142 * done in each of these cases
143 * This function is called with SRAM stack.
Steve Sakoman1ad21582010-06-08 13:07:46 -0700144 */
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530145void early_system_init(void)
Steve Sakoman1ad21582010-06-08 13:07:46 -0700146{
Sricharan9310ff72011-11-15 09:49:55 -0500147 init_omap_revision();
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +0000148 hw_data_init();
149
Lokesh Vutlaba873772012-05-29 19:26:43 +0000150#ifdef CONFIG_SPL_BUILD
Lokesh Vutlae38b45a2016-07-12 14:47:41 +0530151 if (warm_reset())
Lokesh Vutlaba873772012-05-29 19:26:43 +0000152 force_emif_self_refresh();
153#endif
Steve Sakoman1ad21582010-06-08 13:07:46 -0700154 watchdog_init();
Aneesh Vf908b632011-07-21 09:10:01 -0400155 set_mux_conf_regs();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400156#ifdef CONFIG_SPL_BUILD
Lokesh Vutla28049632013-02-12 01:33:45 +0000157 srcomp_enable();
Aneesh Vb35f7cb2011-09-08 11:05:56 -0400158 do_io_settings();
Aneesh Vb8e60b92011-07-21 09:10:21 -0400159#endif
Kipisz, Stevenebe86dc2016-02-24 12:30:52 -0600160 setup_early_clocks();
Lokesh Vutlaca23da12017-06-27 13:50:56 +0530161#ifdef CONFIG_SPL_BUILD
162 /*
163 * Save the boot parameters passed from romcode.
164 * We cannot delay the saving further than this,
165 * to prevent overwrites.
166 */
167 save_omap_boot_params();
168#endif
Kipisz, Steven4466dfb2016-02-24 12:30:57 -0600169 do_board_detect();
Jean-Jacques Hiblota68ca9e2017-09-15 12:57:33 +0200170#ifdef CONFIG_SPL_BUILD
171 spl_early_init();
172#endif
Keerthy35740ec2016-05-24 11:45:05 +0530173 vcores_init();
Lokesh Vutlaac8bd3c2017-05-05 13:45:27 +0530174#ifdef CONFIG_DEBUG_UART_OMAP
175 debug_uart_init();
176#endif
Aneesh V0d2628b2011-07-21 09:10:07 -0400177 prcm_init();
Simon Glass0c078ea2015-03-03 08:03:02 -0700178}
179
Aneesh Vb8e60b92011-07-21 09:10:21 -0400180#ifdef CONFIG_SPL_BUILD
Simon Glass0c078ea2015-03-03 08:03:02 -0700181void board_init_f(ulong dummy)
182{
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530183 early_system_init();
Lokesh Vutlabe86f0e2014-08-04 19:42:24 +0530184#ifdef CONFIG_BOARD_EARLY_INIT_F
185 board_early_init_f();
186#endif
Aneesh Vb8e60b92011-07-21 09:10:21 -0400187 /* For regular u-boot sdram_init() is called from dram_init() */
188 sdram_init();
Lokesh Vutlabed46ef2017-04-18 17:27:24 +0530189 gd->ram_size = omap_sdram_size();
Steve Sakoman1ad21582010-06-08 13:07:46 -0700190}
Simon Glass0c078ea2015-03-03 08:03:02 -0700191#endif
Steve Sakoman1ad21582010-06-08 13:07:46 -0700192
Lokesh Vutlae8534d22016-03-07 14:49:54 +0530193int arch_cpu_init_dm(void)
194{
195 early_system_init();
196 return 0;
197}
198
Steve Sakoman1ad21582010-06-08 13:07:46 -0700199/*
200 * Routine: wait_for_command_complete
201 * Description: Wait for posting to finish on watchdog
202 */
203void wait_for_command_complete(struct watchdog *wd_base)
204{
205 int pending = 1;
206 do {
207 pending = readl(&wd_base->wwps);
208 } while (pending);
209}
210
211/*
212 * Routine: watchdog_init
213 * Description: Shut down watch dogs
214 */
215void watchdog_init(void)
216{
217 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
218
219 writel(WD_UNLOCK1, &wd2_base->wspr);
220 wait_for_command_complete(wd2_base);
221 writel(WD_UNLOCK2, &wd2_base->wspr);
222}
223
Aneesh V04bd2b92010-09-12 10:32:55 +0530224
225/*
226 * This function finds the SDRAM size available in the system
227 * based on DMM section configurations
228 * This is needed because the size of memory installed may be
229 * different on different versions of the board
230 */
Sricharan9310ff72011-11-15 09:49:55 -0500231u32 omap_sdram_size(void)
Aneesh V04bd2b92010-09-12 10:32:55 +0530232{
SRICHARAN R015be792012-05-17 00:12:06 +0000233 u32 section, i, valid;
234 u64 sdram_start = 0, sdram_end = 0, addr,
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530235 size, total_size = 0, trap_size = 0, trap_start = 0;
Sricharan62a86502011-11-15 09:50:00 -0500236
Aneesh V04bd2b92010-09-12 10:32:55 +0530237 for (i = 0; i < 4; i++) {
Sricharan62a86502011-11-15 09:50:00 -0500238 section = __raw_readl(DMM_BASE + i*4);
SRICHARAN R015be792012-05-17 00:12:06 +0000239 valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
240 (EMIF_SDRC_ADDRSPC_SHIFT);
Sricharan62a86502011-11-15 09:50:00 -0500241 addr = section & EMIF_SYS_ADDR_MASK;
SRICHARAN R015be792012-05-17 00:12:06 +0000242
Aneesh V04bd2b92010-09-12 10:32:55 +0530243 /* See if the address is valid */
Tom Rini72f36002014-05-16 13:02:24 -0400244 if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
245 (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
Sricharan62a86502011-11-15 09:50:00 -0500246 size = ((section & EMIF_SYS_SIZE_MASK) >>
247 EMIF_SYS_SIZE_SHIFT);
248 size = 1 << size;
249 size *= SZ_16M;
SRICHARAN R015be792012-05-17 00:12:06 +0000250
251 if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
252 if (!sdram_start || (addr < sdram_start))
253 sdram_start = addr;
254 if (!sdram_end || ((addr + size) > sdram_end))
255 sdram_end = addr + size;
256 } else {
257 trap_size = size;
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530258 trap_start = addr;
SRICHARAN R015be792012-05-17 00:12:06 +0000259 }
Aneesh V04bd2b92010-09-12 10:32:55 +0530260 }
261 }
Lokesh Vutlae45d3bb2014-05-12 13:49:33 +0530262
263 if ((trap_start >= sdram_start) && (trap_start < sdram_end))
264 total_size = (sdram_end - sdram_start) - (trap_size);
265 else
266 total_size = sdram_end - sdram_start;
Sricharan62a86502011-11-15 09:50:00 -0500267
Aneesh V04bd2b92010-09-12 10:32:55 +0530268 return total_size;
269}
270
271
Steve Sakoman1ad21582010-06-08 13:07:46 -0700272/*
273 * Routine: dram_init
274 * Description: sets uboots idea of sdram size
275 */
276int dram_init(void)
277{
Aneesh Vcc565582011-07-21 09:10:09 -0400278 sdram_init();
Sricharan9310ff72011-11-15 09:49:55 -0500279 gd->ram_size = omap_sdram_size();
Steve Sakoman1ad21582010-06-08 13:07:46 -0700280 return 0;
281}
282
283/*
284 * Print board information
285 */
286int checkboard(void)
287{
288 puts(sysinfo.board_string);
289 return 0;
290}
291
Masahiro Yamada81a689e2014-02-13 18:30:26 +0900292#if defined(CONFIG_DISPLAY_CPUINFO)
Sricharan9310ff72011-11-15 09:49:55 -0500293/*
294 * Print CPU information
295 */
296int print_cpuinfo(void)
Aneesh Ve3405bd2011-06-16 23:30:52 +0000297{
Andreas Müller0cda7a42012-01-04 15:26:24 +0000298 puts("CPU : ");
299 omap_rev_string();
Sricharan9310ff72011-11-15 09:49:55 -0500300
301 return 0;
302}
Masahiro Yamada81a689e2014-02-13 18:30:26 +0900303#endif