blob: 60d98d14640d74b6204a8a47d0f5a9ee952ff548 [file] [log] [blame]
Tom Rinif48e0252016-10-26 17:15:37 -04001menuconfig PCI
2 bool "PCI support"
Tom Rini5dec0752021-05-14 21:34:32 -04003 depends on DM
Bin Meng00a17fd2017-07-30 06:23:09 -07004 default y if PPC
Tom Rinif48e0252016-10-26 17:15:37 -04005 help
6 Enable support for PCI (Peripheral Interconnect Bus), a type of bus
7 used on some devices to allow the CPU to communicate with its
8 peripherals.
9
Simon Glass3933d292021-08-01 18:54:44 -060010 This subsystem requires driver model.
Simon Glassb94dc892015-03-05 12:25:25 -070011
Tom Rini5dec0752021-05-14 21:34:32 -040012if PCI
13
Simon Glasseca7b0d2015-11-26 19:51:30 -070014config DM_PCI_COMPAT
15 bool "Enable compatible functions for PCI"
Simon Glasseca7b0d2015-11-26 19:51:30 -070016 help
17 Enable compatibility functions for PCI so that old code can be used
Simon Glass3933d292021-08-01 18:54:44 -060018 with CONFIG_PCI enabled. This should be used as an interim
Simon Glasseca7b0d2015-11-26 19:51:30 -070019 measure when porting a board to use driver model for PCI. Once the
20 board is fully supported, this option should be disabled.
21
Tom Rini50e6f1b2021-12-12 22:12:32 -050022config SYS_PCI_64BIT
23 bool "Enable 64-bit PCI resources"
24 default y if PPC
25 help
26 Enable 64-bit PCI resource access.
27
Wilson Dinga6bdc862018-03-26 15:57:29 +080028config PCI_AARDVARK
29 bool "Enable Aardvark PCIe driver"
Pali Rohár5c6edca2020-08-25 10:45:04 +020030 depends on DM_GPIO
Wilson Dinga6bdc862018-03-26 15:57:29 +080031 depends on ARMADA_3700
32 help
33 Say Y here if you want to enable PCIe controller support on
34 Armada37x0 SoCs. The PCIe controller on Armada37x0 is based on
35 Aardvark hardware.
36
Bin Meng2f49e2e2016-10-16 23:35:18 -070037config PCI_PNP
38 bool "Enable Plug & Play support for PCI"
Bin Meng2f49e2e2016-10-16 23:35:18 -070039 default y
40 help
41 Enable PCI memory and I/O space resource allocation and assignment.
42
Suneel Garapati3ac3aec2019-10-19 17:10:20 -070043config PCI_REGION_MULTI_ENTRY
44 bool "Enable Multiple entries of region type MEMORY in ranges for PCI"
Suneel Garapati3ac3aec2019-10-19 17:10:20 -070045 help
46 Enable PCI memory regions to be of multiple entry. Multiple entry
47 here refers to allow more than one count of address ranges for MEMORY
48 region type. This helps to add support for SoC's like OcteonTX/TX2
49 where every peripheral is on the PCI bus.
50
Tom Rini77d9e9f2022-06-20 08:07:50 -040051config PCI_CONFIG_HOST_BRIDGE
52 bool "Configure PCI host bridges"
53 default y if X86
54
Daniel Schwierzeckf59925e2021-07-15 20:53:56 +020055config PCI_MAP_SYSTEM_MEMORY
56 bool "Map local system memory from a virtual base address"
Daniel Schwierzeckf59925e2021-07-15 20:53:56 +020057 depends on MIPS
Daniel Schwierzeckf59925e2021-07-15 20:53:56 +020058 help
59 Say Y if base address of system memory is being used as a virtual address
60 instead of a physical address (e.g. on MIPS). The PCI core will then remap
61 the virtual memory base address to a physical address when adding the PCI
62 region of type PCI_REGION_SYS_MEMORY.
Tom Rinibb4dd962022-11-16 13:10:37 -050063 This should only be required on MIPS where CFG_SYS_SDRAM_BASE is still
Daniel Schwierzeckf59925e2021-07-15 20:53:56 +020064 being used as virtual address.
65
Suneel Garapati13822f72019-10-19 16:07:20 -070066config PCI_SRIOV
67 bool "Enable Single Root I/O Virtualization support for PCI"
Suneel Garapati13822f72019-10-19 16:07:20 -070068 help
69 Say Y here if you want to enable PCI Single Root I/O Virtualization
70 capability support. This helps to enumerate Virtual Function devices
71 if available on a PCI Physical Function device and probe for
72 applicable drivers.
73
Andrew Scull71e7e1a2022-04-21 16:11:16 +000074config PCI_ENHANCED_ALLOCATION
75 bool "Enable support for Enhanced Allocation of resources"
76 default y
77 help
78 Enable support for Enhanced Allocation which can be used by supported
79 devices in place of traditional BARS for allocation of resources.
80
Suneel Garapatia99a5eb2019-10-23 18:40:36 -070081config PCI_ARID
82 bool "Enable Alternate Routing-ID support for PCI"
Suneel Garapatia99a5eb2019-10-23 18:40:36 -070083 help
84 Say Y here if you want to enable Alternate Routing-ID capability
85 support on PCI devices. This helps to skip some devices in BDF
86 scan that are not present.
87
Tom Rini6fe72702022-06-20 08:07:48 -040088config PCI_SCAN_SHOW
89 bool "Show PCI devices during startup"
90 depends on PCIE_IMX
91
Tuomas Tynkkynena765f712017-09-19 23:18:06 +030092config PCIE_ECAM_GENERIC
93 bool "Generic ECAM-based PCI host controller support"
Tuomas Tynkkynena765f712017-09-19 23:18:06 +030094 help
95 Say Y here if you want to enable support for generic ECAM-based
96 PCIe host controllers, such as the one emulated by QEMU.
97
Masami Hiramatsu06850202021-06-04 18:44:06 +090098config PCIE_ECAM_SYNQUACER
99 bool "SynQuacer ECAM-based PCI host controller support"
Masami Hiramatsu06850202021-06-04 18:44:06 +0900100 select PCI_INIT_R
101 select PCI_REGION_MULTI_ENTRY
102 help
103 Say Y here if you want to enable support for Socionext
104 SynQuacer SoC's ECAM-based PCIe host controllers.
105 Note that this must be configured when boot because Linux driver
106 expects the PCIe RC has been configured in the bootloader.
107
Mark Kettenis59b09ba2023-01-21 20:27:58 +0100108config PCIE_APPLE
109 bool "Enable Apple PCIe driver"
110 depends on ARCH_APPLE
111 imply PCI_INIT_R
112 default y
113 help
114 Say Y here if you want to enable PCIe controller support on
115 Apple SoCs.
116
Tom Rinie9e57582022-06-20 08:07:49 -0400117config PCI_GT64120
118 bool "GT64120 PCI support"
119 depends on MIPS
120
liu hao1c4a2c42019-10-31 07:51:08 +0000121config PCI_PHYTIUM
122 bool "Phytium PCIe support"
liu hao1c4a2c42019-10-31 07:51:08 +0000123 help
124 Say Y here if you want to enable PCIe controller support on
125 Phytium SoCs.
126
Shadi Ammouri3b386452016-10-27 13:29:41 +0200127config PCIE_DW_MVEBU
128 bool "Enable Armada-8K PCIe driver (DesignWare core)"
Shadi Ammouri3b386452016-10-27 13:29:41 +0200129 depends on ARMADA_8K
130 help
131 Say Y here if you want to enable PCIe controller support on
132 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
133 DesignWare hardware.
134
Green Wanba5919b2021-05-27 06:52:10 -0700135config PCIE_DW_SIFIVE
136 bool "Enable SiFive FU740 PCIe"
137 depends on CLK_SIFIVE_PRCI
138 depends on RESET_SIFIVE
139 depends on SIFIVE_GPIO
140 select PCIE_DW_COMMON
141 help
142 Say Y here if you want to enable PCIe controller support on
143 FU740.
144
Tom Rinif24d48a2022-06-20 08:07:56 -0400145config SYS_FSL_PCI_VER_3_X
146 bool
147
Hou Zhiqiang25ff98c2019-04-24 22:33:02 +0800148config PCIE_FSL
149 bool "FSL PowerPC PCIe support"
Tom Rinif24d48a2022-06-20 08:07:56 -0400150 select SYS_FSL_PCI_VER_3_X if ARCH_T2080 || ARCH_T4240
Hou Zhiqiang25ff98c2019-04-24 22:33:02 +0800151 help
152 Say Y here if you want to enable PCIe controller support on FSL
153 PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs.
154 This driver does not support SRIO_PCIE_BOOT feature.
155
Heiko Schocherd647b462019-10-14 11:29:39 +0200156config PCI_MPC85XX
157 bool "MPC85XX PowerPC PCI support"
Heiko Schocherd647b462019-10-14 11:29:39 +0200158 help
159 Say Y here if you want to enable PCI controller support on FSL
160 PowerPC MPC85xx SoC.
161
Tom Rinib81d0d92022-06-20 08:07:55 -0400162config PCI_MSC01
163 bool "MSC01 PCI support"
164 depends on TARGET_MALTA
165
Marek Vasut5012d1e2018-01-18 14:35:35 +0100166config PCI_RCAR_GEN2
167 bool "Renesas RCar Gen2 PCIe driver"
Marek Vasut5012d1e2018-01-18 14:35:35 +0100168 depends on RCAR_32
169 help
170 Say Y here if you want to enable PCIe controller support on
171 Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is
172 also used to access EHCI USB controller on the SoC.
173
Marek Vasut879b4a32018-10-16 12:49:19 +0200174config PCI_RCAR_GEN3
175 bool "Renesas RCar Gen3 PCIe driver"
Marek Vasut879b4a32018-10-16 12:49:19 +0200176 depends on RCAR_GEN3
177 help
178 Say Y here if you want to enable PCIe controller support on
179 Renesas RCar Gen3 SoCs.
180
Simon Glass4d857552015-03-05 12:25:27 -0700181config PCI_SANDBOX
182 bool "Sandbox PCI support"
Simon Glass3933d292021-08-01 18:54:44 -0600183 depends on SANDBOX
Simon Glass4d857552015-03-05 12:25:27 -0700184 help
185 Support PCI on sandbox, as an emulated bus. This permits testing of
186 PCI feature such as bus scanning, device configuration and device
187 access. The available (emulated) devices are defined statically in
188 the device tree but the normal PCI scan technique is used to find
189 then.
190
Tom Rini6c2722e2022-06-20 08:07:53 -0400191config SH7751_PCI
192 bool "SH7751 PCI controller support"
193 depends on SH
194 help
195 SuperH PCI Bridge Configuration
196
Simon Glassc78e3272015-11-19 20:26:55 -0700197config PCI_TEGRA
198 bool "Tegra PCI support"
Trevor Woerner513f6402020-05-06 08:02:41 -0400199 depends on ARCH_TEGRA
Stephen Warren86f6a942016-08-05 16:10:34 -0600200 depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
Simon Glassc78e3272015-11-19 20:26:55 -0700201 help
202 Enable support for the PCIe controller found on some generations of
203 Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has
204 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports
205 with a total of 5 lanes. Some boards require this for Ethernet
206 support to work (e.g. beaver, jetson-tk1).
207
Suneel Garapati4c7d28c2019-10-19 17:28:01 -0700208config PCI_OCTEONTX
209 bool "OcteonTX PCI support"
210 depends on (ARCH_OCTEONTX || ARCH_OCTEONTX2)
211 help
212 Enable support for the OcteonTX/TX2 SoC family ECAM/PEM controllers.
213 These controllers provide PCI configuration access to all on-board
214 peripherals so it should only be disabled for testing purposes
215
Stefan Roese098c7732021-04-07 08:43:35 +0200216config PCIE_OCTEON
217 bool "MIPS Octeon PCIe support"
218 depends on ARCH_OCTEON
219 help
220 Enable support for the MIPS Octeon SoC family PCIe controllers.
221
Paul Burtonc893f212016-09-08 07:47:31 +0100222config PCI_XILINX
223 bool "Xilinx AXI Bridge for PCI Express"
Paul Burtonc893f212016-09-08 07:47:31 +0100224 help
225 Enable support for the Xilinx AXI bridge for PCI express, an IP block
226 which can be used on some generations of Xilinx FPGAs.
227
Minghuan Lianc1067842016-12-13 14:54:17 +0800228config PCIE_LAYERSCAPE
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800229 bool
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800230
231config PCIE_LAYERSCAPE_RC
232 bool "Layerscape PCIe Root Complex mode support"
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800233 select PCIE_LAYERSCAPE
234 help
235 Enable Layerscape PCIe Root Complex mode driver support. The Layerscape
236 SoC may have one or several PCIe controllers. Each controller can be
237 configured to Root Complex mode by clearing the corresponding bit of
238 RCW[HOST_AGT_PEX].
239
Laurentiu Tudor7fd23502020-09-10 12:42:19 +0300240config PCI_IOMMU_EXTRA_MAPPINGS
241 bool "Support for specifying extra IOMMU mappings for PCI"
242 depends on PCIE_LAYERSCAPE_RC
243 help
244 Enable support for specifying extra IOMMU mappings for PCI
245 controllers through a special env var called "pci_iommu_extra" or
246 through a device tree property named "pci-iommu-extra" placed in
247 the node describing the PCI controller.
248 The intent is to cover SR-IOV scenarios which need mappings for VFs
249 and PCI hot-plug scenarios. More documentation can be found under:
250 arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extra
251
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800252config PCIE_LAYERSCAPE_EP
253 bool "Layerscape PCIe Endpoint mode support"
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800254 select PCIE_LAYERSCAPE
255 select PCI_ENDPOINT
Minghuan Lianc1067842016-12-13 14:54:17 +0800256 help
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800257 Enable Layerscape PCIe Endpoint mode driver support. The Layerscape
258 SoC may have one or several PCIe controllers. Each controller can be
259 configured to Endpoint mode by setting the corresponding bit of
260 RCW[HOST_AGT_PEX].
Minghuan Lianc1067842016-12-13 14:54:17 +0800261
Hou Zhiqiange5d79c42019-04-08 10:15:46 +0000262config PCIE_LAYERSCAPE_GEN4
263 bool "Layerscape Gen4 PCIe support"
Hou Zhiqiange5d79c42019-04-08 10:15:46 +0000264 help
265 Support PCIe Gen4 on NXP Layerscape SoCs, which may have one or
266 several PCIe controllers. The PCIe controller can work in RC or
267 EP mode according to RCW[HOST_AGT_PEX] setting.
268
Pankaj Bansal4c656782019-11-30 13:14:00 +0000269config FSL_PCIE_COMPAT
270 string "PCIe compatible of Kernel DT"
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800271 depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4
Pankaj Bansal4c656782019-11-30 13:14:00 +0000272 default "fsl,ls1012a-pcie" if ARCH_LS1012A
273 default "fsl,ls1028a-pcie" if ARCH_LS1028A
274 default "fsl,ls1043a-pcie" if ARCH_LS1043A
275 default "fsl,ls1046a-pcie" if ARCH_LS1046A
276 default "fsl,ls2080a-pcie" if ARCH_LS2080A
277 default "fsl,ls1088a-pcie" if ARCH_LS1088A
Hou Zhiqiang14de76e2021-12-07 18:13:12 +0800278 default "fsl,ls2088a-pcie" if ARCH_LX2160A || ARCH_LX2162A
Pankaj Bansal4c656782019-11-30 13:14:00 +0000279 default "fsl,ls1021a-pcie" if ARCH_LS1021A
280 help
281 This compatible is used to find pci controller node in Kernel DT
282 to complete fixup.
283
Pankaj Bansal64d85a22019-11-30 13:14:10 +0000284config FSL_PCIE_EP_COMPAT
285 string "PCIe EP compatible of Kernel DT"
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800286 depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4
Pankaj Bansal64d85a22019-11-30 13:14:10 +0000287 default "fsl,ls-pcie-ep"
288 help
289 This compatible is used to find pci controller ep node in Kernel DT
290 to complete fixup.
291
Tom Rini2c7b8ec2022-06-20 08:07:46 -0400292config PCIE_IMX
293 bool "i.MX PCIe support"
294 depends on ARCH_MX6
295
Ley Foon Tandc05e632018-04-20 21:55:45 +0800296config PCIE_INTEL_FPGA
297 bool "Intel FPGA PCIe support"
Ley Foon Tandc05e632018-04-20 21:55:45 +0800298 help
299 Say Y here if you want to enable PCIe controller support on Intel
300 FPGA, example Stratix 10.
301
Srinath Mannamd90ba422020-05-12 13:29:50 +0530302config PCIE_IPROC
303 bool "Iproc PCIe support"
Srinath Mannamd90ba422020-05-12 13:29:50 +0530304 help
305 Broadcom iProc PCIe controller driver.
306 Say Y here if you want to enable Broadcom iProc PCIe controller,
307
Stefan Roese3179ec62019-01-25 11:52:43 +0100308config PCI_MVEBU
Pali Roháred9bcb92022-01-13 14:28:04 +0100309 bool "Enable Kirkwood / Armada 370/XP/375/38x PCIe driver"
310 depends on (ARCH_KIRKWOOD || ARCH_MVEBU)
Stefan Roese3179ec62019-01-25 11:52:43 +0100311 select MISC
Pali Rohár5fc93e22021-12-21 12:20:19 +0100312 select DM_RESET
Pali Rohár62297ec2022-08-05 16:03:41 +0200313 select DM_GPIO
Stefan Roese3179ec62019-01-25 11:52:43 +0100314 help
315 Say Y here if you want to enable PCIe controller support on
Pali Roháred9bcb92022-01-13 14:28:04 +0100316 Kirkwood and Armada 370/XP/375/38x SoCs.
Stefan Roese3179ec62019-01-25 11:52:43 +0100317
Neil Armstrongb46caff2021-03-25 15:49:18 +0100318config PCIE_DW_COMMON
319 bool
Neil Armstrongb46caff2021-03-25 15:49:18 +0100320
Sekhar Nori18db23d2019-08-01 19:12:57 +0530321config PCI_KEYSTONE
322 bool "TI Keystone PCIe controller"
Neil Armstrongc0c39ce2021-03-25 15:49:19 +0100323 select PCIE_DW_COMMON
Sekhar Nori18db23d2019-08-01 19:12:57 +0530324 help
325 Say Y here if you want to enable PCI controller support on AM654 SoC.
326
developerad767732019-08-22 12:26:49 +0200327config PCIE_MEDIATEK
328 bool "MediaTek PCIe Gen2 controller"
developerad767732019-08-22 12:26:49 +0200329 depends on ARCH_MEDIATEK
330 help
331 Say Y here if you want to enable Gen2 PCIe controller,
332 which could be found on MT7623 SoC family.
333
Neil Armstrong06e006b2021-03-25 15:49:21 +0100334config PCIE_DW_MESON
335 bool "Amlogic Meson DesignWare based PCIe controller"
336 depends on ARCH_MESON
337 select PCIE_DW_COMMON
338 help
339 Say Y here if you want to enable DW PCIe controller support on
340 Amlogic SoCs.
341
Jagan Teki02262472020-05-09 22:26:21 +0530342config PCIE_ROCKCHIP
343 bool "Enable Rockchip PCIe driver"
Michal Simek7f6d2942020-08-19 10:44:15 +0200344 depends on ARCH_ROCKCHIP
Jagan Teki427603b2020-07-09 23:41:02 +0530345 select PHY_ROCKCHIP_PCIE
Jagan Teki02262472020-05-09 22:26:21 +0530346 default y if ROCKCHIP_RK3399
347 help
348 Say Y here if you want to enable PCIe controller support on
349 Rockchip SoCs.
350
Shawn Linc0649da2021-01-15 18:01:22 +0800351config PCIE_DW_ROCKCHIP
352 bool "Rockchip DesignWare based PCIe controller"
353 depends on ARCH_ROCKCHIP
Neil Armstrongcf214c62021-03-25 15:49:20 +0100354 select PCIE_DW_COMMON
Shawn Linc0649da2021-01-15 18:01:22 +0800355 select PHY_ROCKCHIP_SNPS_PCIE3
356 help
357 Say Y here if you want to enable DW PCIe controller support on
358 Rockchip SoCs.
359
Sylwester Nawrocki88f51f72020-05-25 13:39:58 +0200360config PCI_BRCMSTB
361 bool "Broadcom STB PCIe controller"
Sylwester Nawrocki88f51f72020-05-25 13:39:58 +0200362 depends on ARCH_BCM283X
363 help
364 Say Y here if you want to enable support for PCIe controller
365 on Broadcom set-top-box (STB) SoCs.
366 This driver currently supports only BCM2711 SoC and RC mode
367 of the controller.
Kunihiko Hayashi741a1f92021-07-06 19:01:09 +0900368
369config PCIE_UNIPHIER
370 bool "Socionext UniPhier PCIe driver"
Kunihiko Hayashi741a1f92021-07-06 19:01:09 +0900371 depends on ARCH_UNIPHIER
372 select PHY_UNIPHIER_PCIE
373 help
374 Say Y here if you want to enable PCIe controller support on
375 UniPhier SoCs.
376
Stefan Roese038a3432023-05-25 11:49:18 +0200377config PCIE_XILINX_NWL
378 bool "Xilinx NWL PCIe controller"
379 depends on ARCH_ZYNQMP
380 help
381 Say 'Y' here if you want support for Xilinx / AMD NWL PCIe
382 controller as Root Port.
383
Tom Rinif48e0252016-10-26 17:15:37 -0400384endif