blob: 8d02ab82ad9ffa20aa8bffc82debca29bee1a87b [file] [log] [blame]
Tom Rinif48e0252016-10-26 17:15:37 -04001menuconfig PCI
2 bool "PCI support"
Tom Rini5dec0752021-05-14 21:34:32 -04003 depends on DM
Bin Meng00a17fd2017-07-30 06:23:09 -07004 default y if PPC
Tom Rinif48e0252016-10-26 17:15:37 -04005 help
6 Enable support for PCI (Peripheral Interconnect Bus), a type of bus
7 used on some devices to allow the CPU to communicate with its
8 peripherals.
9
Simon Glass3933d292021-08-01 18:54:44 -060010 This subsystem requires driver model.
Simon Glassb94dc892015-03-05 12:25:25 -070011
Tom Rini5dec0752021-05-14 21:34:32 -040012if PCI
13
Simon Glasseca7b0d2015-11-26 19:51:30 -070014config DM_PCI_COMPAT
15 bool "Enable compatible functions for PCI"
Simon Glasseca7b0d2015-11-26 19:51:30 -070016 help
17 Enable compatibility functions for PCI so that old code can be used
Simon Glass3933d292021-08-01 18:54:44 -060018 with CONFIG_PCI enabled. This should be used as an interim
Simon Glasseca7b0d2015-11-26 19:51:30 -070019 measure when porting a board to use driver model for PCI. Once the
20 board is fully supported, this option should be disabled.
21
Tom Rini50e6f1b2021-12-12 22:12:32 -050022config SYS_PCI_64BIT
23 bool "Enable 64-bit PCI resources"
24 default y if PPC
25 help
26 Enable 64-bit PCI resource access.
27
Wilson Dinga6bdc862018-03-26 15:57:29 +080028config PCI_AARDVARK
29 bool "Enable Aardvark PCIe driver"
Pali Rohár5c6edca2020-08-25 10:45:04 +020030 depends on DM_GPIO
Wilson Dinga6bdc862018-03-26 15:57:29 +080031 depends on ARMADA_3700
32 help
33 Say Y here if you want to enable PCIe controller support on
34 Armada37x0 SoCs. The PCIe controller on Armada37x0 is based on
35 Aardvark hardware.
36
Bin Meng2f49e2e2016-10-16 23:35:18 -070037config PCI_PNP
38 bool "Enable Plug & Play support for PCI"
Bin Meng2f49e2e2016-10-16 23:35:18 -070039 default y
40 help
41 Enable PCI memory and I/O space resource allocation and assignment.
42
Mayuresh Chitale1cee77e2023-06-03 19:32:55 +053043config SPL_PCI_PNP
Heinrich Schuchardt3bccce32023-07-24 21:27:26 +020044 bool "Enable Plug & Play support for PCI in SPL"
45 depends on SPL_PCI
Mayuresh Chitale1cee77e2023-06-03 19:32:55 +053046 help
47 Enable PCI memory and I/O space resource allocation and assignment.
Simon Glass797b8e82023-07-15 21:38:55 -060048
Mayuresh Chitale1cee77e2023-06-03 19:32:55 +053049 This is required to auto configure the enumerated devices.
50
Simon Glass797b8e82023-07-15 21:38:55 -060051 This is normally not done in SPL, but can be enabled if devices must
52 be set up in the SPL phase. Often it is enough to manually configure
53 one device, so this option can be disabled.
54
Suneel Garapati3ac3aec2019-10-19 17:10:20 -070055config PCI_REGION_MULTI_ENTRY
56 bool "Enable Multiple entries of region type MEMORY in ranges for PCI"
Suneel Garapati3ac3aec2019-10-19 17:10:20 -070057 help
58 Enable PCI memory regions to be of multiple entry. Multiple entry
59 here refers to allow more than one count of address ranges for MEMORY
60 region type. This helps to add support for SoC's like OcteonTX/TX2
61 where every peripheral is on the PCI bus.
62
Tom Rini77d9e9f2022-06-20 08:07:50 -040063config PCI_CONFIG_HOST_BRIDGE
64 bool "Configure PCI host bridges"
65 default y if X86
66
Daniel Schwierzeckf59925e2021-07-15 20:53:56 +020067config PCI_MAP_SYSTEM_MEMORY
68 bool "Map local system memory from a virtual base address"
Daniel Schwierzeckf59925e2021-07-15 20:53:56 +020069 depends on MIPS
Daniel Schwierzeckf59925e2021-07-15 20:53:56 +020070 help
71 Say Y if base address of system memory is being used as a virtual address
72 instead of a physical address (e.g. on MIPS). The PCI core will then remap
73 the virtual memory base address to a physical address when adding the PCI
74 region of type PCI_REGION_SYS_MEMORY.
Tom Rinibb4dd962022-11-16 13:10:37 -050075 This should only be required on MIPS where CFG_SYS_SDRAM_BASE is still
Daniel Schwierzeckf59925e2021-07-15 20:53:56 +020076 being used as virtual address.
77
Suneel Garapati13822f72019-10-19 16:07:20 -070078config PCI_SRIOV
79 bool "Enable Single Root I/O Virtualization support for PCI"
Suneel Garapati13822f72019-10-19 16:07:20 -070080 help
81 Say Y here if you want to enable PCI Single Root I/O Virtualization
82 capability support. This helps to enumerate Virtual Function devices
83 if available on a PCI Physical Function device and probe for
84 applicable drivers.
85
Andrew Scull71e7e1a2022-04-21 16:11:16 +000086config PCI_ENHANCED_ALLOCATION
87 bool "Enable support for Enhanced Allocation of resources"
88 default y
89 help
90 Enable support for Enhanced Allocation which can be used by supported
91 devices in place of traditional BARS for allocation of resources.
92
Suneel Garapatia99a5eb2019-10-23 18:40:36 -070093config PCI_ARID
94 bool "Enable Alternate Routing-ID support for PCI"
Suneel Garapatia99a5eb2019-10-23 18:40:36 -070095 help
96 Say Y here if you want to enable Alternate Routing-ID capability
97 support on PCI devices. This helps to skip some devices in BDF
98 scan that are not present.
99
Tom Rini6fe72702022-06-20 08:07:48 -0400100config PCI_SCAN_SHOW
101 bool "Show PCI devices during startup"
102 depends on PCIE_IMX
103
Tuomas Tynkkynena765f712017-09-19 23:18:06 +0300104config PCIE_ECAM_GENERIC
105 bool "Generic ECAM-based PCI host controller support"
Tuomas Tynkkynena765f712017-09-19 23:18:06 +0300106 help
107 Say Y here if you want to enable support for generic ECAM-based
108 PCIe host controllers, such as the one emulated by QEMU.
109
Masami Hiramatsu06850202021-06-04 18:44:06 +0900110config PCIE_ECAM_SYNQUACER
111 bool "SynQuacer ECAM-based PCI host controller support"
Masami Hiramatsu06850202021-06-04 18:44:06 +0900112 select PCI_INIT_R
113 select PCI_REGION_MULTI_ENTRY
114 help
115 Say Y here if you want to enable support for Socionext
116 SynQuacer SoC's ECAM-based PCIe host controllers.
117 Note that this must be configured when boot because Linux driver
118 expects the PCIe RC has been configured in the bootloader.
119
Mark Kettenis59b09ba2023-01-21 20:27:58 +0100120config PCIE_APPLE
121 bool "Enable Apple PCIe driver"
122 depends on ARCH_APPLE
123 imply PCI_INIT_R
Mark Kettenis973fbb52023-07-14 21:15:16 +0200124 select SYS_PCI_64BIT
Mark Kettenis59b09ba2023-01-21 20:27:58 +0100125 default y
126 help
127 Say Y here if you want to enable PCIe controller support on
128 Apple SoCs.
129
Sergei Antonov026f1e92023-07-30 21:17:09 +0300130config PCI_FTPCI100
131 bool "Enable Faraday FTPCI100 PCI Bridge Controller driver"
132 help
133 Say Y here if you want to enable Faraday FTPCI100 PCI.
134 FTPCI100 IP is used in SoC chip designs.
135
Tom Rinie9e57582022-06-20 08:07:49 -0400136config PCI_GT64120
137 bool "GT64120 PCI support"
138 depends on MIPS
139
liu hao1c4a2c42019-10-31 07:51:08 +0000140config PCI_PHYTIUM
141 bool "Phytium PCIe support"
liu hao1c4a2c42019-10-31 07:51:08 +0000142 help
143 Say Y here if you want to enable PCIe controller support on
144 Phytium SoCs.
145
Shadi Ammouri3b386452016-10-27 13:29:41 +0200146config PCIE_DW_MVEBU
147 bool "Enable Armada-8K PCIe driver (DesignWare core)"
Shadi Ammouri3b386452016-10-27 13:29:41 +0200148 depends on ARMADA_8K
149 help
150 Say Y here if you want to enable PCIe controller support on
151 Armada-8K SoCs. The PCIe controller on Armada-8K is based on
152 DesignWare hardware.
153
Green Wanba5919b2021-05-27 06:52:10 -0700154config PCIE_DW_SIFIVE
155 bool "Enable SiFive FU740 PCIe"
156 depends on CLK_SIFIVE_PRCI
157 depends on RESET_SIFIVE
158 depends on SIFIVE_GPIO
159 select PCIE_DW_COMMON
160 help
161 Say Y here if you want to enable PCIe controller support on
162 FU740.
163
Tom Rinif24d48a2022-06-20 08:07:56 -0400164config SYS_FSL_PCI_VER_3_X
165 bool
166
Hou Zhiqiang25ff98c2019-04-24 22:33:02 +0800167config PCIE_FSL
168 bool "FSL PowerPC PCIe support"
Tom Rinif24d48a2022-06-20 08:07:56 -0400169 select SYS_FSL_PCI_VER_3_X if ARCH_T2080 || ARCH_T4240
Hou Zhiqiang25ff98c2019-04-24 22:33:02 +0800170 help
171 Say Y here if you want to enable PCIe controller support on FSL
172 PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs.
173 This driver does not support SRIO_PCIE_BOOT feature.
174
Heiko Schocherd647b462019-10-14 11:29:39 +0200175config PCI_MPC85XX
176 bool "MPC85XX PowerPC PCI support"
Heiko Schocherd647b462019-10-14 11:29:39 +0200177 help
178 Say Y here if you want to enable PCI controller support on FSL
179 PowerPC MPC85xx SoC.
180
Tom Rinib81d0d92022-06-20 08:07:55 -0400181config PCI_MSC01
182 bool "MSC01 PCI support"
183 depends on TARGET_MALTA
184
Marek Vasut5012d1e2018-01-18 14:35:35 +0100185config PCI_RCAR_GEN2
186 bool "Renesas RCar Gen2 PCIe driver"
Marek Vasut5012d1e2018-01-18 14:35:35 +0100187 depends on RCAR_32
188 help
189 Say Y here if you want to enable PCIe controller support on
190 Renesas RCar Gen2 SoCs. The PCIe controller on RCar Gen2 is
191 also used to access EHCI USB controller on the SoC.
192
Marek Vasut879b4a32018-10-16 12:49:19 +0200193config PCI_RCAR_GEN3
194 bool "Renesas RCar Gen3 PCIe driver"
Marek Vasut879b4a32018-10-16 12:49:19 +0200195 depends on RCAR_GEN3
196 help
197 Say Y here if you want to enable PCIe controller support on
198 Renesas RCar Gen3 SoCs.
199
Simon Glass4d857552015-03-05 12:25:27 -0700200config PCI_SANDBOX
201 bool "Sandbox PCI support"
Simon Glass3933d292021-08-01 18:54:44 -0600202 depends on SANDBOX
Simon Glass4d857552015-03-05 12:25:27 -0700203 help
204 Support PCI on sandbox, as an emulated bus. This permits testing of
205 PCI feature such as bus scanning, device configuration and device
206 access. The available (emulated) devices are defined statically in
207 the device tree but the normal PCI scan technique is used to find
208 then.
209
Tom Rini6c2722e2022-06-20 08:07:53 -0400210config SH7751_PCI
211 bool "SH7751 PCI controller support"
212 depends on SH
213 help
214 SuperH PCI Bridge Configuration
215
Simon Glassc78e3272015-11-19 20:26:55 -0700216config PCI_TEGRA
217 bool "Tegra PCI support"
Trevor Woerner513f6402020-05-06 08:02:41 -0400218 depends on ARCH_TEGRA
Stephen Warren86f6a942016-08-05 16:10:34 -0600219 depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
Simon Glassc78e3272015-11-19 20:26:55 -0700220 help
221 Enable support for the PCIe controller found on some generations of
222 Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has
223 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports
224 with a total of 5 lanes. Some boards require this for Ethernet
225 support to work (e.g. beaver, jetson-tk1).
226
Suneel Garapati4c7d28c2019-10-19 17:28:01 -0700227config PCI_OCTEONTX
228 bool "OcteonTX PCI support"
229 depends on (ARCH_OCTEONTX || ARCH_OCTEONTX2)
230 help
231 Enable support for the OcteonTX/TX2 SoC family ECAM/PEM controllers.
232 These controllers provide PCI configuration access to all on-board
233 peripherals so it should only be disabled for testing purposes
234
Stefan Roese098c7732021-04-07 08:43:35 +0200235config PCIE_OCTEON
236 bool "MIPS Octeon PCIe support"
237 depends on ARCH_OCTEON
238 help
239 Enable support for the MIPS Octeon SoC family PCIe controllers.
240
Paul Burtonc893f212016-09-08 07:47:31 +0100241config PCI_XILINX
242 bool "Xilinx AXI Bridge for PCI Express"
Paul Burtonc893f212016-09-08 07:47:31 +0100243 help
244 Enable support for the Xilinx AXI bridge for PCI express, an IP block
245 which can be used on some generations of Xilinx FPGAs.
246
Minghuan Lianc1067842016-12-13 14:54:17 +0800247config PCIE_LAYERSCAPE
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800248 bool
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800249
250config PCIE_LAYERSCAPE_RC
251 bool "Layerscape PCIe Root Complex mode support"
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800252 select PCIE_LAYERSCAPE
253 help
254 Enable Layerscape PCIe Root Complex mode driver support. The Layerscape
255 SoC may have one or several PCIe controllers. Each controller can be
256 configured to Root Complex mode by clearing the corresponding bit of
257 RCW[HOST_AGT_PEX].
258
Laurentiu Tudor7fd23502020-09-10 12:42:19 +0300259config PCI_IOMMU_EXTRA_MAPPINGS
260 bool "Support for specifying extra IOMMU mappings for PCI"
261 depends on PCIE_LAYERSCAPE_RC
262 help
263 Enable support for specifying extra IOMMU mappings for PCI
264 controllers through a special env var called "pci_iommu_extra" or
265 through a device tree property named "pci-iommu-extra" placed in
266 the node describing the PCI controller.
267 The intent is to cover SR-IOV scenarios which need mappings for VFs
268 and PCI hot-plug scenarios. More documentation can be found under:
269 arch/arm/cpu/armv8/fsl-layerscape/doc/README.pci_iommu_extra
270
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800271config PCIE_LAYERSCAPE_EP
272 bool "Layerscape PCIe Endpoint mode support"
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800273 select PCIE_LAYERSCAPE
274 select PCI_ENDPOINT
Minghuan Lianc1067842016-12-13 14:54:17 +0800275 help
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800276 Enable Layerscape PCIe Endpoint mode driver support. The Layerscape
277 SoC may have one or several PCIe controllers. Each controller can be
278 configured to Endpoint mode by setting the corresponding bit of
279 RCW[HOST_AGT_PEX].
Minghuan Lianc1067842016-12-13 14:54:17 +0800280
Hou Zhiqiange5d79c42019-04-08 10:15:46 +0000281config PCIE_LAYERSCAPE_GEN4
282 bool "Layerscape Gen4 PCIe support"
Hou Zhiqiange5d79c42019-04-08 10:15:46 +0000283 help
284 Support PCIe Gen4 on NXP Layerscape SoCs, which may have one or
285 several PCIe controllers. The PCIe controller can work in RC or
286 EP mode according to RCW[HOST_AGT_PEX] setting.
287
Pankaj Bansal4c656782019-11-30 13:14:00 +0000288config FSL_PCIE_COMPAT
289 string "PCIe compatible of Kernel DT"
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800290 depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4
Pankaj Bansal4c656782019-11-30 13:14:00 +0000291 default "fsl,ls1012a-pcie" if ARCH_LS1012A
292 default "fsl,ls1028a-pcie" if ARCH_LS1028A
293 default "fsl,ls1043a-pcie" if ARCH_LS1043A
294 default "fsl,ls1046a-pcie" if ARCH_LS1046A
295 default "fsl,ls2080a-pcie" if ARCH_LS2080A
296 default "fsl,ls1088a-pcie" if ARCH_LS1088A
Hou Zhiqiang14de76e2021-12-07 18:13:12 +0800297 default "fsl,ls2088a-pcie" if ARCH_LX2160A || ARCH_LX2162A
Pankaj Bansal4c656782019-11-30 13:14:00 +0000298 default "fsl,ls1021a-pcie" if ARCH_LS1021A
299 help
300 This compatible is used to find pci controller node in Kernel DT
301 to complete fixup.
302
Pankaj Bansal64d85a22019-11-30 13:14:10 +0000303config FSL_PCIE_EP_COMPAT
304 string "PCIe EP compatible of Kernel DT"
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800305 depends on PCIE_LAYERSCAPE_RC || PCIE_LAYERSCAPE_GEN4
Pankaj Bansal64d85a22019-11-30 13:14:10 +0000306 default "fsl,ls-pcie-ep"
307 help
308 This compatible is used to find pci controller ep node in Kernel DT
309 to complete fixup.
310
Tom Rini2c7b8ec2022-06-20 08:07:46 -0400311config PCIE_IMX
312 bool "i.MX PCIe support"
313 depends on ARCH_MX6
314
Ley Foon Tandc05e632018-04-20 21:55:45 +0800315config PCIE_INTEL_FPGA
316 bool "Intel FPGA PCIe support"
Ley Foon Tandc05e632018-04-20 21:55:45 +0800317 help
318 Say Y here if you want to enable PCIe controller support on Intel
319 FPGA, example Stratix 10.
320
Srinath Mannamd90ba422020-05-12 13:29:50 +0530321config PCIE_IPROC
322 bool "Iproc PCIe support"
Srinath Mannamd90ba422020-05-12 13:29:50 +0530323 help
324 Broadcom iProc PCIe controller driver.
325 Say Y here if you want to enable Broadcom iProc PCIe controller,
326
Stefan Roese3179ec62019-01-25 11:52:43 +0100327config PCI_MVEBU
Pali Roháred9bcb92022-01-13 14:28:04 +0100328 bool "Enable Kirkwood / Armada 370/XP/375/38x PCIe driver"
329 depends on (ARCH_KIRKWOOD || ARCH_MVEBU)
Stefan Roese3179ec62019-01-25 11:52:43 +0100330 select MISC
Pali Rohár5fc93e22021-12-21 12:20:19 +0100331 select DM_RESET
Pali Rohár62297ec2022-08-05 16:03:41 +0200332 select DM_GPIO
Stefan Roese3179ec62019-01-25 11:52:43 +0100333 help
334 Say Y here if you want to enable PCIe controller support on
Pali Roháred9bcb92022-01-13 14:28:04 +0100335 Kirkwood and Armada 370/XP/375/38x SoCs.
Stefan Roese3179ec62019-01-25 11:52:43 +0100336
Neil Armstrongb46caff2021-03-25 15:49:18 +0100337config PCIE_DW_COMMON
338 bool
Neil Armstrongb46caff2021-03-25 15:49:18 +0100339
Sekhar Nori18db23d2019-08-01 19:12:57 +0530340config PCI_KEYSTONE
341 bool "TI Keystone PCIe controller"
Neil Armstrongc0c39ce2021-03-25 15:49:19 +0100342 select PCIE_DW_COMMON
Sekhar Nori18db23d2019-08-01 19:12:57 +0530343 help
344 Say Y here if you want to enable PCI controller support on AM654 SoC.
345
developerad767732019-08-22 12:26:49 +0200346config PCIE_MEDIATEK
347 bool "MediaTek PCIe Gen2 controller"
developerad767732019-08-22 12:26:49 +0200348 depends on ARCH_MEDIATEK
349 help
350 Say Y here if you want to enable Gen2 PCIe controller,
351 which could be found on MT7623 SoC family.
352
Neil Armstrong06e006b2021-03-25 15:49:21 +0100353config PCIE_DW_MESON
354 bool "Amlogic Meson DesignWare based PCIe controller"
355 depends on ARCH_MESON
356 select PCIE_DW_COMMON
357 help
358 Say Y here if you want to enable DW PCIe controller support on
359 Amlogic SoCs.
360
Jagan Teki02262472020-05-09 22:26:21 +0530361config PCIE_ROCKCHIP
362 bool "Enable Rockchip PCIe driver"
Michal Simek7f6d2942020-08-19 10:44:15 +0200363 depends on ARCH_ROCKCHIP
Jagan Teki427603b2020-07-09 23:41:02 +0530364 select PHY_ROCKCHIP_PCIE
Jagan Teki02262472020-05-09 22:26:21 +0530365 default y if ROCKCHIP_RK3399
366 help
367 Say Y here if you want to enable PCIe controller support on
368 Rockchip SoCs.
369
Shawn Linc0649da2021-01-15 18:01:22 +0800370config PCIE_DW_ROCKCHIP
371 bool "Rockchip DesignWare based PCIe controller"
372 depends on ARCH_ROCKCHIP
Neil Armstrongcf214c62021-03-25 15:49:20 +0100373 select PCIE_DW_COMMON
Shawn Linc0649da2021-01-15 18:01:22 +0800374 select PHY_ROCKCHIP_SNPS_PCIE3
375 help
376 Say Y here if you want to enable DW PCIe controller support on
377 Rockchip SoCs.
378
Sylwester Nawrocki88f51f72020-05-25 13:39:58 +0200379config PCI_BRCMSTB
380 bool "Broadcom STB PCIe controller"
Sylwester Nawrocki88f51f72020-05-25 13:39:58 +0200381 depends on ARCH_BCM283X
382 help
383 Say Y here if you want to enable support for PCIe controller
384 on Broadcom set-top-box (STB) SoCs.
385 This driver currently supports only BCM2711 SoC and RC mode
386 of the controller.
Kunihiko Hayashi741a1f92021-07-06 19:01:09 +0900387
388config PCIE_UNIPHIER
389 bool "Socionext UniPhier PCIe driver"
Kunihiko Hayashi741a1f92021-07-06 19:01:09 +0900390 depends on ARCH_UNIPHIER
391 select PHY_UNIPHIER_PCIE
392 help
393 Say Y here if you want to enable PCIe controller support on
394 UniPhier SoCs.
395
Stefan Roese038a3432023-05-25 11:49:18 +0200396config PCIE_XILINX_NWL
397 bool "Xilinx NWL PCIe controller"
398 depends on ARCH_ZYNQMP
399 help
400 Say 'Y' here if you want support for Xilinx / AMD NWL PCIe
401 controller as Root Port.
402
Mason Huo08059f02023-07-25 17:46:48 +0800403config PCIE_PLDA_COMMON
404 bool
405
406config PCIE_STARFIVE_JH7110
407 bool "Enable Starfive JH7110 PCIe driver"
408 select PCIE_PLDA_COMMON
409 imply STARFIVE_JH7110
410 imply CLK_JH7110
411 imply RESET_JH7110
412 help
413 Say Y here if you want to enable PLDA XpressRich PCIe controller
414 support on StarFive JH7110 SoC.
415
Sumit Garg3aa50882024-03-21 20:25:03 +0530416config PCIE_DW_IMX
417 bool "i.MX DW PCIe controller support"
418 depends on ARCH_IMX8M
419 select PCIE_DW_COMMON
420 select DM_REGULATOR
421 select REGMAP
422 select SYSCON
423 help
424 Say Y here if you want to enable DW PCIe controller support on
425 iMX SoCs.
426
Tom Rinif48e0252016-10-26 17:15:37 -0400427endif