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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Gabor Juhos02c754a2013-05-22 03:57:37 +00002/*
3 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
Gabor Juhos02c754a2013-05-22 03:57:37 +00004 */
5
Paul Burton10a74b52013-11-09 10:22:08 +00006#ifndef _MALTA_CONFIG_H
7#define _MALTA_CONFIG_H
Gabor Juhos02c754a2013-05-22 03:57:37 +00008
Gabor Juhos02c754a2013-05-22 03:57:37 +00009/*
10 * System configuration
11 */
Paul Burton10a74b52013-11-09 10:22:08 +000012#define CONFIG_MALTA
Gabor Juhos02c754a2013-05-22 03:57:37 +000013
Gabor Juhos5e195152013-10-24 14:32:00 +020014#define CONFIG_MEMSIZE_IN_BYTES
15
Gabor Juhos652ccee2013-05-22 03:57:42 +000016#define CONFIG_PCI_GT64120
Paul Burton234882c2013-11-08 11:18:50 +000017#define CONFIG_PCI_MSC01
Gabor Juhos439c50c2013-05-22 03:57:44 +000018#define CONFIG_PCNET
Paul Burtonf38eea62013-11-08 11:18:52 +000019#define PCNET_HAS_PROM
Gabor Juhos652ccee2013-05-22 03:57:42 +000020
Paul Burtonc028f9b2013-11-08 11:18:55 +000021#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
22
Gabor Juhos02c754a2013-05-22 03:57:37 +000023/*
24 * CPU Configuration
25 */
26#define CONFIG_SYS_MHZ 250 /* arbitrary value */
27#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
Gabor Juhos02c754a2013-05-22 03:57:37 +000028
Gabor Juhos02c754a2013-05-22 03:57:37 +000029/*
30 * Memory map
31 */
Gabor Juhosc1df3702013-11-12 16:47:32 +010032#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Gabor Juhos02c754a2013-05-22 03:57:37 +000033
Paul Burton825cfbd2016-05-26 14:49:36 +010034#ifdef CONFIG_64BIT
35# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
36#else
37# define CONFIG_SYS_SDRAM_BASE 0x80000000
38#endif
Gabor Juhos02c754a2013-05-22 03:57:37 +000039#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
40
41#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
42
Paul Burton825cfbd2016-05-26 14:49:36 +010043#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
Gabor Juhos02c754a2013-05-22 03:57:37 +000044
45#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
46#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
Paul Burton657b9352013-11-26 17:45:28 +000047#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
Gabor Juhos02c754a2013-05-22 03:57:37 +000048
Gabor Juhos02c754a2013-05-22 03:57:37 +000049/*
50 * Serial driver
51 */
Paul Burton58ce2cc2016-05-17 07:43:27 +010052#define CONFIG_SYS_NS16550_PORT_MAPPED
Gabor Juhos02c754a2013-05-22 03:57:37 +000053
54/*
Gabor Juhos02c754a2013-05-22 03:57:37 +000055 * Flash configuration
56 */
Paul Burton825cfbd2016-05-26 14:49:36 +010057#ifdef CONFIG_64BIT
58# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
59#else
60# define CONFIG_SYS_FLASH_BASE 0xbe000000
61#endif
Gabor Juhos2c434772013-05-22 03:57:39 +000062#define CONFIG_SYS_MAX_FLASH_BANKS 1
63#define CONFIG_SYS_MAX_FLASH_SECT 128
Gabor Juhos02c754a2013-05-22 03:57:37 +000064
65/*
Paul Burton60465222013-11-08 11:18:56 +000066 * Environment
67 */
Paul Burton60465222013-11-08 11:18:56 +000068
69/*
Paul Burtonc6c38532015-01-29 10:38:20 +000070 * IDE/ATA
71 */
72#define CONFIG_SYS_IDE_MAXBUS 1
73#define CONFIG_SYS_IDE_MAXDEVICE 2
74#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
75#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
76#define CONFIG_SYS_ATA_DATA_OFFSET 0
77#define CONFIG_SYS_ATA_REG_OFFSET 0
78
79/*
Gabor Juhos02c754a2013-05-22 03:57:37 +000080 * Commands
81 */
Gabor Juhos652ccee2013-05-22 03:57:42 +000082
Paul Burton10a74b52013-11-09 10:22:08 +000083#endif /* _MALTA_CONFIG_H */