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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Sricharan9310ff72011-11-15 09:49:55 -05002/*
3 * (C) Copyright 2010
4 * Texas Instruments, <www.ti.com>
Sricharan9310ff72011-11-15 09:49:55 -05005 */
6
7#ifndef _SYS_PROTO_H_
8#define _SYS_PROTO_H_
9
10#include <asm/arch/omap.h>
11#include <asm/io.h>
Lokesh Vutla61c517f2013-05-30 02:54:32 +000012#include <asm/arch/clock.h>
Sricharan9310ff72011-11-15 09:49:55 -050013#include <asm/omap_common.h>
pekon gupta5bbb0992013-11-22 16:53:29 +053014#include <linux/mtd/omap_gpmc.h>
Lokesh Vutla61c517f2013-05-30 02:54:32 +000015#include <asm/arch/clock.h>
Tom Rini72f36002014-05-16 13:02:24 -040016#include <asm/ti-common/sys_proto.h>
Sricharan9310ff72011-11-15 09:49:55 -050017
Lokesh Vutlaf0ee64a2015-06-04 16:42:37 +053018/*
19 * Structure for Iodelay configuration registers.
20 * Theoretical max for g_delay is 21560 ps.
21 * Theoretical max for a_delay is 1/3rd of g_delay max.
22 * So using u16 for both a/g_delay.
23 */
24struct iodelay_cfg_entry {
25 u16 offset;
26 u16 a_delay;
27 u16 g_delay;
28};
29
Lokesh Vutla40700ad2013-02-12 21:29:08 +000030struct pad_conf_entry {
31 u32 offset;
32 u32 val;
33};
34
Kishon Vijay Abraham I8c2efe92018-01-30 16:01:41 +010035struct mmc_platform_fixups {
36 const char *hw_rev;
37 u32 unsupported_caps;
38 u32 max_freq;
39};
40
Sricharan9310ff72011-11-15 09:49:55 -050041struct omap_sysinfo {
42 char *board_string;
43};
44extern const struct omap_sysinfo sysinfo;
45
Sricharan9310ff72011-11-15 09:49:55 -050046void gpmc_init(void);
47void watchdog_init(void);
48u32 get_device_type(void);
49void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
Lokesh Vutla5dedc172015-06-04 16:42:33 +053050void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size);
Paul Kocialkowskia00b1e52016-02-27 19:18:56 +010051void set_muxconf_regs(void);
Sricharan9310ff72011-11-15 09:49:55 -050052u32 wait_on_value(u32, u32, void *, u32);
53void sdelay(unsigned long);
Kipisz, Stevenebe86dc2016-02-24 12:30:52 -060054void setup_early_clocks(void);
Sricharan9310ff72011-11-15 09:49:55 -050055void prcm_init(void);
Kipisz, Steven4466dfb2016-02-24 12:30:57 -060056void do_board_detect(void);
Keerthy35740ec2016-05-24 11:45:05 +053057void vcores_init(void);
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +000058void bypass_dpll(u32 const base);
Sricharan9310ff72011-11-15 09:49:55 -050059void freq_update_core(void);
60u32 get_sys_clk_freq(void);
61u32 omap5_ddr_clk(void);
62void cancel_out(u32 *num, u32 *den, u32 den_limit);
63void sdram_init(void);
64u32 omap_sdram_size(void);
65u32 cortex_rev(void);
Tom Rini51df26c2013-05-31 12:31:59 -040066void save_omap_boot_params(void);
Sricharan9310ff72011-11-15 09:49:55 -050067void init_omap_revision(void);
Lokesh Vutla69483e62017-12-29 11:47:51 +053068void init_package_revision(void);
Sricharan9310ff72011-11-15 09:49:55 -050069void do_io_settings(void);
Lokesh Vutlaae49f6d2013-05-30 02:54:33 +000070void sri2c_init(void);
Nishanth Menon41d7ab12012-03-01 14:17:37 +000071int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
Lokesh Vutlae89f1542012-05-29 19:26:41 +000072u32 warm_reset(void);
Lokesh Vutlaba873772012-05-29 19:26:43 +000073void force_emif_self_refresh(void);
Lokesh Vutlad8ac0502013-02-04 04:22:05 +000074void get_ioregs(const struct ctrl_ioregs **regs);
Lokesh Vutla28049632013-02-12 01:33:45 +000075void srcomp_enable(void);
Lokesh Vutla100c2d82013-04-17 20:49:40 +000076void setup_warmreset_time(void);
Kishon Vijay Abraham I8c2efe92018-01-30 16:01:41 +010077const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr);
Sricharan9310ff72011-11-15 09:49:55 -050078
Lokesh Vutla100c2d82013-04-17 20:49:40 +000079static inline u32 div_round_up(u32 num, u32 den)
80{
81 return (num + den - 1)/den;
82}
83
84static inline u32 usec_to_32k(u32 usec)
85{
86 return div_round_up(32768 * usec, 1000000);
87}
Praveen Rao3206b8a2015-03-09 17:12:06 -050088
89#define OMAP5_SERVICE_L2ACTLR_SET 0x104
Nishanth Menon2740b832015-07-27 16:26:06 -050090#define OMAP5_SERVICE_ACR_SET 0x107
Praveen Rao3206b8a2015-03-09 17:12:06 -050091
Sricharan9310ff72011-11-15 09:49:55 -050092#endif