commit 2740b83f2c58a07efbf2a9696a4fe576788b555a
author Nishanth Menon <nm@ti.com> Mon Jul 27 16:26:06 2015 -0500
committer Tom Rini <trini@konsulko.com> Wed Aug 12 20:47:50 2015 -0400
tree 14d79050cbb4c40d8f5ef4a285d8decac0cf0c36
parent 6e2bd2eb3af7a2805ab780d226b713f9fa166ae0

ARM: DRA7/ OMAP5: implement Auxiliary Control Register configuration

Implement logic for ACR(Auxiliary Control Register) configuration using
ROM Code smc service.

Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>

arch/arm/include/asm/arch-omap5/sys_proto.h

diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h
index 6da8297..7fcb783 100644
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -81,5 +81,6 @@
 }
 
 #define OMAP5_SERVICE_L2ACTLR_SET    0x104
+#define OMAP5_SERVICE_ACR_SET        0x107
 
 #endif