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Sricharan9310ff72011-11-15 09:49:55 -05001/*
2 * (C) Copyright 2010
3 * Texas Instruments, <www.ti.com>
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Sricharan9310ff72011-11-15 09:49:55 -05006 */
7
8#ifndef _SYS_PROTO_H_
9#define _SYS_PROTO_H_
10
11#include <asm/arch/omap.h>
12#include <asm/io.h>
Lokesh Vutla61c517f2013-05-30 02:54:32 +000013#include <asm/arch/clock.h>
Sricharan9310ff72011-11-15 09:49:55 -050014#include <asm/omap_common.h>
pekon gupta5bbb0992013-11-22 16:53:29 +053015#include <linux/mtd/omap_gpmc.h>
Lokesh Vutla61c517f2013-05-30 02:54:32 +000016#include <asm/arch/clock.h>
Tom Rini72f36002014-05-16 13:02:24 -040017#include <asm/ti-common/sys_proto.h>
Sricharan9310ff72011-11-15 09:49:55 -050018
SRICHARAN R3f30b0a2013-04-24 00:41:24 +000019DECLARE_GLOBAL_DATA_PTR;
20
Lokesh Vutla40700ad2013-02-12 21:29:08 +000021struct pad_conf_entry {
22 u32 offset;
23 u32 val;
24};
25
Sricharan9310ff72011-11-15 09:49:55 -050026struct omap_sysinfo {
27 char *board_string;
28};
29extern const struct omap_sysinfo sysinfo;
30
Sricharan9310ff72011-11-15 09:49:55 -050031void gpmc_init(void);
32void watchdog_init(void);
33u32 get_device_type(void);
34void do_set_mux(u32 base, struct pad_conf_entry const *array, int size);
35void set_muxconf_regs_essential(void);
Sricharan9310ff72011-11-15 09:49:55 -050036u32 wait_on_value(u32, u32, void *, u32);
37void sdelay(unsigned long);
Sricharan9310ff72011-11-15 09:49:55 -050038void setup_clocks_for_console(void);
39void prcm_init(void);
SRICHARAN Rfb6aa1f2013-02-04 04:22:00 +000040void bypass_dpll(u32 const base);
Sricharan9310ff72011-11-15 09:49:55 -050041void freq_update_core(void);
42u32 get_sys_clk_freq(void);
43u32 omap5_ddr_clk(void);
44void cancel_out(u32 *num, u32 *den, u32 den_limit);
45void sdram_init(void);
46u32 omap_sdram_size(void);
47u32 cortex_rev(void);
Tom Rini51df26c2013-05-31 12:31:59 -040048void save_omap_boot_params(void);
Sricharan9310ff72011-11-15 09:49:55 -050049void init_omap_revision(void);
50void do_io_settings(void);
Lokesh Vutlaae49f6d2013-05-30 02:54:33 +000051void sri2c_init(void);
Lokesh Vutla36852972013-05-30 03:19:29 +000052void gpi2c_init(void);
Nishanth Menon41d7ab12012-03-01 14:17:37 +000053int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data);
Lokesh Vutlae89f1542012-05-29 19:26:41 +000054u32 warm_reset(void);
Lokesh Vutlaba873772012-05-29 19:26:43 +000055void force_emif_self_refresh(void);
Lokesh Vutlad8ac0502013-02-04 04:22:05 +000056void get_ioregs(const struct ctrl_ioregs **regs);
Lokesh Vutla28049632013-02-12 01:33:45 +000057void srcomp_enable(void);
Lokesh Vutla100c2d82013-04-17 20:49:40 +000058void setup_warmreset_time(void);
Sricharan9310ff72011-11-15 09:49:55 -050059
Lokesh Vutla100c2d82013-04-17 20:49:40 +000060static inline u32 div_round_up(u32 num, u32 den)
61{
62 return (num + den - 1)/den;
63}
64
65static inline u32 usec_to_32k(u32 usec)
66{
67 return div_round_up(32768 * usec, 1000000);
68}
Praveen Rao3206b8a2015-03-09 17:12:06 -050069
70#define OMAP5_SERVICE_L2ACTLR_SET 0x104
71
Sricharan9310ff72011-11-15 09:49:55 -050072#endif