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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ruchika Gupta8ca8d822010-12-15 17:02:08 +00002/*
3 * Copyright 2010-2011 Freescale Semiconductor, Inc.
Ruchika Gupta8ca8d822010-12-15 17:02:08 +00004 */
5
6#ifndef __FSL_SECURE_BOOT_H
7#define __FSL_SECURE_BOOT_H
gaurav rana8b5ea652015-02-27 09:46:17 +05308#include <asm/config_mpc85xx.h>
Ruchika Gupta8ca8d822010-12-15 17:02:08 +00009
Udit Agarwald2dd2f72019-11-07 16:11:39 +000010#ifdef CONFIG_NXP_ESBC
Ruchika Gupta8ca8d822010-12-15 17:02:08 +000011#if defined(CONFIG_FSL_CORENET)
12#define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000
York Sun4620e1f2016-11-15 18:32:50 -080013#elif defined(CONFIG_TARGET_BSC9132QDS)
Aneesh Bansalbf955b22014-03-12 00:07:27 +053014#define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000
York Sunc6c51ae2016-11-16 11:51:24 -080015#elif defined(CONFIG_TARGET_C29XPCIE)
Aneesh Bansal11421b42014-12-12 15:35:04 +053016#define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000
Ruchika Gupta8ca8d822010-12-15 17:02:08 +000017#else
18#define CONFIG_SYS_PBI_FLASH_BASE 0xce000000
19#endif
20#define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000
21
York Sun2dfafc62016-11-18 11:47:35 -080022#if defined(CONFIG_TARGET_B4860QDS) || \
23 defined(CONFIG_TARGET_B4420QDS) || \
York Suna74e9232016-11-21 13:19:14 -080024 defined(CONFIG_TARGET_T4160QDS) || \
York Sunba04cb42016-11-21 13:22:08 -080025 defined(CONFIG_TARGET_T4240QDS) || \
York Sunc68b12d2016-12-28 08:43:36 -080026 defined(CONFIG_TARGET_T2080QDS) || \
York Suna05baa42016-12-28 08:43:37 -080027 defined(CONFIG_TARGET_T2080RDB) || \
York Sun097aa602016-11-21 11:25:26 -080028 defined(CONFIG_TARGET_T1040RDB) || \
29 defined(CONFIG_TARGET_T1040D4RDB) || \
30 defined(CONFIG_TARGET_T1042RDB) || \
31 defined(CONFIG_TARGET_T1042D4RDB) || \
32 defined(CONFIG_TARGET_T1042RDB_PI) || \
York Sunbcee92e2016-11-18 12:35:47 -080033 defined(CONFIG_ARCH_T1023) || \
York Sun7d29dd62016-11-18 13:01:34 -080034 defined(CONFIG_ARCH_T1024)
Sumit Gargafaca2a2016-07-14 12:27:52 -040035#ifndef CONFIG_SYS_RAMBOOT
Aneesh Bansal8bcbc272014-03-18 23:40:26 +053036#define CONFIG_SYS_CPC_REINIT_F
Sumit Gargafaca2a2016-07-14 12:27:52 -040037#endif
gaurav rana8b5ea652015-02-27 09:46:17 +053038#define CONFIG_KEY_REVOCATION
Aneesh Bansal8bcbc272014-03-18 23:40:26 +053039#undef CONFIG_SYS_INIT_L3_ADDR
40#define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
41#endif
42
Aneesh Bansale0f50152015-06-16 10:36:00 +053043#if defined(CONFIG_RAMBOOT_PBL)
44#undef CONFIG_SYS_INIT_L3_ADDR
Sumit Gargafaca2a2016-07-14 12:27:52 -040045#ifdef CONFIG_SYS_INIT_L3_VADDR
46#define CONFIG_SYS_INIT_L3_ADDR \
47 (CONFIG_SYS_INIT_L3_VADDR & ~0xFFF00000) | \
48 0xbff00000
49#else
50#define CONFIG_SYS_INIT_L3_ADDR 0xbff00000
51#endif
Aneesh Bansale0f50152015-06-16 10:36:00 +053052#endif
53
York Sunc6c51ae2016-11-16 11:51:24 -080054#if defined(CONFIG_TARGET_C29XPCIE)
gaurav rana8b5ea652015-02-27 09:46:17 +053055#define CONFIG_KEY_REVOCATION
56#endif
57
York Sundf70d062016-11-18 11:20:40 -080058#if defined(CONFIG_ARCH_P3041) || \
York Sun84be8a92016-11-18 11:24:40 -080059 defined(CONFIG_ARCH_P4080) || \
York Suna3c5b662016-11-18 11:39:36 -080060 defined(CONFIG_ARCH_P5040) || \
York Sun5786fca2016-11-18 11:15:21 -080061 defined(CONFIG_ARCH_P2041)
gaurav rana8b5ea652015-02-27 09:46:17 +053062 #define CONFIG_FSL_TRUST_ARCH_v1
63#endif
64
Aneesh Bansald31bb3e2015-07-31 14:10:03 +053065#if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT)
gaurav rana8b5ea652015-02-27 09:46:17 +053066/* The key used for verification of next level images
67 * is picked up from an Extension Table which has
68 * been verified by the ISBC (Internal Secure boot Code)
Aneesh Bansald31bb3e2015-07-31 14:10:03 +053069 * in boot ROM of the SoC.
70 * The feature is only applicable in case of NOR boot and is
71 * not applicable in case of RAMBOOT (NAND, SD, SPI).
gaurav rana8b5ea652015-02-27 09:46:17 +053072 */
73#define CONFIG_FSL_ISBC_KEY_EXT
74#endif
Udit Agarwald2dd2f72019-11-07 16:11:39 +000075#endif /* #ifdef CONFIG_NXP_ESBC */
gaurav rana8b5ea652015-02-27 09:46:17 +053076
Aneesh Bansal43104702016-01-22 16:37:24 +053077#ifdef CONFIG_CHAIN_OF_TRUST
Simon Glass3aa66122016-09-12 23:18:23 -060078#ifdef CONFIG_SPL_BUILD
Sumit Gargf6d96cb2016-07-14 12:27:51 -040079/*
80 * PPAACT and SPAACT table for PAMU must be placed on DDR after DDR init
81 * due to space crunch on CPC and thus malloc will not work.
82 */
83#define CONFIG_SPL_PPAACT_ADDR 0x2e000000
84#define CONFIG_SPL_SPAACT_ADDR 0x2f000000
85#define CONFIG_SPL_JR0_LIODN_S 454
86#define CONFIG_SPL_JR0_LIODN_NS 458
87/*
88 * Define the key hash for U-Boot here if public/private key pair used to
89 * sign U-boot are different from the SRK hash put in the fuse
90 * Example of defining KEY_HASH is
91 * #define CONFIG_SPL_UBOOT_KEY_HASH \
92 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
93 * else leave it defined as NULL
94 */
95
96#define CONFIG_SPL_UBOOT_KEY_HASH NULL
97#endif /* ifdef CONFIG_SPL_BUILD */
98
Aneesh Bansal43104702016-01-22 16:37:24 +053099#define CONFIG_FSL_SEC_MON
Aneesh Bansal43104702016-01-22 16:37:24 +0530100
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400101#ifndef CONFIG_SPL_BUILD
102/*
103 * fsl_setenv_chain_of_trust() must be called from
Aneesh Bansalc6249092016-01-22 16:37:27 +0530104 * board_late_init()
105 */
Aneesh Bansalc6249092016-01-22 16:37:27 +0530106
Aneesh Bansalb69061d2015-06-16 10:36:43 +0530107/* If Boot Script is not on NOR and is required to be copied on RAM */
108#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
109#define CONFIG_BS_HDR_ADDR_RAM 0x00010000
Sumit Garg45642832016-06-14 13:52:39 -0400110#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
Aneesh Bansalb69061d2015-06-16 10:36:43 +0530111#define CONFIG_BS_HDR_SIZE 0x00002000
112#define CONFIG_BS_ADDR_RAM 0x00012000
Sumit Garg45642832016-06-14 13:52:39 -0400113#define CONFIG_BS_ADDR_DEVICE 0x00802000
Aneesh Bansalb69061d2015-06-16 10:36:43 +0530114#define CONFIG_BS_SIZE 0x00001000
115
116#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
117#else
118
gaurav ranaf79323c2015-03-10 14:08:50 +0530119/* The bootscript header address is different for B4860 because the NOR
120 * mapping is different on B4 due to reduced NOR size.
121 */
York Sun2dfafc62016-11-18 11:47:35 -0800122#if defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS)
gaurav ranaf79323c2015-03-10 14:08:50 +0530123#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000
124#elif defined(CONFIG_FSL_CORENET)
125#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000
York Sun4620e1f2016-11-15 18:32:50 -0800126#elif defined(CONFIG_TARGET_BSC9132QDS)
gaurav ranaf79323c2015-03-10 14:08:50 +0530127#define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000
York Sunc6c51ae2016-11-16 11:51:24 -0800128#elif defined(CONFIG_TARGET_C29XPCIE)
gaurav ranaf79323c2015-03-10 14:08:50 +0530129#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000
130#else
131#define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000
132#endif
133
Aneesh Bansal43104702016-01-22 16:37:24 +0530134#endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */
gaurav ranaf79323c2015-03-10 14:08:50 +0530135
Aneesh Bansal43104702016-01-22 16:37:24 +0530136#include <config_fsl_chain_trust.h>
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400137#endif /* #ifndef CONFIG_SPL_BUILD */
Aneesh Bansal43104702016-01-22 16:37:24 +0530138#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
Po Liud1030092013-08-21 14:20:21 +0800139#endif