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Masahiro Yamadacc85b7b2015-07-26 02:46:26 +09001#
2# I2C subsystem configuration
3#
4
5menu "I2C support"
6
Masahiro Yamadacd5cf8e2015-01-13 12:44:35 +09007config DM_I2C
8 bool "Enable Driver Model for I2C drivers"
9 depends on DM
10 help
Przemyslaw Marczake5fa1212015-03-31 18:57:17 +020011 Enable driver model for I2C. The I2C uclass interface: probe, read,
12 write and speed, is implemented with the bus drivers operations,
13 which provide methods for bus setting and data transfer. Each chip
Simon Glass71fa5b42020-12-03 16:55:18 -070014 device (bus child) info is kept as parent plat. The interface
Bartosz Golaszewski1e4450c2019-07-29 08:58:00 +020015 is defined in include/i2c.h.
Simon Glasse200ee22015-02-13 12:20:48 -070016
Igor Opaniuk964f2322021-02-09 13:52:43 +020017config SPL_DM_I2C
18 bool "Enable Driver Model for I2C drivers in SPL"
19 depends on SPL_DM && DM_I2C
20 default y
21 help
22 Enable driver model for I2C. The I2C uclass interface: probe, read,
23 write and speed, is implemented with the bus drivers operations,
24 which provide methods for bus setting and data transfer. Each chip
25 device (bus child) info is kept as parent platdata. The interface
26 is defined in include/i2c.h.
27
Simon Glass9ad07af2015-08-03 08:19:23 -060028config I2C_CROS_EC_TUNNEL
29 tristate "Chrome OS EC tunnel I2C bus"
30 depends on CROS_EC
31 help
32 This provides an I2C bus that will tunnel i2c commands through to
33 the other side of the Chrome OS EC to the I2C bus connected there.
34 This will work whatever the interface used to talk to the EC (SPI,
35 I2C or LPC). Some Chromebooks use this when the hardware design
36 does not allow direct access to the main PMIC from the AP.
37
Simon Glasseb2cc512015-08-03 08:19:24 -060038config I2C_CROS_EC_LDO
39 bool "Provide access to LDOs on the Chrome OS EC"
40 depends on CROS_EC
41 ---help---
42 On many Chromebooks the main PMIC is inaccessible to the AP. This is
43 often dealt with by using an I2C pass-through interface provided by
44 the EC. On some unfortunate models (e.g. Spring) the pass-through
45 is not available, and an LDO message is available instead. This
46 option enables a driver which provides very basic access to those
47 regulators, via the EC. We implement this as an I2C bus which
48 emulates just the TPS65090 messages we know about. This is done to
49 avoid duplicating the logic in the TPS65090 regulator driver for
50 enabling/disabling an LDO.
Simon Glass9ad07af2015-08-03 08:19:23 -060051
Lukasz Majewski0a556272017-03-21 12:08:25 +010052config I2C_SET_DEFAULT_BUS_NUM
53 bool "Set default I2C bus number"
54 depends on DM_I2C
55 help
56 Set default number of I2C bus to be accessed. This option provides
57 behaviour similar to old (i.e. pre DM) I2C bus driver.
58
59config I2C_DEFAULT_BUS_NUMBER
60 hex "I2C default bus number"
61 depends on I2C_SET_DEFAULT_BUS_NUM
62 default 0x0
63 help
64 Number of default I2C bus to use
65
Przemyslaw Marczakd3aa7e12015-03-31 18:57:18 +020066config DM_I2C_GPIO
67 bool "Enable Driver Model for software emulated I2C bus driver"
68 depends on DM_I2C && DM_GPIO
69 help
70 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
71 configuration is given by the device tree. Kernel-style device tree
72 bindings are supported.
73 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
74
Igor Opaniuk964f2322021-02-09 13:52:43 +020075config SPL_DM_I2C_GPIO
76 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
Simon Glass035939e2021-07-10 21:14:30 -060077 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
Igor Opaniuk964f2322021-02-09 13:52:43 +020078 default y
79 help
80 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
81 configuration is given by the device tree. Kernel-style device tree
82 bindings are supported.
83 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
84
Songjun Wu26d88282016-06-20 13:22:38 +080085config SYS_I2C_AT91
86 bool "Atmel I2C driver"
87 depends on DM_I2C && ARCH_AT91
88 help
89 Add support for the Atmel I2C driver. A serious problem is that there
90 is no documented way to issue repeated START conditions for more than
91 two messages, as needed to support combined I2C messages. Use the
92 i2c-gpio driver unless your system can cope with this limitation.
93 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
94
Rayagonda Kokatanurd5dc36f2020-04-08 11:12:27 +053095config SYS_I2C_IPROC
96 bool "Broadcom I2C driver"
97 depends on DM_I2C
98 help
99 Broadcom I2C driver.
100 Add support for Broadcom I2C driver.
101 Say yes here to to enable the Broadco I2C driver.
102
mario.six@gdsys.cc349686c2016-04-25 08:31:09 +0200103config SYS_I2C_FSL
104 bool "Freescale I2C bus driver"
105 depends on DM_I2C
106 help
107 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
108 MPC85xx processors.
109
Moritz Fischer0075dac2015-12-28 09:47:11 -0800110config SYS_I2C_CADENCE
111 tristate "Cadence I2C Controller"
Michal Simekc28665d2020-08-06 15:18:36 +0200112 depends on DM_I2C
Moritz Fischer0075dac2015-12-28 09:47:11 -0800113 help
114 Say yes here to select Cadence I2C Host Controller. This controller is
115 e.g. used by Xilinx Zynq.
116
Arthur Life661ba2020-06-01 12:56:31 -0700117config SYS_I2C_CA
118 tristate "Cortina-Access I2C Controller"
119 depends on DM_I2C && CORTINA_PLATFORM
120 default n
121 help
122 Add support for the Cortina Access I2C host controller.
123 Say yes here to select Cortina-Access I2C Host Controller.
124
Adam Forddecc8952018-08-10 05:05:22 -0500125config SYS_I2C_DAVINCI
126 bool "Davinci I2C Controller"
127 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
128 help
129 Say yes here to add support for Davinci and Keystone I2C controller
130
Stefan Roeseb71955f2016-04-28 09:47:17 +0200131config SYS_I2C_DW
132 bool "Designware I2C Controller"
133 default n
134 help
135 Say yes here to select the Designware I2C Host Controller. This
136 controller is used in various SoCs, e.g. the ST SPEAr, Altera
137 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
138
maxims@google.com7f613312017-04-17 12:00:30 -0700139config SYS_I2C_ASPEED
140 bool "Aspeed I2C Controller"
141 depends on DM_I2C && ARCH_ASPEED
142 help
143 Say yes here to select Aspeed I2C Host Controller. The driver
144 supports AST2500 and AST2400 controllers, but is very limited.
145 Only single master mode is supported and only byte-by-byte
146 synchronous reads and writes are supported, no Pool Buffers or DMA.
147
Simon Glass5e66fdc2016-01-17 16:11:44 -0700148config SYS_I2C_INTEL
149 bool "Intel I2C/SMBUS driver"
150 depends on DM_I2C
151 help
152 Add support for the Intel SMBUS driver. So far this driver is just
153 a stub which perhaps some basic init. There is no implementation of
154 the I2C API meaning that any I2C operations will immediately fail
155 for now.
156
Peng Fand684adb2017-02-24 09:54:18 +0800157config SYS_I2C_IMX_LPI2C
158 bool "NXP i.MX LPI2C driver"
Peng Fand684adb2017-02-24 09:54:18 +0800159 help
160 Add support for the NXP i.MX LPI2C driver.
161
Trevor Woerner5f37e502021-06-10 22:37:08 -0400162config SYS_I2C_LPC32XX
163 bool "LPC32XX I2C driver"
164 depends on ARCH_LPC32XX
165 help
166 Enable support for the LPC32xx I2C driver.
167
Beniamino Galvanid5b199c2017-10-29 10:09:00 +0100168config SYS_I2C_MESON
169 bool "Amlogic Meson I2C driver"
170 depends on DM_I2C && ARCH_MESON
171 help
Beniamino Galvani83b153d2017-11-26 17:40:54 +0100172 Add support for the I2C controller available in Amlogic Meson
173 SoCs. The controller supports programmable bus speed including
174 standard (100kbits/s) and fast (400kbit/s) speed and allows the
175 software to define a flexible format of the bit streams. It has an
176 internal buffer holding up to 8 bytes for transfers and supports
177 both 7-bit and 10-bit addresses.
Beniamino Galvanid5b199c2017-10-29 10:09:00 +0100178
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100179config SYS_I2C_MXC
Sriram Dash7122a0c2018-02-06 11:26:30 +0530180 bool "NXP MXC I2C driver"
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100181 help
Chris Packham94d0d3d2019-01-13 22:13:25 +1300182 Add support for the NXP I2C driver. This supports up to four bus
183 channels and operating on standard mode up to 100 kbits/s and fast
184 mode up to 400 kbits/s.
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100185
Trent Piepho92ebcba2019-05-08 23:30:06 +0000186# These settings are not used with DM_I2C, however SPL doesn't use
187# DM_I2C even if DM_I2C is enabled, and so might use these settings even
188# when main u-boot does not!
189if SYS_I2C_MXC && (!DM_I2C || SPL)
Sriram Dash7122a0c2018-02-06 11:26:30 +0530190config SYS_I2C_MXC_I2C1
191 bool "NXP MXC I2C1"
192 help
193 Add support for NXP MXC I2C Controller 1.
194 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
195
196config SYS_I2C_MXC_I2C2
197 bool "NXP MXC I2C2"
198 help
199 Add support for NXP MXC I2C Controller 2.
200 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
201
202config SYS_I2C_MXC_I2C3
203 bool "NXP MXC I2C3"
204 help
205 Add support for NXP MXC I2C Controller 3.
206 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
207
208config SYS_I2C_MXC_I2C4
209 bool "NXP MXC I2C4"
210 help
211 Add support for NXP MXC I2C Controller 4.
212 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
Sriram Dasha64aa192018-02-06 11:26:31 +0530213
214config SYS_I2C_MXC_I2C5
215 bool "NXP MXC I2C5"
216 help
217 Add support for NXP MXC I2C Controller 5.
218 Required for SoCs which have I2C MXC controller 5 eg LX2160A
219
220config SYS_I2C_MXC_I2C6
221 bool "NXP MXC I2C6"
222 help
223 Add support for NXP MXC I2C Controller 6.
224 Required for SoCs which have I2C MXC controller 6 eg LX2160A
225
226config SYS_I2C_MXC_I2C7
227 bool "NXP MXC I2C7"
228 help
229 Add support for NXP MXC I2C Controller 7.
230 Required for SoCs which have I2C MXC controller 7 eg LX2160A
231
232config SYS_I2C_MXC_I2C8
233 bool "NXP MXC I2C8"
234 help
235 Add support for NXP MXC I2C Controller 8.
236 Required for SoCs which have I2C MXC controller 8 eg LX2160A
Sriram Dash7122a0c2018-02-06 11:26:30 +0530237endif
238
239if SYS_I2C_MXC_I2C1
240config SYS_MXC_I2C1_SPEED
241 int "I2C Channel 1 speed"
Tom Rini48425b12021-02-09 08:03:10 -0500242 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash7122a0c2018-02-06 11:26:30 +0530243 default 100000
244 help
245 MXC I2C Channel 1 speed
246
247config SYS_MXC_I2C1_SLAVE
248 int "I2C1 Slave"
249 default 0
250 help
251 MXC I2C1 Slave
252endif
253
254if SYS_I2C_MXC_I2C2
255config SYS_MXC_I2C2_SPEED
256 int "I2C Channel 2 speed"
Tom Rini48425b12021-02-09 08:03:10 -0500257 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash7122a0c2018-02-06 11:26:30 +0530258 default 100000
259 help
260 MXC I2C Channel 2 speed
261
262config SYS_MXC_I2C2_SLAVE
263 int "I2C2 Slave"
264 default 0
265 help
266 MXC I2C2 Slave
267endif
268
269if SYS_I2C_MXC_I2C3
270config SYS_MXC_I2C3_SPEED
271 int "I2C Channel 3 speed"
272 default 100000
273 help
274 MXC I2C Channel 3 speed
275
276config SYS_MXC_I2C3_SLAVE
277 int "I2C3 Slave"
278 default 0
279 help
280 MXC I2C3 Slave
281endif
282
283if SYS_I2C_MXC_I2C4
284config SYS_MXC_I2C4_SPEED
285 int "I2C Channel 4 speed"
286 default 100000
287 help
288 MXC I2C Channel 4 speed
289
290config SYS_MXC_I2C4_SLAVE
291 int "I2C4 Slave"
292 default 0
293 help
294 MXC I2C4 Slave
295endif
296
Sriram Dasha64aa192018-02-06 11:26:31 +0530297if SYS_I2C_MXC_I2C5
298config SYS_MXC_I2C5_SPEED
299 int "I2C Channel 5 speed"
300 default 100000
301 help
302 MXC I2C Channel 5 speed
303
304config SYS_MXC_I2C5_SLAVE
305 int "I2C5 Slave"
306 default 0
307 help
308 MXC I2C5 Slave
309endif
310
311if SYS_I2C_MXC_I2C6
312config SYS_MXC_I2C6_SPEED
313 int "I2C Channel 6 speed"
314 default 100000
315 help
316 MXC I2C Channel 6 speed
317
318config SYS_MXC_I2C6_SLAVE
319 int "I2C6 Slave"
320 default 0
321 help
322 MXC I2C6 Slave
323endif
324
325if SYS_I2C_MXC_I2C7
326config SYS_MXC_I2C7_SPEED
327 int "I2C Channel 7 speed"
328 default 100000
329 help
330 MXC I2C Channel 7 speed
331
332config SYS_MXC_I2C7_SLAVE
333 int "I2C7 Slave"
334 default 0
335 help
336 MXC I2C7 Slave
337endif
338
339if SYS_I2C_MXC_I2C8
340config SYS_MXC_I2C8_SPEED
341 int "I2C Channel 8 speed"
342 default 100000
343 help
344 MXC I2C Channel 8 speed
345
346config SYS_MXC_I2C8_SLAVE
347 int "I2C8 Slave"
348 default 0
349 help
350 MXC I2C8 Slave
351endif
352
Stefan Bosch9d85dfb2020-07-10 19:07:28 +0200353config SYS_I2C_NEXELL
354 bool "Nexell I2C driver"
355 depends on DM_I2C
356 help
357 Add support for the Nexell I2C driver. This is used with various
358 Nexell parts such as S5Pxx18 series SoCs. All chips
359 have several I2C ports and all are provided, controlled by the
360 device tree.
361
Pragnesh Patel1cfbd7a2020-11-14 14:42:34 +0530362config SYS_I2C_OCORES
363 bool "ocores I2C driver"
364 depends on DM_I2C
365 help
366 Add support for ocores I2C controller. For details see
367 https://opencores.org/projects/i2c
368
Adam Ford85901162017-08-07 13:11:34 -0500369config SYS_I2C_OMAP24XX
370 bool "TI OMAP2+ I2C driver"
Vignesh R64d4f552019-06-04 18:08:11 -0500371 depends on ARCH_OMAP2PLUS || ARCH_K3
Adam Ford85901162017-08-07 13:11:34 -0500372 help
373 Add support for the OMAP2+ I2C driver.
374
Adam Forded3b0822018-01-24 15:21:21 -0600375if SYS_I2C_OMAP24XX
376config SYS_OMAP24_I2C_SLAVE
377 int "I2C Slave addr channel 0"
378 default 1
379 help
380 OMAP24xx I2C Slave address channel 0
381
382config SYS_OMAP24_I2C_SPEED
383 int "I2C Slave channel 0 speed"
384 default 100000
385 help
386 OMAP24xx Slave speed channel 0
387endif
388
Marek Vasut27165962018-04-21 18:57:28 +0200389config SYS_I2C_RCAR_I2C
390 bool "Renesas RCar I2C driver"
391 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
392 help
393 Support for Renesas RCar I2C controller.
394
Marek Vasut125d8df2017-11-28 08:02:27 +0100395config SYS_I2C_RCAR_IIC
396 bool "Renesas RCar Gen3 IIC driver"
Marek Vasut4bc57a32018-02-17 02:17:40 +0100397 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
Marek Vasut125d8df2017-11-28 08:02:27 +0100398 help
399 Support for Renesas RCar Gen3 IIC controller.
400
Simon Glass3595f952015-08-30 16:55:39 -0600401config SYS_I2C_ROCKCHIP
402 bool "Rockchip I2C driver"
403 depends on DM_I2C
404 help
405 Add support for the Rockchip I2C driver. This is used with various
406 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
Chris Packham94d0d3d2019-01-13 22:13:25 +1300407 have several I2C ports and all are provided, controlled by the
Simon Glass3595f952015-08-30 16:55:39 -0600408 device tree.
409
Simon Glass39bc3be2015-03-06 13:19:04 -0700410config SYS_I2C_SANDBOX
411 bool "Sandbox I2C driver"
412 depends on SANDBOX && DM_I2C
413 help
414 Enable I2C support for sandbox. This is an emulation of a real I2C
415 bus. Devices can be attached to the bus using the device tree
Masahiro Yamada8d8371d2017-02-11 12:39:55 +0900416 which specifies the driver to use. See sandbox.dts as an example.
Simon Glass39bc3be2015-03-06 13:19:04 -0700417
Suneel Garapatic6baea22020-05-26 14:13:07 +0200418config SYS_I2C_OCTEON
419 bool "Octeon II/III/TX/TX2 I2C driver"
420 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
421 default y
422 help
423 Add support for the Marvell Octeon I2C driver. This is used with
424 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
425 chips have several I2C ports and all are provided, controlled by
426 the device tree.
427
Jaehoon Chungf7e6a032017-01-09 14:47:52 +0900428config SYS_I2C_S3C24X0
429 bool "Samsung I2C driver"
430 depends on ARCH_EXYNOS4 && DM_I2C
431 help
432 Support for Samsung I2C controller as Samsung SoCs.
Simon Glass39bc3be2015-03-06 13:19:04 -0700433
Patrice Chotardebf442d2017-08-09 14:45:27 +0200434config SYS_I2C_STM32F7
435 bool "STMicroelectronics STM32F7 I2C support"
Patrick Delaunay85b53972018-03-12 10:46:10 +0100436 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
Patrice Chotardebf442d2017-08-09 14:45:27 +0200437 help
438 Enable this option to add support for STM32 I2C controller
439 introduced with STM32F7/H7 SoCs. This I2C controller supports :
440 _ Slave and master modes
441 _ Multimaster capability
442 _ Standard-mode (up to 100 kHz)
443 _ Fast-mode (up to 400 kHz)
444 _ Fast-mode Plus (up to 1 MHz)
445 _ 7-bit and 10-bit addressing mode
446 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
447 _ All 7-bit addresses acknowledge mode
448 _ General call
449 _ Programmable setup and hold times
450 _ Easy to use event management
451 _ Optional clock stretching
452 _ Software reset
453
Jassi Brar23325cf2021-06-04 18:44:48 +0900454config SYS_I2C_SYNQUACER
455 bool "Socionext SynQuacer I2C controller"
456 depends on ARCH_SYNQUACER && DM_I2C
457 help
458 Support for Socionext Synquacer I2C controller. This I2C controller
459 will be used for RTC and LS-connector on DeveloperBox.
460
Peter Robinson12d37d82019-02-20 12:17:26 +0000461config SYS_I2C_TEGRA
462 bool "NVIDIA Tegra internal I2C controller"
Trevor Woerner513f6402020-05-06 08:02:41 -0400463 depends on ARCH_TEGRA
Peter Robinson12d37d82019-02-20 12:17:26 +0000464 help
465 Support for NVIDIA I2C controller available in Tegra SoCs.
466
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900467config SYS_I2C_UNIPHIER
468 bool "UniPhier I2C driver"
469 depends on ARCH_UNIPHIER && DM_I2C
470 default y
471 help
Masahiro Yamada563ee4c2015-05-29 17:30:01 +0900472 Support for UniPhier I2C controller driver. This I2C controller
473 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
Masahiro Yamada4e82e5e2015-01-13 12:44:37 +0900474
475config SYS_I2C_UNIPHIER_F
476 bool "UniPhier FIFO-builtin I2C driver"
477 depends on ARCH_UNIPHIER && DM_I2C
478 default y
479 help
Masahiro Yamada563ee4c2015-05-29 17:30:01 +0900480 Support for UniPhier FIFO-builtin I2C controller driver.
Masahiro Yamada4e82e5e2015-01-13 12:44:37 +0900481 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
Simon Glass2a80c402015-08-03 08:19:21 -0600482
Heiko Schochera37c1962018-10-11 07:26:33 +0200483config SYS_I2C_VERSATILE
484 bool "Arm Ltd Versatile I2C bus driver"
Tom Rini5af921e2021-02-20 20:05:47 -0500485 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
Heiko Schochera37c1962018-10-11 07:26:33 +0200486 help
487 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
488 controller is present in the development boards manufactured by Arm Ltd.
489
mario.six@gdsys.cc355a1272016-07-21 11:57:10 +0200490config SYS_I2C_MVTWSI
491 bool "Marvell I2C driver"
492 depends on DM_I2C
493 help
494 Support for Marvell I2C controllers as used on the orion5x and
495 kirkwood SoC families.
496
Stephen Warren67a83482016-08-08 11:28:27 -0600497config TEGRA186_BPMP_I2C
498 bool "Enable Tegra186 BPMP-based I2C driver"
499 depends on TEGRA186_BPMP
500 help
501 Support for Tegra I2C controllers managed by the BPMP (Boot and
502 Power Management Processor). On Tegra186, some I2C controllers are
503 directly controlled by the main CPU, whereas others are controlled
504 by the BPMP, and can only be accessed by the main CPU via IPC
505 requests to the BPMP. This driver covers the latter case.
506
Adam Fordfa1dd3d2017-08-11 06:39:34 -0500507config SYS_I2C_BUS_MAX
508 int "Max I2C busses"
509 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
510 default 2 if TI816X
511 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
512 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
513 default 5 if OMAP54XX
514 help
515 Define the maximum number of available I2C buses.
516
Marek Vasut9de0e2a2018-12-19 12:26:27 +0100517config SYS_I2C_XILINX_XIIC
518 bool "Xilinx AXI I2C driver"
519 depends on DM_I2C
520 help
521 Support for Xilinx AXI I2C controller.
522
Mario Six3bb409c2018-01-15 11:08:11 +0100523config SYS_I2C_IHS
524 bool "gdsys IHS I2C driver"
525 depends on DM_I2C
526 help
527 Support for gdsys IHS I2C driver on FPGA bus.
528
Simon Glass2a80c402015-08-03 08:19:21 -0600529source "drivers/i2c/muxes/Kconfig"
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900530
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