Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 2 | /* |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 3 | * (c) 2009 Magnus Lilja <lilja.magnus@gmail.com> |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
Benoît Thébaudeau | efb7c00 | 2013-04-11 09:35:51 +0000 | [diff] [blame] | 6 | #ifndef __MXC_NAND_H |
| 7 | #define __MXC_NAND_H |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 8 | |
| 9 | /* |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 10 | * Register map and bit definitions for the Freescale NAND Flash Controller |
| 11 | * present in various i.MX devices. |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 12 | * |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 13 | * MX31 and MX27 have version 1, which has: |
| 14 | * 4 512-byte main buffers and |
| 15 | * 4 16-byte spare buffers |
| 16 | * to support up to 2K byte pagesize nand. |
| 17 | * Reading or writing a 2K page requires 4 FDI/FDO cycles. |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 18 | * |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 19 | * MX25 and MX35 have version 2.1, and MX51 and MX53 have version 3.2, which |
| 20 | * have: |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 21 | * 8 512-byte main buffers and |
| 22 | * 8 64-byte spare buffers |
| 23 | * to support up to 4K byte pagesize nand. |
| 24 | * Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle. |
| 25 | * Also some of registers are moved and/or changed meaning as seen below. |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 26 | */ |
Tom Rini | 31df83b | 2022-11-19 18:45:27 -0500 | [diff] [blame] | 27 | #if defined(CONFIG_MX31) |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 28 | #define MXC_NFC_V1 |
Benoît Thébaudeau | c5b4eb1 | 2012-08-13 22:50:53 +0200 | [diff] [blame] | 29 | #define is_mxc_nfc_1() 1 |
| 30 | #define is_mxc_nfc_21() 0 |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 31 | #define is_mxc_nfc_32() 0 |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 32 | #elif defined(CONFIG_MX51) || defined(CONFIG_MX53) |
| 33 | #define MXC_NFC_V3 |
| 34 | #define MXC_NFC_V3_2 |
| 35 | #define is_mxc_nfc_1() 0 |
| 36 | #define is_mxc_nfc_21() 0 |
| 37 | #define is_mxc_nfc_32() 1 |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 38 | #else |
Benoît Thébaudeau | 27d6453 | 2012-08-13 22:50:42 +0200 | [diff] [blame] | 39 | #error "MXC NFC implementation not supported" |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 40 | #endif |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 41 | #define is_mxc_nfc_3() is_mxc_nfc_32() |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 42 | |
| 43 | #if defined(MXC_NFC_V1) |
| 44 | #define NAND_MXC_NR_BUFS 4 |
| 45 | #define NAND_MXC_SPARE_BUF_SIZE 16 |
| 46 | #define NAND_MXC_REG_OFFSET 0xe00 |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 47 | #define NAND_MXC_2K_MULTI_CYCLE |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 48 | #elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2) |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 49 | #define NAND_MXC_NR_BUFS 8 |
| 50 | #define NAND_MXC_SPARE_BUF_SIZE 64 |
| 51 | #define NAND_MXC_REG_OFFSET 0x1e00 |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 52 | #endif |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 53 | |
Benoît Thébaudeau | efb7c00 | 2013-04-11 09:35:51 +0000 | [diff] [blame] | 54 | struct mxc_nand_regs { |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 55 | u8 main_area[NAND_MXC_NR_BUFS][0x200]; |
| 56 | u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE]; |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 57 | /* |
| 58 | * reserved size is offset of nfc registers |
| 59 | * minus total main and spare sizes |
| 60 | */ |
| 61 | u8 reserved1[NAND_MXC_REG_OFFSET |
| 62 | - NAND_MXC_NR_BUFS * (512 + NAND_MXC_SPARE_BUF_SIZE)]; |
| 63 | #if defined(MXC_NFC_V1) |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 64 | u16 buf_size; |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 65 | u16 reserved2; |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 66 | u16 buf_addr; |
| 67 | u16 flash_addr; |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 68 | u16 flash_cmd; |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 69 | u16 config; |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 70 | u16 ecc_status_result; |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 71 | u16 rsltmain_area; |
| 72 | u16 rsltspare_area; |
| 73 | u16 wrprot; |
| 74 | u16 unlockstart_blkaddr; |
| 75 | u16 unlockend_blkaddr; |
| 76 | u16 nf_wrprst; |
| 77 | u16 config1; |
| 78 | u16 config2; |
Benoît Thébaudeau | c5b4eb1 | 2012-08-13 22:50:53 +0200 | [diff] [blame] | 79 | #elif defined(MXC_NFC_V2_1) |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 80 | u16 reserved2[2]; |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 81 | u16 buf_addr; |
| 82 | u16 flash_addr; |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 83 | u16 flash_cmd; |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 84 | u16 config; |
Benoît Thébaudeau | d29aeba | 2012-08-13 22:49:42 +0200 | [diff] [blame] | 85 | u32 ecc_status_result; |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 86 | u16 spare_area_size; |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 87 | u16 wrprot; |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 88 | u16 reserved3[2]; |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 89 | u16 nf_wrprst; |
| 90 | u16 config1; |
| 91 | u16 config2; |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 92 | u16 reserved4; |
Benoît Thébaudeau | 3f77519 | 2012-08-13 22:48:12 +0200 | [diff] [blame] | 93 | u16 unlockstart_blkaddr; |
| 94 | u16 unlockend_blkaddr; |
| 95 | u16 unlockstart_blkaddr1; |
| 96 | u16 unlockend_blkaddr1; |
| 97 | u16 unlockstart_blkaddr2; |
| 98 | u16 unlockend_blkaddr2; |
| 99 | u16 unlockstart_blkaddr3; |
| 100 | u16 unlockend_blkaddr3; |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 101 | #elif defined(MXC_NFC_V3_2) |
| 102 | u32 flash_cmd; |
| 103 | u32 flash_addr[12]; |
| 104 | u32 config1; |
| 105 | u32 ecc_status_result; |
| 106 | u32 status_sum; |
| 107 | u32 launch; |
John Rigby | 4c94c45 | 2010-01-26 19:24:17 -0700 | [diff] [blame] | 108 | #endif |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 109 | }; |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 110 | |
| 111 | #ifdef MXC_NFC_V3_2 |
Benoît Thébaudeau | efb7c00 | 2013-04-11 09:35:51 +0000 | [diff] [blame] | 112 | struct mxc_nand_ip_regs { |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 113 | u32 wrprot; |
| 114 | u32 wrprot_unlock_blkaddr[8]; |
| 115 | u32 config2; |
| 116 | u32 config3; |
| 117 | u32 ipc; |
| 118 | u32 err_addr; |
| 119 | u32 delay_line; |
| 120 | }; |
| 121 | #endif |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 122 | |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 123 | /* Set FCMD to 1, rest to 0 for Command operation */ |
| 124 | #define NFC_CMD 0x1 |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 125 | |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 126 | /* Set FADD to 1, rest to 0 for Address operation */ |
| 127 | #define NFC_ADDR 0x2 |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 128 | |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 129 | /* Set FDI to 1, rest to 0 for Input operation */ |
| 130 | #define NFC_INPUT 0x4 |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 131 | |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 132 | /* Set FDO to 001, rest to 0 for Data Output operation */ |
| 133 | #define NFC_OUTPUT 0x8 |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 134 | |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 135 | /* Set FDO to 010, rest to 0 for Read ID operation */ |
| 136 | #define NFC_ID 0x10 |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 137 | |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 138 | /* Set FDO to 100, rest to 0 for Read Status operation */ |
| 139 | #define NFC_STATUS 0x20 |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 140 | |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 141 | #if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1) |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 142 | #define NFC_CONFIG1_SP_EN (1 << 2) |
| 143 | #define NFC_CONFIG1_RST (1 << 6) |
| 144 | #define NFC_CONFIG1_CE (1 << 7) |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 145 | #elif defined(MXC_NFC_V3_2) |
| 146 | #define NFC_CONFIG1_SP_EN (1 << 0) |
| 147 | #define NFC_CONFIG1_CE (1 << 1) |
| 148 | #define NFC_CONFIG1_RST (1 << 2) |
| 149 | #endif |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 150 | #define NFC_V1_V2_CONFIG1_ECC_EN (1 << 3) |
| 151 | #define NFC_V1_V2_CONFIG1_INT_MSK (1 << 4) |
| 152 | #define NFC_V1_V2_CONFIG1_BIG (1 << 5) |
| 153 | #define NFC_V2_CONFIG1_ECC_MODE_4 (1 << 0) |
| 154 | #define NFC_V2_CONFIG1_ONE_CYCLE (1 << 8) |
| 155 | #define NFC_V2_CONFIG1_FP_INT (1 << 11) |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 156 | #define NFC_V3_CONFIG1_RBA_MASK (0x7 << 4) |
| 157 | #define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7) << 4) |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 158 | |
| 159 | #define NFC_V1_V2_CONFIG2_INT (1 << 15) |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 160 | #define NFC_V3_CONFIG2_PS_MASK (0x3 << 0) |
| 161 | #define NFC_V3_CONFIG2_PS_512 (0 << 0) |
| 162 | #define NFC_V3_CONFIG2_PS_2048 (1 << 0) |
| 163 | #define NFC_V3_CONFIG2_PS_4096 (2 << 0) |
| 164 | #define NFC_V3_CONFIG2_ONE_CYCLE (1 << 2) |
| 165 | #define NFC_V3_CONFIG2_ECC_EN (1 << 3) |
| 166 | #define NFC_V3_CONFIG2_2CMD_PHASES (1 << 4) |
| 167 | #define NFC_V3_CONFIG2_NUM_ADDR_PH0 (1 << 5) |
| 168 | #define NFC_V3_CONFIG2_ECC_MODE_8 (1 << 6) |
| 169 | #define NFC_V3_CONFIG2_PPB_MASK (0x3 << 7) |
| 170 | #define NFC_V3_CONFIG2_PPB(x) (((x) & 0x3) << 7) |
| 171 | #define NFC_V3_CONFIG2_EDC_MASK (0x7 << 9) |
| 172 | #define NFC_V3_CONFIG2_EDC(x) (((x) & 0x7) << 9) |
| 173 | #define NFC_V3_CONFIG2_NUM_ADDR_PH1(x) (((x) & 0x3) << 12) |
| 174 | #define NFC_V3_CONFIG2_INT_MSK (1 << 15) |
| 175 | #define NFC_V3_CONFIG2_SPAS_MASK (0xff << 16) |
| 176 | #define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16) |
| 177 | #define NFC_V3_CONFIG2_ST_CMD_MASK (0xff << 24) |
| 178 | #define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24) |
| 179 | |
| 180 | #define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0) |
| 181 | #define NFC_V3_CONFIG3_FW8 (1 << 3) |
| 182 | #define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8) |
| 183 | #define NFC_V3_CONFIG3_NUM_OF_DEVS(x) (((x) & 0x7) << 12) |
| 184 | #define NFC_V3_CONFIG3_RBB_MODE (1 << 15) |
| 185 | #define NFC_V3_CONFIG3_NO_SDMA (1 << 20) |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 186 | |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 187 | #define NFC_V3_WRPROT_UNLOCK (1 << 2) |
| 188 | #define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6) |
| 189 | |
| 190 | #define NFC_V3_IPC_CREQ (1 << 0) |
| 191 | #define NFC_V3_IPC_INT (1 << 31) |
| 192 | |
| 193 | #if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1) |
Benoît Thébaudeau | 555bba1 | 2013-04-11 09:35:36 +0000 | [diff] [blame] | 194 | #define operation config2 |
| 195 | #define readnfc readw |
| 196 | #define writenfc writew |
Benoît Thébaudeau | 8f26596 | 2013-04-11 09:35:37 +0000 | [diff] [blame] | 197 | #elif defined(MXC_NFC_V3_2) |
| 198 | #define operation launch |
| 199 | #define readnfc readl |
| 200 | #define writenfc writel |
| 201 | #endif |
Magnus Lilja | 4133f65 | 2009-06-13 20:50:01 +0200 | [diff] [blame] | 202 | |
Benoît Thébaudeau | efb7c00 | 2013-04-11 09:35:51 +0000 | [diff] [blame] | 203 | #endif /* __MXC_NAND_H */ |