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Magnus Lilja4133f652009-06-13 20:50:01 +02001/*
Magnus Lilja4133f652009-06-13 20:50:01 +02002 * (c) 2009 Magnus Lilja <lilja.magnus@gmail.com>
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#ifndef __FSL_NFC_H
24#define __FSL_NFC_H
25
26/*
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020027 * Register map and bit definitions for the Freescale NAND Flash Controller
28 * present in various i.MX devices.
John Rigby4c94c452010-01-26 19:24:17 -070029 *
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020030 * MX31 and MX27 have version 1, which has:
31 * 4 512-byte main buffers and
32 * 4 16-byte spare buffers
33 * to support up to 2K byte pagesize nand.
34 * Reading or writing a 2K page requires 4 FDI/FDO cycles.
John Rigby4c94c452010-01-26 19:24:17 -070035 *
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000036 * MX25 and MX35 have version 2.1, and MX51 and MX53 have version 3.2, which
37 * have:
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020038 * 8 512-byte main buffers and
39 * 8 64-byte spare buffers
40 * to support up to 4K byte pagesize nand.
41 * Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle.
42 * Also some of registers are moved and/or changed meaning as seen below.
Magnus Lilja4133f652009-06-13 20:50:01 +020043 */
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020044#if defined(CONFIG_MX27) || defined(CONFIG_MX31)
John Rigby4c94c452010-01-26 19:24:17 -070045#define MXC_NFC_V1
Benoît Thébaudeauc5b4eb12012-08-13 22:50:53 +020046#define is_mxc_nfc_1() 1
47#define is_mxc_nfc_21() 0
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000048#define is_mxc_nfc_32() 0
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020049#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
Benoît Thébaudeauc5b4eb12012-08-13 22:50:53 +020050#define MXC_NFC_V2_1
51#define is_mxc_nfc_1() 0
52#define is_mxc_nfc_21() 1
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000053#define is_mxc_nfc_32() 0
54#elif defined(CONFIG_MX51) || defined(CONFIG_MX53)
55#define MXC_NFC_V3
56#define MXC_NFC_V3_2
57#define is_mxc_nfc_1() 0
58#define is_mxc_nfc_21() 0
59#define is_mxc_nfc_32() 1
John Rigby4c94c452010-01-26 19:24:17 -070060#else
Benoît Thébaudeau27d64532012-08-13 22:50:42 +020061#error "MXC NFC implementation not supported"
John Rigby4c94c452010-01-26 19:24:17 -070062#endif
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000063#define is_mxc_nfc_3() is_mxc_nfc_32()
John Rigby4c94c452010-01-26 19:24:17 -070064
65#if defined(MXC_NFC_V1)
66#define NAND_MXC_NR_BUFS 4
67#define NAND_MXC_SPARE_BUF_SIZE 16
68#define NAND_MXC_REG_OFFSET 0xe00
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020069#define NAND_MXC_2K_MULTI_CYCLE
Benoît Thébaudeau8f265962013-04-11 09:35:37 +000070#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
John Rigby4c94c452010-01-26 19:24:17 -070071#define NAND_MXC_NR_BUFS 8
72#define NAND_MXC_SPARE_BUF_SIZE 64
73#define NAND_MXC_REG_OFFSET 0x1e00
John Rigby4c94c452010-01-26 19:24:17 -070074#endif
Magnus Lilja4133f652009-06-13 20:50:01 +020075
76struct fsl_nfc_regs {
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020077 u8 main_area[NAND_MXC_NR_BUFS][0x200];
78 u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE];
John Rigby4c94c452010-01-26 19:24:17 -070079 /*
80 * reserved size is offset of nfc registers
81 * minus total main and spare sizes
82 */
83 u8 reserved1[NAND_MXC_REG_OFFSET
84 - NAND_MXC_NR_BUFS * (512 + NAND_MXC_SPARE_BUF_SIZE)];
85#if defined(MXC_NFC_V1)
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020086 u16 buf_size;
Magnus Lilja4133f652009-06-13 20:50:01 +020087 u16 reserved2;
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020088 u16 buf_addr;
89 u16 flash_addr;
Magnus Lilja4133f652009-06-13 20:50:01 +020090 u16 flash_cmd;
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020091 u16 config;
Magnus Lilja4133f652009-06-13 20:50:01 +020092 u16 ecc_status_result;
Benoît Thébaudeau3f775192012-08-13 22:48:12 +020093 u16 rsltmain_area;
94 u16 rsltspare_area;
95 u16 wrprot;
96 u16 unlockstart_blkaddr;
97 u16 unlockend_blkaddr;
98 u16 nf_wrprst;
99 u16 config1;
100 u16 config2;
Benoît Thébaudeauc5b4eb12012-08-13 22:50:53 +0200101#elif defined(MXC_NFC_V2_1)
John Rigby4c94c452010-01-26 19:24:17 -0700102 u16 reserved2[2];
Benoît Thébaudeau3f775192012-08-13 22:48:12 +0200103 u16 buf_addr;
104 u16 flash_addr;
John Rigby4c94c452010-01-26 19:24:17 -0700105 u16 flash_cmd;
Benoît Thébaudeau3f775192012-08-13 22:48:12 +0200106 u16 config;
Benoît Thébaudeaud29aeba2012-08-13 22:49:42 +0200107 u32 ecc_status_result;
John Rigby4c94c452010-01-26 19:24:17 -0700108 u16 spare_area_size;
Benoît Thébaudeau3f775192012-08-13 22:48:12 +0200109 u16 wrprot;
John Rigby4c94c452010-01-26 19:24:17 -0700110 u16 reserved3[2];
Benoît Thébaudeau3f775192012-08-13 22:48:12 +0200111 u16 nf_wrprst;
112 u16 config1;
113 u16 config2;
John Rigby4c94c452010-01-26 19:24:17 -0700114 u16 reserved4;
Benoît Thébaudeau3f775192012-08-13 22:48:12 +0200115 u16 unlockstart_blkaddr;
116 u16 unlockend_blkaddr;
117 u16 unlockstart_blkaddr1;
118 u16 unlockend_blkaddr1;
119 u16 unlockstart_blkaddr2;
120 u16 unlockend_blkaddr2;
121 u16 unlockstart_blkaddr3;
122 u16 unlockend_blkaddr3;
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000123#elif defined(MXC_NFC_V3_2)
124 u32 flash_cmd;
125 u32 flash_addr[12];
126 u32 config1;
127 u32 ecc_status_result;
128 u32 status_sum;
129 u32 launch;
John Rigby4c94c452010-01-26 19:24:17 -0700130#endif
Magnus Lilja4133f652009-06-13 20:50:01 +0200131};
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000132
133#ifdef MXC_NFC_V3_2
134struct fsl_nfc_ip_regs {
135 u32 wrprot;
136 u32 wrprot_unlock_blkaddr[8];
137 u32 config2;
138 u32 config3;
139 u32 ipc;
140 u32 err_addr;
141 u32 delay_line;
142};
143#endif
Magnus Lilja4133f652009-06-13 20:50:01 +0200144
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000145/* Set FCMD to 1, rest to 0 for Command operation */
146#define NFC_CMD 0x1
Magnus Lilja4133f652009-06-13 20:50:01 +0200147
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000148/* Set FADD to 1, rest to 0 for Address operation */
149#define NFC_ADDR 0x2
Magnus Lilja4133f652009-06-13 20:50:01 +0200150
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000151/* Set FDI to 1, rest to 0 for Input operation */
152#define NFC_INPUT 0x4
Magnus Lilja4133f652009-06-13 20:50:01 +0200153
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000154/* Set FDO to 001, rest to 0 for Data Output operation */
155#define NFC_OUTPUT 0x8
Magnus Lilja4133f652009-06-13 20:50:01 +0200156
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000157/* Set FDO to 010, rest to 0 for Read ID operation */
158#define NFC_ID 0x10
Magnus Lilja4133f652009-06-13 20:50:01 +0200159
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000160/* Set FDO to 100, rest to 0 for Read Status operation */
161#define NFC_STATUS 0x20
Magnus Lilja4133f652009-06-13 20:50:01 +0200162
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000163#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000164#define NFC_CONFIG1_SP_EN (1 << 2)
165#define NFC_CONFIG1_RST (1 << 6)
166#define NFC_CONFIG1_CE (1 << 7)
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000167#elif defined(MXC_NFC_V3_2)
168#define NFC_CONFIG1_SP_EN (1 << 0)
169#define NFC_CONFIG1_CE (1 << 1)
170#define NFC_CONFIG1_RST (1 << 2)
171#endif
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000172#define NFC_V1_V2_CONFIG1_ECC_EN (1 << 3)
173#define NFC_V1_V2_CONFIG1_INT_MSK (1 << 4)
174#define NFC_V1_V2_CONFIG1_BIG (1 << 5)
175#define NFC_V2_CONFIG1_ECC_MODE_4 (1 << 0)
176#define NFC_V2_CONFIG1_ONE_CYCLE (1 << 8)
177#define NFC_V2_CONFIG1_FP_INT (1 << 11)
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000178#define NFC_V3_CONFIG1_RBA_MASK (0x7 << 4)
179#define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7) << 4)
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000180
181#define NFC_V1_V2_CONFIG2_INT (1 << 15)
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000182#define NFC_V3_CONFIG2_PS_MASK (0x3 << 0)
183#define NFC_V3_CONFIG2_PS_512 (0 << 0)
184#define NFC_V3_CONFIG2_PS_2048 (1 << 0)
185#define NFC_V3_CONFIG2_PS_4096 (2 << 0)
186#define NFC_V3_CONFIG2_ONE_CYCLE (1 << 2)
187#define NFC_V3_CONFIG2_ECC_EN (1 << 3)
188#define NFC_V3_CONFIG2_2CMD_PHASES (1 << 4)
189#define NFC_V3_CONFIG2_NUM_ADDR_PH0 (1 << 5)
190#define NFC_V3_CONFIG2_ECC_MODE_8 (1 << 6)
191#define NFC_V3_CONFIG2_PPB_MASK (0x3 << 7)
192#define NFC_V3_CONFIG2_PPB(x) (((x) & 0x3) << 7)
193#define NFC_V3_CONFIG2_EDC_MASK (0x7 << 9)
194#define NFC_V3_CONFIG2_EDC(x) (((x) & 0x7) << 9)
195#define NFC_V3_CONFIG2_NUM_ADDR_PH1(x) (((x) & 0x3) << 12)
196#define NFC_V3_CONFIG2_INT_MSK (1 << 15)
197#define NFC_V3_CONFIG2_SPAS_MASK (0xff << 16)
198#define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16)
199#define NFC_V3_CONFIG2_ST_CMD_MASK (0xff << 24)
200#define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24)
201
202#define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0)
203#define NFC_V3_CONFIG3_FW8 (1 << 3)
204#define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8)
205#define NFC_V3_CONFIG3_NUM_OF_DEVS(x) (((x) & 0x7) << 12)
206#define NFC_V3_CONFIG3_RBB_MODE (1 << 15)
207#define NFC_V3_CONFIG3_NO_SDMA (1 << 20)
Magnus Lilja4133f652009-06-13 20:50:01 +0200208
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000209#define NFC_V3_WRPROT_UNLOCK (1 << 2)
210#define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6)
211
212#define NFC_V3_IPC_CREQ (1 << 0)
213#define NFC_V3_IPC_INT (1 << 31)
214
215#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
Benoît Thébaudeau555bba12013-04-11 09:35:36 +0000216#define operation config2
217#define readnfc readw
218#define writenfc writew
Benoît Thébaudeau8f265962013-04-11 09:35:37 +0000219#elif defined(MXC_NFC_V3_2)
220#define operation launch
221#define readnfc readl
222#define writenfc writel
223#endif
Magnus Lilja4133f652009-06-13 20:50:01 +0200224
225#endif /* __FSL_NFC_H */