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Masahiro Yamadacc85b7b2015-07-26 02:46:26 +09001#
2# I2C subsystem configuration
3#
4
Simon Glass8e85e3c2021-07-10 21:14:35 -06005menuconfig I2C
6 bool "I2C support"
7 default y
8 help
9 Note:
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
14
15 So at present there is no need to ever disable this option.
16
17 Eventually it will:
18
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
26
27if I2C
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +090028
Masahiro Yamadacd5cf8e2015-01-13 12:44:35 +090029config DM_I2C
30 bool "Enable Driver Model for I2C drivers"
31 depends on DM
32 help
Przemyslaw Marczake5fa1212015-03-31 18:57:17 +020033 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
Simon Glass71fa5b42020-12-03 16:55:18 -070036 device (bus child) info is kept as parent plat. The interface
Bartosz Golaszewski1e4450c2019-07-29 08:58:00 +020037 is defined in include/i2c.h.
Simon Glasse200ee22015-02-13 12:20:48 -070038
Igor Opaniuk964f2322021-02-09 13:52:43 +020039config SPL_DM_I2C
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
42 default y
43 help
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
49
Tom Rini52b2e262021-08-18 23:12:24 -040050config SYS_I2C_LEGACY
51 bool "Enable legacy I2C subsystem and drivers"
52 depends on !DM_I2C
53 help
54 Enable the legacy I2C subsystem and drivers. While this is
55 deprecated in U-Boot itself, this can be useful in some situations
56 in SPL or TPL.
57
58config SPL_SYS_I2C_LEGACY
59 bool "Enable legacy I2C subsystem and drivers in SPL"
60 depends on SUPPORT_SPL && !SPL_DM_I2C
61 help
62 Enable the legacy I2C subsystem and drivers in SPL. This is useful
63 in some size constrained situations.
64
65config TPL_SYS_I2C_LEGACY
66 bool "Enable legacy I2C subsystem and drivers in TPL"
67 depends on SUPPORT_TPL && !SPL_DM_I2C
68 help
69 Enable the legacy I2C subsystem and drivers in TPL. This is useful
70 in some size constrained situations.
71
Tom Rini714482a2021-08-18 23:12:25 -040072config SYS_I2C_EARLY_INIT
73 bool "Enable legacy I2C subsystem early in boot"
74 depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
75 help
76 Add the function prototype for i2c_early_init_f which is called in
77 board_early_init_f.
78
Simon Glass9ad07af2015-08-03 08:19:23 -060079config I2C_CROS_EC_TUNNEL
80 tristate "Chrome OS EC tunnel I2C bus"
81 depends on CROS_EC
82 help
83 This provides an I2C bus that will tunnel i2c commands through to
84 the other side of the Chrome OS EC to the I2C bus connected there.
85 This will work whatever the interface used to talk to the EC (SPI,
86 I2C or LPC). Some Chromebooks use this when the hardware design
87 does not allow direct access to the main PMIC from the AP.
88
Simon Glasseb2cc512015-08-03 08:19:24 -060089config I2C_CROS_EC_LDO
90 bool "Provide access to LDOs on the Chrome OS EC"
91 depends on CROS_EC
92 ---help---
93 On many Chromebooks the main PMIC is inaccessible to the AP. This is
94 often dealt with by using an I2C pass-through interface provided by
95 the EC. On some unfortunate models (e.g. Spring) the pass-through
96 is not available, and an LDO message is available instead. This
97 option enables a driver which provides very basic access to those
98 regulators, via the EC. We implement this as an I2C bus which
99 emulates just the TPS65090 messages we know about. This is done to
100 avoid duplicating the logic in the TPS65090 regulator driver for
101 enabling/disabling an LDO.
Simon Glass9ad07af2015-08-03 08:19:23 -0600102
Lukasz Majewski0a556272017-03-21 12:08:25 +0100103config I2C_SET_DEFAULT_BUS_NUM
104 bool "Set default I2C bus number"
105 depends on DM_I2C
106 help
107 Set default number of I2C bus to be accessed. This option provides
108 behaviour similar to old (i.e. pre DM) I2C bus driver.
109
110config I2C_DEFAULT_BUS_NUMBER
111 hex "I2C default bus number"
112 depends on I2C_SET_DEFAULT_BUS_NUM
113 default 0x0
114 help
115 Number of default I2C bus to use
116
Przemyslaw Marczakd3aa7e12015-03-31 18:57:18 +0200117config DM_I2C_GPIO
118 bool "Enable Driver Model for software emulated I2C bus driver"
119 depends on DM_I2C && DM_GPIO
120 help
121 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
122 configuration is given by the device tree. Kernel-style device tree
123 bindings are supported.
124 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
125
Igor Opaniuk964f2322021-02-09 13:52:43 +0200126config SPL_DM_I2C_GPIO
127 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
Simon Glass035939e2021-07-10 21:14:30 -0600128 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
Igor Opaniuk964f2322021-02-09 13:52:43 +0200129 default y
130 help
131 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
132 configuration is given by the device tree. Kernel-style device tree
133 bindings are supported.
134 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
135
Songjun Wu26d88282016-06-20 13:22:38 +0800136config SYS_I2C_AT91
137 bool "Atmel I2C driver"
138 depends on DM_I2C && ARCH_AT91
139 help
140 Add support for the Atmel I2C driver. A serious problem is that there
141 is no documented way to issue repeated START conditions for more than
142 two messages, as needed to support combined I2C messages. Use the
143 i2c-gpio driver unless your system can cope with this limitation.
144 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
145
Rayagonda Kokatanurd5dc36f2020-04-08 11:12:27 +0530146config SYS_I2C_IPROC
147 bool "Broadcom I2C driver"
148 depends on DM_I2C
149 help
150 Broadcom I2C driver.
151 Add support for Broadcom I2C driver.
152 Say yes here to to enable the Broadco I2C driver.
153
mario.six@gdsys.cc349686c2016-04-25 08:31:09 +0200154config SYS_I2C_FSL
155 bool "Freescale I2C bus driver"
156 depends on DM_I2C
157 help
158 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
159 MPC85xx processors.
160
Moritz Fischer0075dac2015-12-28 09:47:11 -0800161config SYS_I2C_CADENCE
162 tristate "Cadence I2C Controller"
Michal Simekc28665d2020-08-06 15:18:36 +0200163 depends on DM_I2C
Moritz Fischer0075dac2015-12-28 09:47:11 -0800164 help
165 Say yes here to select Cadence I2C Host Controller. This controller is
166 e.g. used by Xilinx Zynq.
167
Arthur Life661ba2020-06-01 12:56:31 -0700168config SYS_I2C_CA
169 tristate "Cortina-Access I2C Controller"
170 depends on DM_I2C && CORTINA_PLATFORM
171 default n
172 help
173 Add support for the Cortina Access I2C host controller.
174 Say yes here to select Cortina-Access I2C Host Controller.
175
Adam Forddecc8952018-08-10 05:05:22 -0500176config SYS_I2C_DAVINCI
177 bool "Davinci I2C Controller"
178 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
179 help
180 Say yes here to add support for Davinci and Keystone I2C controller
181
Stefan Roeseb71955f2016-04-28 09:47:17 +0200182config SYS_I2C_DW
183 bool "Designware I2C Controller"
184 default n
185 help
186 Say yes here to select the Designware I2C Host Controller. This
187 controller is used in various SoCs, e.g. the ST SPEAr, Altera
188 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
189
maxims@google.com7f613312017-04-17 12:00:30 -0700190config SYS_I2C_ASPEED
191 bool "Aspeed I2C Controller"
192 depends on DM_I2C && ARCH_ASPEED
193 help
194 Say yes here to select Aspeed I2C Host Controller. The driver
195 supports AST2500 and AST2400 controllers, but is very limited.
196 Only single master mode is supported and only byte-by-byte
197 synchronous reads and writes are supported, no Pool Buffers or DMA.
198
Simon Glass5e66fdc2016-01-17 16:11:44 -0700199config SYS_I2C_INTEL
200 bool "Intel I2C/SMBUS driver"
201 depends on DM_I2C
202 help
203 Add support for the Intel SMBUS driver. So far this driver is just
204 a stub which perhaps some basic init. There is no implementation of
205 the I2C API meaning that any I2C operations will immediately fail
206 for now.
207
Peng Fand684adb2017-02-24 09:54:18 +0800208config SYS_I2C_IMX_LPI2C
209 bool "NXP i.MX LPI2C driver"
Peng Fand684adb2017-02-24 09:54:18 +0800210 help
211 Add support for the NXP i.MX LPI2C driver.
212
Trevor Woerner5f37e502021-06-10 22:37:08 -0400213config SYS_I2C_LPC32XX
214 bool "LPC32XX I2C driver"
215 depends on ARCH_LPC32XX
216 help
217 Enable support for the LPC32xx I2C driver.
218
Beniamino Galvanid5b199c2017-10-29 10:09:00 +0100219config SYS_I2C_MESON
220 bool "Amlogic Meson I2C driver"
221 depends on DM_I2C && ARCH_MESON
222 help
Beniamino Galvani83b153d2017-11-26 17:40:54 +0100223 Add support for the I2C controller available in Amlogic Meson
224 SoCs. The controller supports programmable bus speed including
225 standard (100kbits/s) and fast (400kbit/s) speed and allows the
226 software to define a flexible format of the bit streams. It has an
227 internal buffer holding up to 8 bytes for transfers and supports
228 both 7-bit and 10-bit addresses.
Beniamino Galvanid5b199c2017-10-29 10:09:00 +0100229
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100230config SYS_I2C_MXC
Sriram Dash7122a0c2018-02-06 11:26:30 +0530231 bool "NXP MXC I2C driver"
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100232 help
Chris Packham94d0d3d2019-01-13 22:13:25 +1300233 Add support for the NXP I2C driver. This supports up to four bus
234 channels and operating on standard mode up to 100 kbits/s and fast
235 mode up to 400 kbits/s.
Jagan Teki0aedd7f2016-12-06 00:00:57 +0100236
Trent Piepho92ebcba2019-05-08 23:30:06 +0000237# These settings are not used with DM_I2C, however SPL doesn't use
238# DM_I2C even if DM_I2C is enabled, and so might use these settings even
239# when main u-boot does not!
240if SYS_I2C_MXC && (!DM_I2C || SPL)
Sriram Dash7122a0c2018-02-06 11:26:30 +0530241config SYS_I2C_MXC_I2C1
242 bool "NXP MXC I2C1"
243 help
244 Add support for NXP MXC I2C Controller 1.
245 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
246
247config SYS_I2C_MXC_I2C2
248 bool "NXP MXC I2C2"
249 help
250 Add support for NXP MXC I2C Controller 2.
251 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
252
253config SYS_I2C_MXC_I2C3
254 bool "NXP MXC I2C3"
255 help
256 Add support for NXP MXC I2C Controller 3.
257 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
258
259config SYS_I2C_MXC_I2C4
260 bool "NXP MXC I2C4"
261 help
262 Add support for NXP MXC I2C Controller 4.
263 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
Sriram Dasha64aa192018-02-06 11:26:31 +0530264
265config SYS_I2C_MXC_I2C5
266 bool "NXP MXC I2C5"
267 help
268 Add support for NXP MXC I2C Controller 5.
269 Required for SoCs which have I2C MXC controller 5 eg LX2160A
270
271config SYS_I2C_MXC_I2C6
272 bool "NXP MXC I2C6"
273 help
274 Add support for NXP MXC I2C Controller 6.
275 Required for SoCs which have I2C MXC controller 6 eg LX2160A
276
277config SYS_I2C_MXC_I2C7
278 bool "NXP MXC I2C7"
279 help
280 Add support for NXP MXC I2C Controller 7.
281 Required for SoCs which have I2C MXC controller 7 eg LX2160A
282
283config SYS_I2C_MXC_I2C8
284 bool "NXP MXC I2C8"
285 help
286 Add support for NXP MXC I2C Controller 8.
287 Required for SoCs which have I2C MXC controller 8 eg LX2160A
Sriram Dash7122a0c2018-02-06 11:26:30 +0530288endif
289
290if SYS_I2C_MXC_I2C1
291config SYS_MXC_I2C1_SPEED
292 int "I2C Channel 1 speed"
Tom Rini48425b12021-02-09 08:03:10 -0500293 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash7122a0c2018-02-06 11:26:30 +0530294 default 100000
295 help
296 MXC I2C Channel 1 speed
297
298config SYS_MXC_I2C1_SLAVE
299 int "I2C1 Slave"
300 default 0
301 help
302 MXC I2C1 Slave
303endif
304
305if SYS_I2C_MXC_I2C2
306config SYS_MXC_I2C2_SPEED
307 int "I2C Channel 2 speed"
Tom Rini48425b12021-02-09 08:03:10 -0500308 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash7122a0c2018-02-06 11:26:30 +0530309 default 100000
310 help
311 MXC I2C Channel 2 speed
312
313config SYS_MXC_I2C2_SLAVE
314 int "I2C2 Slave"
315 default 0
316 help
317 MXC I2C2 Slave
318endif
319
320if SYS_I2C_MXC_I2C3
321config SYS_MXC_I2C3_SPEED
322 int "I2C Channel 3 speed"
323 default 100000
324 help
325 MXC I2C Channel 3 speed
326
327config SYS_MXC_I2C3_SLAVE
328 int "I2C3 Slave"
329 default 0
330 help
331 MXC I2C3 Slave
332endif
333
334if SYS_I2C_MXC_I2C4
335config SYS_MXC_I2C4_SPEED
336 int "I2C Channel 4 speed"
337 default 100000
338 help
339 MXC I2C Channel 4 speed
340
341config SYS_MXC_I2C4_SLAVE
342 int "I2C4 Slave"
343 default 0
344 help
345 MXC I2C4 Slave
346endif
347
Sriram Dasha64aa192018-02-06 11:26:31 +0530348if SYS_I2C_MXC_I2C5
349config SYS_MXC_I2C5_SPEED
350 int "I2C Channel 5 speed"
351 default 100000
352 help
353 MXC I2C Channel 5 speed
354
355config SYS_MXC_I2C5_SLAVE
356 int "I2C5 Slave"
357 default 0
358 help
359 MXC I2C5 Slave
360endif
361
362if SYS_I2C_MXC_I2C6
363config SYS_MXC_I2C6_SPEED
364 int "I2C Channel 6 speed"
365 default 100000
366 help
367 MXC I2C Channel 6 speed
368
369config SYS_MXC_I2C6_SLAVE
370 int "I2C6 Slave"
371 default 0
372 help
373 MXC I2C6 Slave
374endif
375
376if SYS_I2C_MXC_I2C7
377config SYS_MXC_I2C7_SPEED
378 int "I2C Channel 7 speed"
379 default 100000
380 help
381 MXC I2C Channel 7 speed
382
383config SYS_MXC_I2C7_SLAVE
384 int "I2C7 Slave"
385 default 0
386 help
387 MXC I2C7 Slave
388endif
389
390if SYS_I2C_MXC_I2C8
391config SYS_MXC_I2C8_SPEED
392 int "I2C Channel 8 speed"
393 default 100000
394 help
395 MXC I2C Channel 8 speed
396
397config SYS_MXC_I2C8_SLAVE
398 int "I2C8 Slave"
399 default 0
400 help
401 MXC I2C8 Slave
402endif
403
Stefan Bosch9d85dfb2020-07-10 19:07:28 +0200404config SYS_I2C_NEXELL
405 bool "Nexell I2C driver"
406 depends on DM_I2C
407 help
408 Add support for the Nexell I2C driver. This is used with various
409 Nexell parts such as S5Pxx18 series SoCs. All chips
410 have several I2C ports and all are provided, controlled by the
411 device tree.
412
Pragnesh Patel1cfbd7a2020-11-14 14:42:34 +0530413config SYS_I2C_OCORES
414 bool "ocores I2C driver"
415 depends on DM_I2C
416 help
417 Add support for ocores I2C controller. For details see
418 https://opencores.org/projects/i2c
419
Adam Ford85901162017-08-07 13:11:34 -0500420config SYS_I2C_OMAP24XX
421 bool "TI OMAP2+ I2C driver"
Vignesh R64d4f552019-06-04 18:08:11 -0500422 depends on ARCH_OMAP2PLUS || ARCH_K3
Adam Ford85901162017-08-07 13:11:34 -0500423 help
424 Add support for the OMAP2+ I2C driver.
425
Marek Vasut27165962018-04-21 18:57:28 +0200426config SYS_I2C_RCAR_I2C
427 bool "Renesas RCar I2C driver"
428 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
429 help
430 Support for Renesas RCar I2C controller.
431
Marek Vasut125d8df2017-11-28 08:02:27 +0100432config SYS_I2C_RCAR_IIC
433 bool "Renesas RCar Gen3 IIC driver"
Marek Vasut4bc57a32018-02-17 02:17:40 +0100434 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
Marek Vasut125d8df2017-11-28 08:02:27 +0100435 help
436 Support for Renesas RCar Gen3 IIC controller.
437
Simon Glass3595f952015-08-30 16:55:39 -0600438config SYS_I2C_ROCKCHIP
439 bool "Rockchip I2C driver"
440 depends on DM_I2C
441 help
442 Add support for the Rockchip I2C driver. This is used with various
443 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
Chris Packham94d0d3d2019-01-13 22:13:25 +1300444 have several I2C ports and all are provided, controlled by the
Simon Glass3595f952015-08-30 16:55:39 -0600445 device tree.
446
Simon Glass39bc3be2015-03-06 13:19:04 -0700447config SYS_I2C_SANDBOX
448 bool "Sandbox I2C driver"
449 depends on SANDBOX && DM_I2C
450 help
451 Enable I2C support for sandbox. This is an emulation of a real I2C
452 bus. Devices can be attached to the bus using the device tree
Masahiro Yamada8d8371d2017-02-11 12:39:55 +0900453 which specifies the driver to use. See sandbox.dts as an example.
Simon Glass39bc3be2015-03-06 13:19:04 -0700454
Tom Rini5817ff02021-08-17 17:59:46 -0400455config SYS_I2C_SOFT
456 bool "Legacy software I2C interface"
457 help
458 Enable the legacy software defined I2C interface
459
460config SYS_I2C_SOFT_SPEED
461 int "Software I2C bus speed"
462 depends on SYS_I2C_SOFT
463 default 100000
464 help
465 Speed of the software I2C bus
466
467config SYS_I2C_SOFT_SLAVE
468 hex "Software I2C slave address"
469 depends on SYS_I2C_SOFT
470 default 0xfe
471 help
472 Slave address of the software I2C bus
473
Suneel Garapatic6baea22020-05-26 14:13:07 +0200474config SYS_I2C_OCTEON
475 bool "Octeon II/III/TX/TX2 I2C driver"
476 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
477 default y
478 help
479 Add support for the Marvell Octeon I2C driver. This is used with
480 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
481 chips have several I2C ports and all are provided, controlled by
482 the device tree.
483
Jaehoon Chungf7e6a032017-01-09 14:47:52 +0900484config SYS_I2C_S3C24X0
485 bool "Samsung I2C driver"
Tom Rinifc917de2021-08-17 17:59:42 -0400486 depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
Jaehoon Chungf7e6a032017-01-09 14:47:52 +0900487 help
488 Support for Samsung I2C controller as Samsung SoCs.
Simon Glass39bc3be2015-03-06 13:19:04 -0700489
Patrice Chotardebf442d2017-08-09 14:45:27 +0200490config SYS_I2C_STM32F7
491 bool "STMicroelectronics STM32F7 I2C support"
Patrick Delaunay85b53972018-03-12 10:46:10 +0100492 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
Patrice Chotardebf442d2017-08-09 14:45:27 +0200493 help
494 Enable this option to add support for STM32 I2C controller
495 introduced with STM32F7/H7 SoCs. This I2C controller supports :
496 _ Slave and master modes
497 _ Multimaster capability
498 _ Standard-mode (up to 100 kHz)
499 _ Fast-mode (up to 400 kHz)
500 _ Fast-mode Plus (up to 1 MHz)
501 _ 7-bit and 10-bit addressing mode
502 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
503 _ All 7-bit addresses acknowledge mode
504 _ General call
505 _ Programmable setup and hold times
506 _ Easy to use event management
507 _ Optional clock stretching
508 _ Software reset
509
Jassi Brar23325cf2021-06-04 18:44:48 +0900510config SYS_I2C_SYNQUACER
511 bool "Socionext SynQuacer I2C controller"
512 depends on ARCH_SYNQUACER && DM_I2C
513 help
514 Support for Socionext Synquacer I2C controller. This I2C controller
515 will be used for RTC and LS-connector on DeveloperBox.
516
Peter Robinson12d37d82019-02-20 12:17:26 +0000517config SYS_I2C_TEGRA
518 bool "NVIDIA Tegra internal I2C controller"
Trevor Woerner513f6402020-05-06 08:02:41 -0400519 depends on ARCH_TEGRA
Peter Robinson12d37d82019-02-20 12:17:26 +0000520 help
521 Support for NVIDIA I2C controller available in Tegra SoCs.
522
Masahiro Yamada96a42ed2015-01-13 12:44:36 +0900523config SYS_I2C_UNIPHIER
524 bool "UniPhier I2C driver"
525 depends on ARCH_UNIPHIER && DM_I2C
526 default y
527 help
Masahiro Yamada563ee4c2015-05-29 17:30:01 +0900528 Support for UniPhier I2C controller driver. This I2C controller
529 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
Masahiro Yamada4e82e5e2015-01-13 12:44:37 +0900530
531config SYS_I2C_UNIPHIER_F
532 bool "UniPhier FIFO-builtin I2C driver"
533 depends on ARCH_UNIPHIER && DM_I2C
534 default y
535 help
Masahiro Yamada563ee4c2015-05-29 17:30:01 +0900536 Support for UniPhier FIFO-builtin I2C controller driver.
Masahiro Yamada4e82e5e2015-01-13 12:44:37 +0900537 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
Simon Glass2a80c402015-08-03 08:19:21 -0600538
Heiko Schochera37c1962018-10-11 07:26:33 +0200539config SYS_I2C_VERSATILE
540 bool "Arm Ltd Versatile I2C bus driver"
Tom Rini5af921e2021-02-20 20:05:47 -0500541 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
Heiko Schochera37c1962018-10-11 07:26:33 +0200542 help
543 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
544 controller is present in the development boards manufactured by Arm Ltd.
545
mario.six@gdsys.cc355a1272016-07-21 11:57:10 +0200546config SYS_I2C_MVTWSI
547 bool "Marvell I2C driver"
mario.six@gdsys.cc355a1272016-07-21 11:57:10 +0200548 help
549 Support for Marvell I2C controllers as used on the orion5x and
550 kirkwood SoC families.
551
Stephen Warren67a83482016-08-08 11:28:27 -0600552config TEGRA186_BPMP_I2C
553 bool "Enable Tegra186 BPMP-based I2C driver"
554 depends on TEGRA186_BPMP
555 help
556 Support for Tegra I2C controllers managed by the BPMP (Boot and
557 Power Management Processor). On Tegra186, some I2C controllers are
558 directly controlled by the main CPU, whereas others are controlled
559 by the BPMP, and can only be accessed by the main CPU via IPC
560 requests to the BPMP. This driver covers the latter case.
561
Tom Rinia6e29232021-08-18 23:12:32 -0400562config SYS_I2C_SLAVE
563 hex "I2C Slave address channel (all buses)"
564 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
565 default 0xfe
566 help
567 I2C Slave address channel 0 for all buses in the legacy drivers.
568 Many boards/controllers/drivers don't support an I2C slave
569 interface so provide a default slave address for them for use in
570 common code. A real value for CONFIG_SYS_I2C_SLAVE should be
571 defined for any board which does support a slave interface and
572 this default used otherwise.
573
574config SYS_I2C_SPEED
575 int "I2C Slave channel 0 speed (all buses)"
576 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
577 default 100000
578 help
579 I2C Slave speed channel 0 for all buses in the legacy drivers.
580
Adam Fordfa1dd3d2017-08-11 06:39:34 -0500581config SYS_I2C_BUS_MAX
582 int "Max I2C busses"
583 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
584 default 2 if TI816X
585 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
586 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
587 default 5 if OMAP54XX
588 help
589 Define the maximum number of available I2C buses.
590
Marek Vasut9de0e2a2018-12-19 12:26:27 +0100591config SYS_I2C_XILINX_XIIC
592 bool "Xilinx AXI I2C driver"
593 depends on DM_I2C
594 help
595 Support for Xilinx AXI I2C controller.
596
Mario Six3bb409c2018-01-15 11:08:11 +0100597config SYS_I2C_IHS
598 bool "gdsys IHS I2C driver"
599 depends on DM_I2C
600 help
601 Support for gdsys IHS I2C driver on FPGA bus.
602
Simon Glass2a80c402015-08-03 08:19:21 -0600603source "drivers/i2c/muxes/Kconfig"
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900604
Simon Glass8e85e3c2021-07-10 21:14:35 -0600605endif