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git01.mediatek.com / filogic / atf / d6cede37e26f763f0349d07a21f73497abd104c9 / plat / intel / soc / agilex / include
  1. 7a22863 Merge changes Id85b2541,I4d253e2f into integration by Sandrine Bailleux · 10 months ago
  2. 6e0e1b5 fix(intel): update system counter back to 400MHz by Sieu Mun Tang · 11 months ago
  3. 334ea37 feat(intel): support QSPI ECC Linux for Agilex by Sieu Mun Tang · 11 months ago
  4. e7ab132 Merge "fix(intel): fix hardcoded mpu frequency ticks" into integration by Sandrine Bailleux · 11 months ago
  5. ffa06e7 fix(intel): fix hardcoded mpu frequency ticks by Jit Loon Lim · 1 year, 5 months ago
  6. 94f4418 Merge "feat(intel): restructure watchdog" into integration by Manish Pandey · 12 months ago
  7. f6186b2 feat(intel): increase bl2 size limit by Jit Loon Lim · 1 year, 2 months ago
  8. 6284537 feat(intel): restructure watchdog by Sieu Mun Tang · 1 year, 5 months ago
  9. 4c249f1 feat(intel): platform enablement for Agilex5 SoC FPGA by Jit Loon Lim · 1 year, 6 months ago
  10. 86f6fb3 feat(intel): restructure sys mgr for Agilex by Jit Loon Lim · 1 year, 6 months ago
  11. a9fca83 fix(intel): fix Agilex and N5X clock manager to main PLL C0 by Jit Loon Lim · 1 year, 11 months ago
  12. f48707a feat(intel): implement timer init divider via CPU frequency for N5X by Sieu Mun Tang · 2 years, 5 months ago
  13. b9ae467 feat(intel): setup FPGA interface for Agilex by Jit Loon Lim · 2 years, 5 months ago
  14. b56c078 fix(intel): remove redundant NOC header declarations by Sieu Mun Tang · 2 years, 6 months ago
  15. 2cebbc6 Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration by Madhukar Pappireddy · 2 years, 6 months ago
  16. a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · 2 years, 8 months ago
  17. 82cf5df feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge by Sieu Mun Tang · 2 years, 7 months ago
  18. 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 4 months ago
  19. a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · 2 years, 9 months ago
  20. fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · 4 years, 6 months ago
  21. 786db4d intel: Change boot source selection by Hadi Asyrafi · 5 years ago
  22. 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · 5 years ago
  23. 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · 5 years ago
  24. e73c511 intel: Enable bridge access in Intel platform by Hadi Asyrafi · 5 years ago
  25. 3afb87a intel: Modify non secure access function by Hadi Asyrafi · 5 years ago
  26. 1fab9c3 Remove redundant declarations. by Madhukar Pappireddy · 4 years, 11 months ago
  27. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · 5 years ago
  28. f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · 5 years ago
  29. 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · 5 years ago
  30. 56c4901 intel: agilex: Clear PLL lostlock bypass mode by Hadi Asyrafi · 5 years ago
  31. ad90712 Merge "intel: agilex: Fix memory controller driver" into integration by Paul Beesley · 5 years ago
  32. 83fe38e intel: agilex: Fix memory controller driver by Hadi Asyrafi · 5 years ago
  33. a813fed intel: agilex: Fix reliance on hard coded clock information by Hadi Asyrafi · 5 years ago
  34. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
  35. a724e43 intel: agilex: Fix build error by Ambroise Vincent · 5 years ago
  36. 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · 5 years ago