| commit | b9ae4677fe1691c3aa14356e24451de88df1448d | [log] [tgz] |
|---|---|---|
| author | Jit Loon Lim <jit.loon.lim@intel.com> | Wed Jun 15 14:59:33 2022 +0200 |
| committer | Sieu Mun Tang <sieu.mun.tang@intel.com> | Tue Nov 22 23:35:36 2022 +0800 |
| tree | 45cbcba4efb3647a38d3a09ddabd1a3dc9543b39 | |
| parent | a3e5635055dcdd1b24863df52c04f4896461a9d4 [diff] |
feat(intel): setup FPGA interface for Agilex Enable/Disable FPGA interfaces based on handoff configuration. Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: I8667f362aa53e7c68723e0dbd5284844ae39dfb5