- f3662dd Merge "fix(intel): update checking for memcpy and memset" into integration by Sandrine Bailleux · Wed May 24 08:31:09 2023 +0200
- 709a519 Merge changes I38545567,I2f52d3ea into integration by Sandrine Bailleux · Tue May 23 17:43:00 2023 +0200
- 28c1c78 feat(intel): restructure sys mgr for S10/N5X by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
- 86f6fb3 feat(intel): restructure sys mgr for Agilex by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
- 581ad47 fix(intel): update checking for memcpy and memset by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
- 2bee173 feat(intel): setup SEU ERR read interface for FP8 by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
- 2be03c0 fix(tree): correct some typos by Elyes Haouas · Mon Feb 13 09:14:48 2023 +0100
- a9fca83 fix(intel): fix Agilex and N5X clock manager to main PLL C0 by Jit Loon Lim · Thu Dec 22 21:52:36 2022 +0800
- f48707a feat(intel): implement timer init divider via CPU frequency for N5X by Sieu Mun Tang · Thu Jun 23 18:05:02 2022 +0800
- 7eb05ed Merge "feat(intel): fix bridge disable and reset" into integration by Sandrine Bailleux · Wed Apr 12 08:32:56 2023 +0200
- 55fc120 Merge "fix(intel): update boot scratch to indicate to Uboot is PSCI ON" into integration by Sandrine Bailleux · Tue Apr 11 09:39:11 2023 +0200
- 21165ab fix(intel): flash dcache before mmio read by Jit Loon Lim · Mon Mar 27 15:19:53 2023 +0800
- 73d0384 fix(intel): fix the pointer of block memory to fill in and bytes being set by Sieu Mun Tang · Tue Mar 21 15:11:08 2023 +0800
- fda03c9 feat(intel): fix bridge disable and reset by Ang Tien Sung · Mon Mar 13 09:32:40 2023 +0800
- 44c61fc fix(intel): update boot scratch to indicate to Uboot is PSCI ON by Jit Loon Lim · Thu Mar 02 13:38:53 2023 +0800
- 11b9b49 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 by Arvind Ram Prakash · Tue Nov 22 14:41:00 2022 -0600
- 2757de7 Merge "fix(intel): add mailbox error return status for FCS_DECRYPTION" into integration by Sandrine Bailleux · Mon Dec 19 08:37:23 2022 +0100
- 6c7f0c7 fix(intel): add mailbox error return status for FCS_DECRYPTION by Sieu Mun Tang · Sun Dec 04 01:43:35 2022 +0800
- 12fd5ed fix(intel): missing NCORE CCU snoop filter fix in BL2 by Jit Loon Lim · Thu Nov 10 22:08:13 2022 +0800
- fc2e956 Merge "feat(intel): extending to support SMMU in FCS" into integration by Sandrine Bailleux · Tue Dec 06 17:27:17 2022 +0100
- 3c4e5ab Merge "fix(intel): fix fcs_client crashed when increased param size" into integration by Sandrine Bailleux · Tue Dec 06 17:27:07 2022 +0100
- 585cf6d Merge changes Ia8f1471a,I6b95c19d into integration by Sandrine Bailleux · Tue Dec 06 17:26:22 2022 +0100
- 6f9a4cc fix(intel): fix fcs_client crashed when increased param size by Jit Loon Lim · Tue Sep 13 10:24:04 2022 +0800
- bd8da63 feat(intel): extending to support SMMU in FCS by Sieu Mun Tang · Wed Sep 28 15:58:28 2022 +0800
- 71675eb Merge "fix(intel): fix print out ERROR when encounter SEU_Err" into integration by Sandrine Bailleux · Mon Nov 28 15:08:25 2022 +0100
- 080457f Merge changes I8667f362,Ia0bd832c into integration by Sandrine Bailleux · Mon Nov 28 15:07:11 2022 +0100
- c2cc18f Merge "fix(intel): fix sp_timer0 is not disabled in firewall on Agilex" into integration by Sandrine Bailleux · Mon Nov 28 15:03:16 2022 +0100
- 7501681 fix(intel): agilex bitstream pre-authenticate by Jit Loon Lim · Thu Nov 03 20:03:37 2022 +0800
- dd96d8f fix(intel): mailbox store QSPI ref clk in scratch reg by Jit Loon Lim · Fri Aug 19 13:40:17 2022 +0200
- 15d4edb fix(intel): remove checking on TEMP and VOLT checking for HWMON by Jit Loon Lim · Thu Oct 06 10:52:40 2022 +0800
- 746ca17 fix(intel): fix sp_timer0 is not disabled in firewall on Agilex by Jit Loon Lim · Tue Sep 20 10:41:37 2022 +0800
- b9ae467 feat(intel): setup FPGA interface for Agilex by Jit Loon Lim · Wed Jun 15 14:59:33 2022 +0200
- a3e5635 fix(intel): fix pinmux handoff bug on Agilex by Jit Loon Lim · Thu Jun 16 22:54:01 2022 +0200
- 1632608 fix(intel): fix print out ERROR when encounter SEU_Err by Sieu Mun Tang · Tue Nov 22 23:22:45 2022 +0800
- 55803a2 fix(intel): fix UART baud rate and clock by Sieu Mun Tang · Fri Jul 01 09:08:57 2022 +0800
- 25b6992 Merge "fix(intel): fix asynchronous read response by copying data to input buffer" into integration by Sandrine Bailleux · Mon Oct 03 10:51:09 2022 +0200
- c9b11d2 fix(intel): fix asynchronous read response by copying data to input buffer by Sieu Mun Tang · Mon Jul 04 22:34:32 2022 +0800
- 8482cb6 fix(intel): fix Mac verify update and finalize for return response data by Sieu Mun Tang · Fri Jun 24 11:11:41 2022 +0800
- 890e02b chore: use tabs for indentation by Jorge Troncoso · Mon Aug 29 15:58:07 2022 -0700
- dc2daae build(agilex): platform changes for verifying gpt header crc by Rohit Ner · Wed May 11 03:15:40 2022 -0700
- dce970c build(stratix10): platform changes for verifying gpt header crc by Rohit Ner · Wed May 11 03:18:31 2022 -0700
- 2f2b61c fix(intel): remove unused printout by Sieu Mun Tang · Fri May 13 16:42:42 2022 +0800
- c366760 fix(intel): fix configuration status based on start request by Sieu Mun Tang · Fri May 13 14:55:05 2022 +0800
- 4f5554c style(intel): align the sequence in header file by Sieu Mun Tang · Fri May 13 14:36:32 2022 +0800
- b56c078 fix(intel): remove redundant NOC header declarations by Sieu Mun Tang · Fri May 13 11:14:08 2022 +0800
- 7420c53 fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD by Sieu Mun Tang · Tue May 10 23:17:04 2022 +0800
- 527df9f fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying by Sieu Mun Tang · Thu Apr 28 16:28:48 2022 +0800
- e77d37d fix(intel): extending to support large file size for SHA-2 ECDSA data signing and signature verifying by Sieu Mun Tang · Thu Apr 28 16:23:20 2022 +0800
- 9bea815 fix(intel): extending to support large file size for AES encryption and decryption by Sieu Mun Tang · Thu Apr 28 16:15:54 2022 +0800
- 5d187c0 feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands by Sieu Mun Tang · Tue May 10 23:26:57 2022 +0800
- 044ed48 feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands by Sieu Mun Tang · Wed May 11 10:45:19 2022 +0800
- d2df204 fix(intel): update certificate mask for FPGA Attestation by Boon Khai Ng · Mon Aug 30 15:05:49 2021 +0800
- 758a2ad feat(intel): update to support maximum response data size by Sieu Mun Tang · Wed May 11 10:23:13 2022 +0800
- 59357e8 feat(intel): support ECDSA HASH Verification by Sieu Mun Tang · Tue May 10 17:53:32 2022 +0800
- 8aa05ad feat(intel): support ECDSA HASH Signing by Sieu Mun Tang · Tue May 10 17:50:30 2022 +0800
- 0675c22 feat(intel): support ECDH request by Sieu Mun Tang · Tue May 10 17:48:11 2022 +0800
- dcaab77 feat(intel): support ECDSA SHA-2 Data Signature Verification by Sieu Mun Tang · Wed May 11 10:16:40 2022 +0800
- 153ecfb feat(intel): support ECDSA SHA-2 Data Signing by Sieu Mun Tang · Tue May 10 17:39:26 2022 +0800
- e2f3ede feat(intel): support ECDSA Get Public Key by Sieu Mun Tang · Tue May 10 17:36:32 2022 +0800
- 22322fb feat(intel): support session based SDOS encrypt and decrypt by Sieu Mun Tang · Mon May 09 16:05:58 2022 +0800
- b0c1d11 feat(intel): support AES Crypt Service by Sieu Mun Tang · Tue May 10 17:30:00 2022 +0800
- 583149a feat(intel): support HMAC SHA-2 MAC verify request by Sieu Mun Tang · Tue May 10 17:27:12 2022 +0800
- d907cc3 feat(intel): support SHA-2 hash digest generation on a blob by Sieu Mun Tang · Tue May 10 17:24:05 2022 +0800
- e7a037f feat(intel): support extended random number generation by Sieu Mun Tang · Tue May 10 17:18:19 2022 +0800
- fb1f6e9 feat(intel): support crypto service key operation by Sieu Mun Tang · Mon May 09 14:16:14 2022 +0800
- 16754e1 feat(intel): support crypto service session by Sieu Mun Tang · Mon May 09 12:08:42 2022 +0800
- 28af165 feat(intel): extend attestation service to Agilex family by Sieu Mun Tang · Mon May 09 10:48:53 2022 +0800
- cac786d fix(intel): flush dcache before sending certificate to mailbox by Boon Khai Ng · Wed May 26 01:50:34 2021 +0800
- 96bbdca fix(intel): introduce a generic response error code by Sieu Mun Tang · Tue Apr 12 15:00:13 2022 +0800
- fd8a8ad fix(intel): allow non-secure access to FPGA Crypto Services (FCS) by Sieu Mun Tang · Sat May 07 00:50:37 2022 +0800
- a068fdf feat(intel): single certificate feature enablement by Sieu Mun Tang · Wed May 11 10:01:54 2022 +0800
- 2a820b9 feat(intel): initial commit for attestation service by Sieu Mun Tang · Wed May 11 09:59:55 2022 +0800
- 128d2a7 fix(intel): update encryption and decryption command logic by Sieu Mun Tang · Wed May 11 09:49:25 2022 +0800
- 2cebbc6 Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration by Madhukar Pappireddy · Tue May 10 20:17:51 2022 +0200
- 1a832bf Merge "feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC" into integration by Madhukar Pappireddy · Fri May 06 19:33:59 2022 +0200
- a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · Wed Apr 06 10:19:16 2022 +0800
- e026eea feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC by Sieu Mun Tang · Thu May 05 23:42:55 2022 +0800
- 82cf5df feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge by Sieu Mun Tang · Thu May 05 17:07:21 2022 +0800
- db79fa5 fix(intel): reject non 4-byte align request size for FPGA Crypto Service (FCS) by Sieu Mun Tang · Sun Mar 20 00:49:57 2022 +0800
- e768dfa feat(intel): add SMC support for HWMON voltage and temp sensor by Kris Chaplin · Fri Jun 25 11:31:52 2021 +0100
- 2b8e005 feat(intel): add SMC support for Get USERCODE by Sieu Mun Tang · Wed Apr 27 18:57:29 2022 +0800
- bfda95a fix(intel): extend SDM command to return the SDM firmware version by Sieu Mun Tang · Wed Apr 27 18:54:10 2022 +0800
- d9006fc feat(intel): add SMC for enquiring firmware version by Abdul Halim, Muhammad Hadi Asyrafi · Fri Feb 05 11:50:58 2021 +0800
- 959143d fix(intel): configuration status based on start request by Abdul Halim, Muhammad Hadi Asyrafi · Tue Dec 29 16:49:23 2020 +0800
- 5406498 fix(intel): bit-wise configuration flag handling by Sieu Mun Tang · Thu Apr 28 22:40:58 2022 +0800
- 37c7076 fix(intel): get config status OK status by Abdul Halim, Muhammad Hadi Asyrafi · Fri Nov 20 11:41:59 2020 +0800
- fbc3913 fix(intel): use macro as return value by Abdul Halim, Muhammad Hadi Asyrafi · Fri Nov 20 11:06:00 2020 +0800
- 351e884 fix(intel): fix fpga config write return mechanism by Abdul Halim, Muhammad Hadi Asyrafi · Thu Nov 05 18:00:03 2020 +0800
- e6d5de9 feat(intel): add SiP service for DCMF status by Sieu Mun Tang · Thu Apr 28 22:21:01 2022 +0800
- 681631b feat(intel): add RSU 'Max Retry' SiP SMC services by Chee Hong Ang · Wed Jul 01 14:22:25 2020 +0800
- b30ce3f feat(intel): enable SMC SoC FPGA bridges enable/disable by Abdul Halim, Muhammad Hadi Asyrafi · Thu Jun 18 16:21:29 2020 +0800
- 2cfd8ec feat(intel): add SMC/PSCI services for DCMF version support by Chee Hong Ang · Wed May 13 11:44:04 2020 +0800
- 869d4f5 feat(intel): allow to access all register addresses if DEBUG=1 by Siew Chin Lim · Tue May 11 21:12:22 2021 +0800
- b251c33 fix(intel): modify how configuration type is handled by Abdul Halim, Muhammad Hadi Asyrafi · Fri May 29 12:13:17 2020 +0800
- f9cb657 feat(intel): support SiP SVC version by Sieu Mun Tang · Wed Apr 27 18:24:06 2022 +0800
- 2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:40:46 2020 +0800
- 1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · Thu Aug 06 10:21:54 2020 +0800
- 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:12:23 2020 +0800
- b19ac61 feat(intel): add macro to switch between different UART PORT by Boon Khai Ng · Fri Aug 06 01:16:46 2021 +0800
- a34b881 feat(intel): add SMC support for ROM Patch SHA384 mailbox by Sieu Mun Tang · Thu Mar 17 03:11:55 2022 +0800