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git01.mediatek.com / filogic / atf / 1490fab82ed8126c66acef75e0bbae9da35578a2 / plat / intel / soc / common / include
  1. 79fe561 Merge "fix(intel): fix CCU for cache maintenance" into integration by Mark Dykes · Tue Oct 22 17:33:08 2024 +0200
  2. 8fc1168 Merge "fix(intel): flush L1/L2/L3/Sys cache before HPS cold reset" into integration by Mark Dykes · Tue Oct 22 17:30:32 2024 +0200
  3. 82254ee fix(intel): fix CCU for cache maintenance by Sieu Mun Tang · Tue Oct 22 00:52:09 2024 +0800
  4. 9dd2c18 fix(intel): flush L1/L2/L3/Sys cache before HPS cold reset by Sieu Mun Tang · Tue Oct 22 01:00:45 2024 +0800
  5. 7c14cea feat(intel): direct boot from TF-A to Linux for Agilex by Sieu Mun Tang · Fri Feb 02 23:23:12 2024 +0800
  6. b632284 feat(intel): update hand-off data to include agilex5 params by Girisha Dengi · Thu Apr 04 15:52:37 2024 +0800
  7. 7bb345c feat(intel): update Agilex5 DDR and IOSSM driver by Sieu Mun Tang · Mon Aug 26 22:51:16 2024 +0800
  8. 6848bd6 feat(intel): enable VAB support for Intel products by Sieu Mun Tang · Sat Jul 20 00:43:43 2024 +0800
  9. d80c3d3 feat(intel): add in SHA384 authentication by Jit Loon Lim · Thu Oct 26 23:46:01 2023 +0800
  10. 60f0b58 feat(intel): add QSPI get devinfo mailbox cmd by Kah Jing Lee · Sun Jan 07 20:34:39 2024 +0800
  11. c271599 feat(intel): enable query of fip offset on RSU by Mahesh Rao · Tue Aug 22 17:26:23 2023 +0800
  12. 01c564b feat(intel): support query of fip offset using RSU by Mahesh Rao · Tue Aug 22 17:22:24 2023 +0800
  13. c697fd5 Merge changes I548e3034,I65c7fd1b,I1cdacc0f,If9ac35af into integration by Sandrine Bailleux (on vacation) · Wed Dec 27 11:21:09 2023 +0100
  14. 6e42279 feat(intel): add in QSPI ECC for Linux by Jit Loon Lim · Thu Sep 07 16:44:07 2023 +0800
  15. eede099 fix(intel): add HPS remapper to remap base address for SDM by Sieu Mun Tang · Fri Dec 22 00:26:42 2023 +0800
  16. e7ab132 Merge "fix(intel): fix hardcoded mpu frequency ticks" into integration by Sandrine Bailleux · Tue Dec 19 16:12:59 2023 +0100
  17. f72b96d Merge "feat(intel): support SDM mailbox safe inject seu error for Linux" into integration by Manish Pandey · Mon Dec 18 18:39:10 2023 +0100
  18. ffa06e7 fix(intel): fix hardcoded mpu frequency ticks by Jit Loon Lim · Fri Jul 07 17:15:26 2023 +0800
  19. b46c869 feat(intel): support SDM mailbox safe inject seu error for Linux by Jit Loon Lim · Wed Sep 20 14:00:41 2023 +0800
  20. b35f68a fix(intel): update HPS bridges for Agilex5 SoC FPGA by Sieu Mun Tang · Mon Oct 16 00:15:38 2023 +0800
  21. 4c249f1 feat(intel): platform enablement for Agilex5 SoC FPGA by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  22. 7768a66 feat(intel): vab support for Agilex5 SoC FPGA by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  23. 86733dd feat(intel): reset manager support for Agilex5 SoC FPGA by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  24. 7787efe feat(intel): mailbox and SMC support for Agilex5 SoC FPGA by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  25. 5e76874 feat(intel): system manager support for Agilex5 SoC FPGA by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  26. 8bb9193 feat(intel): pinmux, peripheral and Handoff support for Agilex5 SoC FPGA by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  27. 1e1c8c4 feat(intel): add intel_rsu_update() to sip_svc_v2 by Mahesh Rao · Tue May 23 14:33:45 2023 +0800
  28. f3662dd Merge "fix(intel): update checking for memcpy and memset" into integration by Sandrine Bailleux · Wed May 24 08:31:09 2023 +0200
  29. 709a519 Merge changes I38545567,I2f52d3ea into integration by Sandrine Bailleux · Tue May 23 17:43:00 2023 +0200
  30. 86f6fb3 feat(intel): restructure sys mgr for Agilex by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  31. 581ad47 fix(intel): update checking for memcpy and memset by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  32. 2bee173 feat(intel): setup SEU ERR read interface for FP8 by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  33. a9fca83 fix(intel): fix Agilex and N5X clock manager to main PLL C0 by Jit Loon Lim · Thu Dec 22 21:52:36 2022 +0800
  34. fda03c9 feat(intel): fix bridge disable and reset by Ang Tien Sung · Mon Mar 13 09:32:40 2023 +0800
  35. 6c7f0c7 fix(intel): add mailbox error return status for FCS_DECRYPTION by Sieu Mun Tang · Sun Dec 04 01:43:35 2022 +0800
  36. fc2e956 Merge "feat(intel): extending to support SMMU in FCS" into integration by Sandrine Bailleux · Tue Dec 06 17:27:17 2022 +0100
  37. 3c4e5ab Merge "fix(intel): fix fcs_client crashed when increased param size" into integration by Sandrine Bailleux · Tue Dec 06 17:27:07 2022 +0100
  38. 6f9a4cc fix(intel): fix fcs_client crashed when increased param size by Jit Loon Lim · Tue Sep 13 10:24:04 2022 +0800
  39. bd8da63 feat(intel): extending to support SMMU in FCS by Sieu Mun Tang · Wed Sep 28 15:58:28 2022 +0800
  40. 7501681 fix(intel): agilex bitstream pre-authenticate by Jit Loon Lim · Thu Nov 03 20:03:37 2022 +0800
  41. dd96d8f fix(intel): mailbox store QSPI ref clk in scratch reg by Jit Loon Lim · Fri Aug 19 13:40:17 2022 +0200
  42. 55803a2 fix(intel): fix UART baud rate and clock by Sieu Mun Tang · Fri Jul 01 09:08:57 2022 +0800
  43. c366760 fix(intel): fix configuration status based on start request by Sieu Mun Tang · Fri May 13 14:55:05 2022 +0800
  44. 527df9f fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying by Sieu Mun Tang · Thu Apr 28 16:28:48 2022 +0800
  45. e77d37d fix(intel): extending to support large file size for SHA-2 ECDSA data signing and signature verifying by Sieu Mun Tang · Thu Apr 28 16:23:20 2022 +0800
  46. 9bea815 fix(intel): extending to support large file size for AES encryption and decryption by Sieu Mun Tang · Thu Apr 28 16:15:54 2022 +0800
  47. 5d187c0 feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands by Sieu Mun Tang · Tue May 10 23:26:57 2022 +0800
  48. 044ed48 feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands by Sieu Mun Tang · Wed May 11 10:45:19 2022 +0800
  49. d2df204 fix(intel): update certificate mask for FPGA Attestation by Boon Khai Ng · Mon Aug 30 15:05:49 2021 +0800
  50. 758a2ad feat(intel): update to support maximum response data size by Sieu Mun Tang · Wed May 11 10:23:13 2022 +0800
  51. 59357e8 feat(intel): support ECDSA HASH Verification by Sieu Mun Tang · Tue May 10 17:53:32 2022 +0800
  52. 8aa05ad feat(intel): support ECDSA HASH Signing by Sieu Mun Tang · Tue May 10 17:50:30 2022 +0800
  53. 0675c22 feat(intel): support ECDH request by Sieu Mun Tang · Tue May 10 17:48:11 2022 +0800
  54. dcaab77 feat(intel): support ECDSA SHA-2 Data Signature Verification by Sieu Mun Tang · Wed May 11 10:16:40 2022 +0800
  55. 153ecfb feat(intel): support ECDSA SHA-2 Data Signing by Sieu Mun Tang · Tue May 10 17:39:26 2022 +0800
  56. e2f3ede feat(intel): support ECDSA Get Public Key by Sieu Mun Tang · Tue May 10 17:36:32 2022 +0800
  57. 22322fb feat(intel): support session based SDOS encrypt and decrypt by Sieu Mun Tang · Mon May 09 16:05:58 2022 +0800
  58. b0c1d11 feat(intel): support AES Crypt Service by Sieu Mun Tang · Tue May 10 17:30:00 2022 +0800
  59. 583149a feat(intel): support HMAC SHA-2 MAC verify request by Sieu Mun Tang · Tue May 10 17:27:12 2022 +0800
  60. d907cc3 feat(intel): support SHA-2 hash digest generation on a blob by Sieu Mun Tang · Tue May 10 17:24:05 2022 +0800
  61. e7a037f feat(intel): support extended random number generation by Sieu Mun Tang · Tue May 10 17:18:19 2022 +0800
  62. fb1f6e9 feat(intel): support crypto service key operation by Sieu Mun Tang · Mon May 09 14:16:14 2022 +0800
  63. 16754e1 feat(intel): support crypto service session by Sieu Mun Tang · Mon May 09 12:08:42 2022 +0800
  64. 28af165 feat(intel): extend attestation service to Agilex family by Sieu Mun Tang · Mon May 09 10:48:53 2022 +0800
  65. fd8a8ad fix(intel): allow non-secure access to FPGA Crypto Services (FCS) by Sieu Mun Tang · Sat May 07 00:50:37 2022 +0800
  66. a068fdf feat(intel): single certificate feature enablement by Sieu Mun Tang · Wed May 11 10:01:54 2022 +0800
  67. 2a820b9 feat(intel): initial commit for attestation service by Sieu Mun Tang · Wed May 11 09:59:55 2022 +0800
  68. 128d2a7 fix(intel): update encryption and decryption command logic by Sieu Mun Tang · Wed May 11 09:49:25 2022 +0800
  69. 2cebbc6 Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration by Madhukar Pappireddy · Tue May 10 20:17:51 2022 +0200
  70. a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · Wed Apr 06 10:19:16 2022 +0800
  71. 82cf5df feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge by Sieu Mun Tang · Thu May 05 17:07:21 2022 +0800
  72. e768dfa feat(intel): add SMC support for HWMON voltage and temp sensor by Kris Chaplin · Fri Jun 25 11:31:52 2021 +0100
  73. 2b8e005 feat(intel): add SMC support for Get USERCODE by Sieu Mun Tang · Wed Apr 27 18:57:29 2022 +0800
  74. bfda95a fix(intel): extend SDM command to return the SDM firmware version by Sieu Mun Tang · Wed Apr 27 18:54:10 2022 +0800
  75. d9006fc feat(intel): add SMC for enquiring firmware version by Abdul Halim, Muhammad Hadi Asyrafi · Fri Feb 05 11:50:58 2021 +0800
  76. 5406498 fix(intel): bit-wise configuration flag handling by Sieu Mun Tang · Thu Apr 28 22:40:58 2022 +0800
  77. e6d5de9 feat(intel): add SiP service for DCMF status by Sieu Mun Tang · Thu Apr 28 22:21:01 2022 +0800
  78. 681631b feat(intel): add RSU 'Max Retry' SiP SMC services by Chee Hong Ang · Wed Jul 01 14:22:25 2020 +0800
  79. b30ce3f feat(intel): enable SMC SoC FPGA bridges enable/disable by Abdul Halim, Muhammad Hadi Asyrafi · Thu Jun 18 16:21:29 2020 +0800
  80. b251c33 fix(intel): modify how configuration type is handled by Abdul Halim, Muhammad Hadi Asyrafi · Fri May 29 12:13:17 2020 +0800
  81. f9cb657 feat(intel): support SiP SVC version by Sieu Mun Tang · Wed Apr 27 18:24:06 2022 +0800
  82. 2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:40:46 2020 +0800
  83. 1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · Thu Aug 06 10:21:54 2020 +0800
  84. 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:12:23 2020 +0800
  85. b19ac61 feat(intel): add macro to switch between different UART PORT by Boon Khai Ng · Fri Aug 06 01:16:46 2021 +0800
  86. a34b881 feat(intel): add SMC support for ROM Patch SHA384 mailbox by Sieu Mun Tang · Thu Mar 17 03:11:55 2022 +0800
  87. a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · Mon Feb 28 15:24:59 2022 +0800
  88. dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · Mon Mar 07 12:13:04 2022 +0800
  89. f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · Mon Jun 29 12:15:27 2020 +0800
  90. 8881ad0 build(intel): add N5X as a new Intel platform by Sieu Mun Tang · Mon Mar 07 12:04:59 2022 +0800
  91. 9f22cbf build(intel): initial commit for crypto driver by Sieu Mun Tang · Wed Mar 02 11:04:09 2022 +0800
  92. f57b5cc Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration by Madhukar Pappireddy · Mon Feb 28 17:18:39 2022 +0100
  93. 2468266 fix(intel): null pointer handling for resp_len by Sieu Mun Tang · Sat Feb 19 21:49:48 2022 +0800
  94. 33b89d5 fix(intel): define macros to handle buffer entries by Abdul Halim, Muhammad Hadi Asyrafi · Fri Jun 05 15:12:29 2020 +0800
  95. ae4cd3a fix(intel): enable HPS QSPI access by default by Abdul Halim, Muhammad Hadi Asyrafi · Tue Oct 06 20:09:53 2020 +0800
  96. 118ab21 intel: common: Fix non-MISRA compliant code v2 by Abdul Halim, Muhammad Hadi Asyrafi · Thu Oct 15 15:27:18 2020 +0800
  97. 5bc87bc intel: mailbox: Mailbox error recovery handling by Chee Hong Ang · Mon May 11 11:23:21 2020 +0800
  98. 94fae38 intel: mailbox: Driver now handles larger response by Abdul Halim, Muhammad Hadi Asyrafi · Wed Apr 29 22:26:40 2020 +0800
  99. 20a07f3 intel: common: Change how mailbox handles job id & buffer by Abdul Halim, Muhammad Hadi Asyrafi · Mon May 18 11:16:48 2020 +0800
  100. 99b5e16 intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB by Richard Gong · Mon Apr 13 09:40:43 2020 -0500