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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Soby Mathew7d5a2e72018-01-10 15:59:31 +00002 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +01007#include <arm_config.h>
Dan Handley2b6b5742015-03-19 19:17:53 +00008#include <plat_arm.h>
Soby Mathewcc364842018-02-21 01:16:39 +00009#include <platform.h>
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +010010#include <smmu_v3.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010011#include "fvp_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010012
Soby Mathew7d5a2e72018-01-10 15:59:31 +000013void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
14 u_register_t arg2, u_register_t arg3)
Achin Gupta4f6ad662013-10-25 09:08:21 +010015{
Soby Mathew7d5a2e72018-01-10 15:59:31 +000016 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
Vikram Kanigiri3684abf2014-03-27 14:33:15 +000017
Achin Gupta4f6ad662013-10-25 09:08:21 +010018 /* Initialize the platform config for future decision making */
Dan Handleyea451572014-05-15 14:53:30 +010019 fvp_config_setup();
Vikram Kanigiri96377452014-04-24 11:02:16 +010020
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +010021 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +000022 * Initialize the correct interconnect for this cluster during cold
23 * boot. No need for locks as no other CPU is active.
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +010024 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +000025 fvp_interconnect_init();
Sandrine Bailleuxda797f62015-05-14 14:13:05 +010026
Dan Handley2b6b5742015-03-19 19:17:53 +000027 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +000028 * Enable coherency in interconnect for the primary CPU's cluster.
Sandrine Bailleuxda797f62015-05-14 14:13:05 +010029 * Earlier bootloader stages might already do this (e.g. Trusted
30 * Firmware's BL1 does it) but we can't assume so. There is no harm in
31 * executing this code twice anyway.
Dan Handley2b6b5742015-03-19 19:17:53 +000032 * FVP PSCI code will enable coherency for other clusters.
33 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +000034 fvp_interconnect_enable();
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +010035
36 /* On FVP RevC, intialize SMMUv3 */
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +010037 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U)
Jeenu Viswambharan9e78b922017-07-18 15:42:50 +010038 smmuv3_init(PLAT_FVP_SMMUV3_BASE);
Achin Gupta4f6ad662013-10-25 09:08:21 +010039}