Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 7 | #include <plat_arm.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 8 | #include "fvp_private.h" |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 9 | |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 10 | #if LOAD_IMAGE_V2 |
| 11 | void bl31_early_platform_setup(void *from_bl2, |
| 12 | void *plat_params_from_bl2) |
| 13 | #else |
Vikram Kanigiri | da56743 | 2014-04-15 18:08:08 +0100 | [diff] [blame] | 14 | void bl31_early_platform_setup(bl31_params_t *from_bl2, |
Vikram Kanigiri | d8c9d26 | 2014-05-16 18:48:12 +0100 | [diff] [blame] | 15 | void *plat_params_from_bl2) |
Yatharth Kochar | f9a0f16 | 2016-09-13 17:07:57 +0100 | [diff] [blame] | 16 | #endif |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 17 | { |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 18 | arm_bl31_early_platform_setup(from_bl2, plat_params_from_bl2); |
Vikram Kanigiri | 3684abf | 2014-03-27 14:33:15 +0000 | [diff] [blame] | 19 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 20 | /* Initialize the platform config for future decision making */ |
Dan Handley | ea45157 | 2014-05-15 14:53:30 +0100 | [diff] [blame] | 21 | fvp_config_setup(); |
Vikram Kanigiri | 9637745 | 2014-04-24 11:02:16 +0100 | [diff] [blame] | 22 | |
Vikram Kanigiri | 9d70f0f | 2014-07-15 16:46:43 +0100 | [diff] [blame] | 23 | /* |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 24 | * Initialize the correct interconnect for this cluster during cold |
| 25 | * boot. No need for locks as no other CPU is active. |
Vikram Kanigiri | 9d70f0f | 2014-07-15 16:46:43 +0100 | [diff] [blame] | 26 | */ |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 27 | fvp_interconnect_init(); |
Sandrine Bailleux | da797f6 | 2015-05-14 14:13:05 +0100 | [diff] [blame] | 28 | |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 29 | /* |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 30 | * Enable coherency in interconnect for the primary CPU's cluster. |
Sandrine Bailleux | da797f6 | 2015-05-14 14:13:05 +0100 | [diff] [blame] | 31 | * Earlier bootloader stages might already do this (e.g. Trusted |
| 32 | * Firmware's BL1 does it) but we can't assume so. There is no harm in |
| 33 | * executing this code twice anyway. |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 34 | * FVP PSCI code will enable coherency for other clusters. |
| 35 | */ |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 36 | fvp_interconnect_enable(); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 37 | } |