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Paul Beesley97743022019-07-12 11:37:07 +01001TF-A Build Instructions for Marvell Platforms
2=============================================
3
4This section describes how to compile the Trusted Firmware-A (TF-A) project for Marvell's platforms.
5
6Build Instructions
7------------------
8(1) Set the cross compiler
9
10 .. code:: shell
11
Mark Dykesef3a4562020-01-08 20:37:18 +000012 > export CROSS_COMPILE=/path/to/toolchain/aarch64-linux-gnu-
Paul Beesley97743022019-07-12 11:37:07 +010013
14(2) Set path for FIP images:
15
16Set U-Boot image path (relatively to TF-A root or absolute path)
17
18 .. code:: shell
19
20 > export BL33=path/to/u-boot.bin
21
22For example: if U-Boot project (and its images) is located at ``~/project/u-boot``,
23BL33 should be ``~/project/u-boot/u-boot.bin``
24
25 .. note::
26
27 *u-boot.bin* should be used and not *u-boot-spl.bin*
28
Konstantin Porotchkin23099612020-10-12 18:13:07 +030029Set MSS/SCP image path (mandatory only for A7K/8K/CN913x when MSS_SUPPORT=1)
Paul Beesley97743022019-07-12 11:37:07 +010030
31 .. code:: shell
32
33 > export SCP_BL2=path/to/mrvl_scp_bl2*.img
34
35(3) Armada-37x0 build requires WTP tools installation.
36
37See below in the section "Tools and external components installation".
38Install ARM 32-bit cross compiler, which is required for building WTMI image for CM3
39
40 .. code:: shell
41
42 > sudo apt-get install gcc-arm-linux-gnueabi
43
44(4) Clean previous build residuals (if any)
45
46 .. code:: shell
47
48 > make distclean
49
50(5) Build TF-A
51
52There are several build options:
53
Pali Rohár179b6732021-02-01 12:22:37 +010054- PLAT
55
56 Supported Marvell platforms are:
57
58 - a3700 - A3720 DB, EspressoBin and Turris MOX
59 - a70x0
60 - a70x0_amc - AMC board
61 - a80x0
62 - a80x0_mcbin - MacchiatoBin
63 - a80x0_puzzle - IEI Puzzle-M801
64 - t9130 - CN913x
65
Paul Beesley97743022019-07-12 11:37:07 +010066- DEBUG
67
68 Default is without debug information (=0). in order to enable it use ``DEBUG=1``.
69 Must be disabled when building UART recovery images due to current console driver
70 implementation that is not compatible with Xmodem protocol used for boot image download.
71
72- LOG_LEVEL
73
74 Defines the level of logging which will be purged to the default output port.
75
Pali Rohár8dc46a02020-10-29 17:44:27 +010076 - 0 - LOG_LEVEL_NONE
77 - 10 - LOG_LEVEL_ERROR
78 - 20 - LOG_LEVEL_NOTICE (default for DEBUG=0)
79 - 30 - LOG_LEVEL_WARNING
80 - 40 - LOG_LEVEL_INFO (default for DEBUG=1)
81 - 50 - LOG_LEVEL_VERBOSE
Paul Beesley97743022019-07-12 11:37:07 +010082
83- USE_COHERENT_MEM
84
85 This flag determines whether to include the coherent memory region in the
Pali Rohár8dc46a02020-10-29 17:44:27 +010086 BL memory map or not. Enabled by default.
Paul Beesley97743022019-07-12 11:37:07 +010087
88- LLC_ENABLE
89
90 Flag defining the LLC (L3) cache state. The cache is enabled by default (``LLC_ENABLE=1``).
91
Konstantin Porotchkin2ef36a32019-03-31 16:58:11 +030092- LLC_SRAM
93
Konstantin Porotchkin28503262019-04-15 16:32:59 +030094 Flag enabling the LLC (L3) cache SRAM support. The LLC SRAM is activated and used
95 by Trusted OS (OP-TEE OS, BL32). The TF-A only prepares CCU address translation windows
96 for SRAM address range at BL31 execution stage with window target set to DRAM-0.
97 When Trusted OS activates LLC SRAM, the CCU window target is changed to SRAM.
98 There is no reason to enable this feature if OP-TEE OS built with CFG_WITH_PAGER=n.
99 Only set LLC_SRAM=1 if OP-TEE OS is built with CFG_WITH_PAGER=y.
Konstantin Porotchkin2ef36a32019-03-31 16:58:11 +0300100
Marek Behún19d85782021-01-05 14:01:05 +0100101- CM3_SYSTEM_RESET
102
103 For Armada37x0 only, when ``CM3_SYSTEM_RESET=1``, the Cortex-M3 secure coprocessor will
104 be used for system reset.
105 TF-A will send command 0x0009 with a magic value via the rWTM mailbox interface to the
106 Cortex-M3 secure coprocessor.
107 The firmware running in the coprocessor must either implement this functionality or
108 ignore the 0x0009 command (which is true for the firmware from A3700-utils-marvell
109 repository). If this option is enabled but the firmware does not support this command,
110 an error message will be printed prior trying to reboot via the usual way.
111
112 This option is needed on Turris MOX as a workaround to a HW bug which causes reset to
113 sometime hang the board.
114
Pali Roháre7704b02021-04-06 19:18:30 +0200115- A3720_DB_PM_WAKEUP_SRC
116
117 For Armada 3720 Develpment Board only, when ``A3720_DB_PM_WAKEUP_SRC=1``,
118 TF-A will setup PM wake up src configuration. This option is disabled by default.
119
Paul Beesley97743022019-07-12 11:37:07 +0100120- MARVELL_SECURE_BOOT
121
122 Build trusted(=1)/non trusted(=0) image, default is non trusted.
123
124- BLE_PATH
125
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200126 Points to BLE (Binary ROM extension) sources folder.
127 Only required for A7K/8K/CN913x builds.
Grzegorz Jaszczyk3039bce2019-11-05 13:14:59 +0100128 The parameter is optional, its default value is ``plat/marvell/armada/a8k/common/ble``.
Paul Beesley97743022019-07-12 11:37:07 +0100129
130- MV_DDR_PATH
131
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200132 For A7K/8K/CN913x, use this parameter to point to mv_ddr driver sources to allow BLE build. For A37x0,
Paul Beesley97743022019-07-12 11:37:07 +0100133 it is used for ddr_tool build.
134
135 Usage example: MV_DDR_PATH=path/to/mv_ddr
136
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200137 The parameter is optional for A7K/8K/CN913x, when this parameter is not set, the mv_ddr
Paul Beesley97743022019-07-12 11:37:07 +0100138 sources are expected to be located at: drivers/marvell/mv_ddr. However, the parameter
139 is necessary for A37x0.
140
141 For the mv_ddr source location, check the section "Tools and external components installation"
142
Pali Rohár88f225a2021-01-26 10:44:07 +0100143 If MV_DDR_PATH source code is a git snapshot then provide path to the full git
144 repository (including .git subdir) because mv_ddr build process calls git commands.
145
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200146- CP_NUM
147
148 Total amount of CPs (South Bridge) connected to AP. When the parameter is omitted,
149 the build uses the default number of CPs, which is a number of embedded CPs inside the
150 package: 1 or 2 depending on the SoC used. The parameter is valid for OcteonTX2 CN913x SoC
151 family (PLAT=t9130), which can have external CPs connected to the MCI ports. Valid
152 values with CP_NUM are in a range of 1 to 3.
153
Paul Beesley97743022019-07-12 11:37:07 +0100154- DDR_TOPOLOGY
155
156 For Armada37x0 only, the DDR topology map index/name, default is 0.
157
158 Supported Options:
Pali Rohár38686c22021-02-01 12:23:31 +0100159 - 0 - DDR3 1CS 512MB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5)
160 - 1 - DDR4 1CS 512MB (DB-88F3720-DDR4-Modular)
161 - 2 - DDR3 2CS 1GB (EspressoBin V3-V5)
162 - 3 - DDR4 2CS 4GB (DB-88F3720-DDR4-Modular)
163 - 4 - DDR3 1CS 1GB (DB-88F3720-DDR3-Modular, EspressoBin V3-V5)
164 - 5 - DDR4 1CS 1GB (EspressoBin V7, EspressoBin-Ultra)
165 - 6 - DDR4 2CS 2GB (EspressoBin V7)
166 - 7 - DDR3 2CS 2GB (EspressoBin V3-V5)
167 - CUST - CUSTOMER BOARD (Customer board settings)
Paul Beesley97743022019-07-12 11:37:07 +0100168
169- CLOCKSPRESET
170
171 For Armada37x0 only, the clock tree configuration preset including CPU and DDR frequency,
172 default is CPU_800_DDR_800.
173
Pali Rohár8dc46a02020-10-29 17:44:27 +0100174 - CPU_600_DDR_600 - CPU at 600 MHz, DDR at 600 MHz
175 - CPU_800_DDR_800 - CPU at 800 MHz, DDR at 800 MHz
176 - CPU_1000_DDR_800 - CPU at 1000 MHz, DDR at 800 MHz
177 - CPU_1200_DDR_750 - CPU at 1200 MHz, DDR at 750 MHz
Paul Beesley97743022019-07-12 11:37:07 +0100178
Pali Rohár35142872021-02-01 12:24:42 +0100179 Look at Armada37x0 chip package marking on board to identify correct CPU frequency.
180 The last line on package marking (next line after the 88F37x0 line) should contain:
181
182 - C080 or I080 - chip with 800 MHz CPU - use ``CLOCKSPRESET=CPU_800_DDR_800``
183 - C100 or I100 - chip with 1000 MHz CPU - use ``CLOCKSPRESET=CPU_1000_DDR_800``
184 - C120 - chip with 1200 MHz CPU - use ``CLOCKSPRESET=CPU_1200_DDR_750``
185
Paul Beesley97743022019-07-12 11:37:07 +0100186- BOOTDEV
187
188 For Armada37x0 only, the flash boot device, default is ``SPINOR``.
189
190 Currently, Armada37x0 only supports ``SPINOR``, ``SPINAND``, ``EMMCNORM`` and ``SATA``:
191
192 - SPINOR - SPI NOR flash boot
193 - SPINAND - SPI NAND flash boot
194 - EMMCNORM - eMMC Download Mode
195
196 Download boot loader or program code from eMMC flash into CM3 or CA53
197 Requires full initialization and command sequence
198
199 - SATA - SATA device boot
200
Pali Rohára0747422021-01-28 13:09:36 +0100201 Image needs to be stored at disk LBA 0 or at disk partition with
202 MBR type 0x4d (ASCII 'M' as in Marvell) or at disk partition with
203 GPT name ``MARVELL BOOT PARTITION``.
204
Paul Beesley97743022019-07-12 11:37:07 +0100205- PARTNUM
206
207 For Armada37x0 only, the boot partition number, default is 0.
208
209 To boot from eMMC, the value should be aligned with the parameter in
210 U-Boot with name of ``CONFIG_SYS_MMC_ENV_PART``, whose value by default is
211 1. For details about CONFIG_SYS_MMC_ENV_PART, please refer to the U-Boot
212 build instructions.
213
214- WTMI_IMG
215
Pali Rohár2da2e6a2021-01-27 18:04:32 +0100216 For Armada37x0 only, the path of the binary can point to an image which
Paul Beesley97743022019-07-12 11:37:07 +0100217 does nothing, an image which supports EFUSE or a customized CM3 firmware
Pali Rohár2da2e6a2021-01-27 18:04:32 +0100218 binary. The default image is ``fuse.bin`` that built from sources in WTP
Paul Beesley97743022019-07-12 11:37:07 +0100219 folder, which is the next option. If the default image is OK, then this
220 option should be skipped.
221
Pali Rohár2da2e6a2021-01-27 18:04:32 +0100222 Please note that this is not a full WTMI image, just a main loop without
223 hardware initialization code. Final WTMI image is built from this WTMI_IMG
224 binary and sys-init code from the WTP directory which sets DDR and CPU
225 clocks according to DDR_TOPOLOGY and CLOCKSPRESET options.
226
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200227 CZ.NIC as part of Turris project released free and open source WTMI
228 application firmware ``wtmi_app.bin`` for all Armada 3720 devices.
229 This firmware includes additional features like access to Hardware
230 Random Number Generator of Armada 3720 SoC which original Marvell's
231 ``fuse.bin`` image does not have.
232
233 CZ.NIC's Armada 3720 Secure Firmware is available at website:
234
235 https://gitlab.nic.cz/turris/mox-boot-builder/
236
Paul Beesley97743022019-07-12 11:37:07 +0100237- WTP
238
Pali Rohár8dc46a02020-10-29 17:44:27 +0100239 For Armada37x0 only, use this parameter to point to wtptools source code
240 directory, which can be found as a3700_utils.zip in the release. Usage
241 example: ``WTP=/path/to/a3700_utils``
Paul Beesley97743022019-07-12 11:37:07 +0100242
Pali Rohár88f225a2021-01-26 10:44:07 +0100243 If WTP source code is a git snapshot then provide path to the full git
244 repository (including .git subdir) because WTP build process calls git commands.
245
Pali Rohár8dc46a02020-10-29 17:44:27 +0100246- CRYPTOPP_PATH
Paul Beesley97743022019-07-12 11:37:07 +0100247
Pali Rohára304cf52021-01-26 10:44:07 +0100248 For Armada37x0 only, use this parameter to point to Crypto++ source code
249 directory. If this option is specified then Crypto++ source code in
250 CRYPTOPP_PATH directory will be automatically compiled. Crypto++ library
251 is required for building WTP image tool. Either CRYPTOPP_PATH or
252 CRYPTOPP_LIBDIR with CRYPTOPP_INCDIR needs to be specified for Armada37x0.
253
254- CRYPTOPP_LIBDIR
255
256 For Armada37x0 only, use this parameter to point to the directory with
257 compiled Crypto++ library. By default it points to the CRYPTOPP_PATH.
258
259- CRYPTOPP_INCDIR
260
261 For Armada37x0 only, use this parameter to point to the directory with
262 header files of Crypto++ library. By default it points to the CRYPTOPP_PATH.
Paul Beesley97743022019-07-12 11:37:07 +0100263
Paul Beesley97743022019-07-12 11:37:07 +0100264
Pali Rohár8dc46a02020-10-29 17:44:27 +0100265For example, in order to build the image in debug mode with log level up to 'notice' level run
Paul Beesley97743022019-07-12 11:37:07 +0100266
Pali Rohár8dc46a02020-10-29 17:44:27 +0100267.. code:: shell
268
269 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 PLAT=<MARVELL_PLATFORM> mrvl_flash
Paul Beesley97743022019-07-12 11:37:07 +0100270
Pali Rohár8dc46a02020-10-29 17:44:27 +0100271And if we want to build a Armada37x0 image in debug mode with log level up to 'notice' level,
272the image has the preset CPU at 1000 MHz, preset DDR3 at 800 MHz, the DDR topology of DDR4 2CS,
273the image boot from SPI NOR flash partition 0, and the image is non trusted in WTP, the command
274line is as following
Paul Beesley97743022019-07-12 11:37:07 +0100275
Pali Rohár8dc46a02020-10-29 17:44:27 +0100276.. code:: shell
277
278 > make DEBUG=1 USE_COHERENT_MEM=0 LOG_LEVEL=20 CLOCKSPRESET=CPU_1000_DDR_800 \
279 MARVELL_SECURE_BOOT=0 DDR_TOPOLOGY=3 BOOTDEV=SPINOR PARTNUM=0 PLAT=a3700 \
280 MV_DDR_PATH=/path/to/mv-ddr-marvell/ WTP=/path/to/A3700-utils-marvell/ \
281 CRYPTOPP_PATH=/path/to/cryptopp/ BL33=/path/to/u-boot.bin \
Pali Rohár9e737b62021-01-26 10:44:07 +0100282 all fip mrvl_bootimage mrvl_flash mrvl_uart
Pali Rohár8dc46a02020-10-29 17:44:27 +0100283
284To build just TF-A without WTMI image (useful for A3720 Turris MOX board), run following command:
285
286.. code:: shell
287
Marek Behún19d85782021-01-05 14:01:05 +0100288 > make USE_COHERENT_MEM=0 PLAT=a3700 CM3_SYSTEM_RESET=1 BL33=/path/to/u-boot.bin \
289 CROSS_COMPILE=aarch64-linux-gnu- mrvl_bootimage
Pali Rohár8dc46a02020-10-29 17:44:27 +0100290
Pali Rohár0c0d2652021-02-01 12:32:36 +0100291Here is full example how to build production release of Marvell firmware image (concatenated
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200292binary of Marvell's A3720 sys-init, CZ.NIC's Armada 3720 Secure Firmware, TF-A and U-Boot) for
293EspressoBin board (PLAT=a3700) with 1GHz CPU (CLOCKSPRESET=CPU_1000_DDR_800) and
2941GB DDR4 RAM (DDR_TOPOLOGY=5):
Luka Kovaciceb498352021-01-14 14:25:15 +0100295
296.. code:: shell
297
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200298 > git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
299 > git clone https://source.denx.de/u-boot/u-boot.git
Pali Rohár0c0d2652021-02-01 12:32:36 +0100300 > git clone https://github.com/weidai11/cryptopp.git
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200301 > git clone https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
302 > git clone https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
303 > git clone https://gitlab.nic.cz/turris/mox-boot-builder.git
Pali Rohár0c0d2652021-02-01 12:32:36 +0100304 > make -C u-boot CROSS_COMPILE=aarch64-linux-gnu- mvebu_espressobin-88f3720_defconfig u-boot.bin
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200305 > make -C mox-boot-builder CROSS_CM3=arm-linux-gnueabi- wtmi_app.bin
Pali Rohár0c0d2652021-02-01 12:32:36 +0100306 > make -C trusted-firmware-a CROSS_COMPILE=aarch64-linux-gnu- CROSS_CM3=arm-linux-gnueabi- \
307 USE_COHERENT_MEM=0 PLAT=a3700 CLOCKSPRESET=CPU_1000_DDR_800 DDR_TOPOLOGY=5 \
Pali Rohár2c6e0a82021-04-08 10:33:04 +0200308 MV_DDR_PATH=$PWD/mv-ddr-marvell/ WTP=$PWD/A3700-utils-marvell/ \
309 CRYPTOPP_PATH=$PWD/cryptopp/ BL33=$PWD/u-boot/u-boot.bin \
310 WTMI_IMG=$PWD/mox-boot-builder/wtmi_app.bin FIP_ALIGN=0x100 mrvl_flash
Luka Kovaciceb498352021-01-14 14:25:15 +0100311
Pali Rohár0c0d2652021-02-01 12:32:36 +0100312Produced Marvell firmware flash image: ``trusted-firmware-a/build/a3700/release/flash-image.bin``
Paul Beesley97743022019-07-12 11:37:07 +0100313
314Special Build Flags
315--------------------
316
317- PLAT_RECOVERY_IMAGE_ENABLE
318 When set this option to enable secondary recovery function when build atf.
319 In order to build UART recovery image this operation should be disabled for
Konstantin Porotchkinefcc41e2019-02-19 10:40:33 +0200320 A7K/8K/CN913x because of hardware limitation (boot from secondary image
Paul Beesley97743022019-07-12 11:37:07 +0100321 can interrupt UART recovery process). This MACRO definition is set in
Grzegorz Jaszczyk3039bce2019-11-05 13:14:59 +0100322 ``plat/marvell/armada/a8k/common/include/platform_def.h`` file.
Paul Beesley97743022019-07-12 11:37:07 +0100323
Alex Leiboviched2fb472019-02-25 12:24:29 +0200324- DDR32
325 In order to work in 32bit DDR, instead of the default 64bit ECC DDR,
326 this flag should be set to 1.
327
Paul Beesleyd2fcc4e2019-05-29 13:59:40 +0100328For more information about build options, please refer to the
329:ref:`Build Options` document.
Paul Beesley97743022019-07-12 11:37:07 +0100330
331
332Build output
333------------
Pali Rohár8dc46a02020-10-29 17:44:27 +0100334Marvell's TF-A compilation generates 8 files:
Paul Beesley97743022019-07-12 11:37:07 +0100335
Pali Roháre4bfc0a2021-02-01 12:25:46 +0100336 - ble.bin - BLe image (not available for Armada37x0)
Paul Beesley97743022019-07-12 11:37:07 +0100337 - bl1.bin - BL1 image
338 - bl2.bin - BL2 image
339 - bl31.bin - BL31 image
340 - fip.bin - FIP image (contains BL2, BL31 & BL33 (U-Boot) images)
341 - boot-image.bin - TF-A image (contains BL1 and FIP images)
Pali Roháre4bfc0a2021-02-01 12:25:46 +0100342 - flash-image.bin - Flashable Marvell firmware image. For Armada37x0 it
343 contains TIM, WTMI and boot-image.bin images. For other platforms it contains
344 BLe and boot-image.bin images. Should be placed on the boot flash/device.
Pali Rohár8dc46a02020-10-29 17:44:27 +0100345 - uart-images.tgz.bin - GZIPed TAR archive which contains Armada37x0 images
346 for booting via UART. Could be loaded via Marvell's WtpDownload tool from
347 A3700-utils-marvell repository.
Paul Beesley97743022019-07-12 11:37:07 +0100348
Pali Rohár9e737b62021-01-26 10:44:07 +0100349Additional make target ``mrvl_bootimage`` produce ``boot-image.bin`` file. Target
350``mrvl_flash`` produce final ``flash-image.bin`` file and target ``mrvl_uart``
351produce ``uart-images.tgz.bin`` file.
Pali Rohár8dc46a02020-10-29 17:44:27 +0100352
Paul Beesley97743022019-07-12 11:37:07 +0100353
354Tools and external components installation
355------------------------------------------
356
357Armada37x0 Builds require installation of 3 components
358~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
359
360(1) ARM cross compiler capable of building images for the service CPU (CM3).
361 This component is usually included in the Linux host packages.
362 On Debian/Ubuntu hosts the default GNU ARM tool chain can be installed
363 using the following command
364
365 .. code:: shell
366
367 > sudo apt-get install gcc-arm-linux-gnueabi
368
369 Only if required, the default tool chain prefix ``arm-linux-gnueabi-`` can be
370 overwritten using the environment variable ``CROSS_CM3``.
371 Example for BASH shell
372
373 .. code:: shell
374
375 > export CROSS_CM3=/opt/arm-cross/bin/arm-linux-gnueabi
376
377(2) DDR initialization library sources (mv_ddr) available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100378 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100379
380 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
381
Pali Rohár65c8d112020-10-07 11:01:00 +0200382(3) Armada3700 tools available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100383 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100384
385 https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
386
Pali Rohár8dc46a02020-10-29 17:44:27 +0100387(4) Crypto++ library available at the following repository:
388
389 https://github.com/weidai11/cryptopp.git
390
Paul Beesley97743022019-07-12 11:37:07 +0100391Armada70x0 and Armada80x0 Builds require installation of an additional component
392~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
393
394(1) DDR initialization library sources (mv_ddr) available at the following repository
Pali Roháreaeb5272021-01-26 10:44:07 +0100395 (use the "master" branch):
Paul Beesley97743022019-07-12 11:37:07 +0100396
397 https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git