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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
34#include <string.h>
Dan Handley714a0d22014-04-09 13:13:04 +010035#include "psci_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010036
Andrew Thoelke2bc07852014-06-09 12:44:21 +010037typedef int (*afflvl_off_handler_t)(aff_map_node_t *);
Achin Gupta4f6ad662013-10-25 09:08:21 +010038
39/*******************************************************************************
40 * The next three functions implement a handler for each supported affinity
41 * level which is called when that affinity level is turned off.
42 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +010043static int psci_afflvl0_off(aff_map_node_t *cpu_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010044{
Andrew Thoelke4e126072014-06-04 21:10:52 +010045 unsigned int plat_state;
46 int rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +010047
48 assert(cpu_node->level == MPIDR_AFFLVL0);
49
Achin Gupta75f73672013-12-05 16:33:10 +000050 /* State management: mark this cpu as turned off */
51 psci_set_state(cpu_node, PSCI_STATE_OFF);
52
Achin Gupta4f6ad662013-10-25 09:08:21 +010053 /*
Achin Gupta607084e2014-02-09 18:24:19 +000054 * Generic management: Get the index for clearing any lingering re-entry
55 * information and allow the secure world to switch itself off
56 */
57
58 /*
59 * Call the cpu off handler registered by the Secure Payload Dispatcher
60 * to let it do any bookeeping. Assume that the SPD always reports an
61 * E_DENIED error if SP refuse to power down
Achin Gupta4f6ad662013-10-25 09:08:21 +010062 */
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000063 if (psci_spd_pm && psci_spd_pm->svc_off) {
64 rc = psci_spd_pm->svc_off(0);
Achin Gupta607084e2014-02-09 18:24:19 +000065 if (rc)
66 return rc;
67 }
68
Achin Gupta4f6ad662013-10-25 09:08:21 +010069 /*
70 * Arch. management. Perform the necessary steps to flush all
71 * cpu caches.
Achin Gupta4f6ad662013-10-25 09:08:21 +010072 */
Achin Guptae1aa5162014-06-26 09:58:52 +010073 psci_do_pwrdown_cache_maintenance(MPIDR_AFFLVL0);
Achin Gupta4f6ad662013-10-25 09:08:21 +010074
75 /*
76 * Plat. management: Perform platform specific actions to turn this
77 * cpu off e.g. exit cpu coherency, program the power controller etc.
78 */
Andrew Thoelke4e126072014-06-04 21:10:52 +010079 rc = PSCI_E_SUCCESS;
Achin Gupta4f6ad662013-10-25 09:08:21 +010080 if (psci_plat_pm_ops->affinst_off) {
81
82 /* Get the current physical state of this cpu */
Achin Gupta75f73672013-12-05 16:33:10 +000083 plat_state = psci_get_phys_state(cpu_node);
Andrew Thoelke2bc07852014-06-09 12:44:21 +010084 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +010085 cpu_node->level,
86 plat_state);
87 }
88
Achin Gupta4f6ad662013-10-25 09:08:21 +010089 return rc;
90}
91
Andrew Thoelke2bc07852014-06-09 12:44:21 +010092static int psci_afflvl1_off(aff_map_node_t *cluster_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +010093{
94 int rc = PSCI_E_SUCCESS;
95 unsigned int plat_state;
96
97 /* Sanity check the cluster level */
98 assert(cluster_node->level == MPIDR_AFFLVL1);
99
Achin Gupta75f73672013-12-05 16:33:10 +0000100 /* State management: Decrement the cluster reference count */
101 psci_set_state(cluster_node, PSCI_STATE_OFF);
102
Achin Gupta4f6ad662013-10-25 09:08:21 +0100103 /*
104 * Keep the physical state of this cluster handy to decide
105 * what action needs to be taken
106 */
Achin Gupta75f73672013-12-05 16:33:10 +0000107 plat_state = psci_get_phys_state(cluster_node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100108
109 /*
110 * Arch. Management. Flush all levels of caches to PoC if
111 * the cluster is to be shutdown
112 */
113 if (plat_state == PSCI_STATE_OFF)
114 dcsw_op_all(DCCISW);
115
116 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000117 * Plat. Management. Allow the platform to do its cluster
Achin Gupta4f6ad662013-10-25 09:08:21 +0100118 * specific bookeeping e.g. turn off interconnect coherency,
119 * program the power controller etc.
120 */
121 if (psci_plat_pm_ops->affinst_off)
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100122 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +0100123 cluster_node->level,
124 plat_state);
125
126 return rc;
127}
128
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100129static int psci_afflvl2_off(aff_map_node_t *system_node)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100130{
131 int rc = PSCI_E_SUCCESS;
132 unsigned int plat_state;
133
134 /* Cannot go beyond this level */
135 assert(system_node->level == MPIDR_AFFLVL2);
136
Achin Gupta75f73672013-12-05 16:33:10 +0000137 /* State management: Decrement the system reference count */
138 psci_set_state(system_node, PSCI_STATE_OFF);
139
Achin Gupta4f6ad662013-10-25 09:08:21 +0100140 /*
141 * Keep the physical state of the system handy to decide what
142 * action needs to be taken
143 */
Achin Gupta75f73672013-12-05 16:33:10 +0000144 plat_state = psci_get_phys_state(system_node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100145
146 /* No arch. and generic bookeeping to do here currently */
147
148 /*
Achin Gupta3140a9e2013-12-02 16:23:12 +0000149 * Plat. Management : Allow the platform to do its bookeeping
Achin Gupta4f6ad662013-10-25 09:08:21 +0100150 * at this affinity level
151 */
152 if (psci_plat_pm_ops->affinst_off)
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100153 rc = psci_plat_pm_ops->affinst_off(read_mpidr_el1(),
Achin Gupta4f6ad662013-10-25 09:08:21 +0100154 system_node->level,
155 plat_state);
156 return rc;
157}
158
Dan Handleye2712bc2014-04-10 15:37:22 +0100159static const afflvl_off_handler_t psci_afflvl_off_handlers[] = {
Achin Gupta4f6ad662013-10-25 09:08:21 +0100160 psci_afflvl0_off,
161 psci_afflvl1_off,
162 psci_afflvl2_off,
163};
164
165/*******************************************************************************
Achin Gupta0959db52013-12-02 17:33:04 +0000166 * This function takes an array of pointers to affinity instance nodes in the
167 * topology tree and calls the off handler for the corresponding affinity
168 * levels
169 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +0100170static int psci_call_off_handlers(mpidr_aff_map_nodes_t mpidr_nodes,
Achin Gupta0959db52013-12-02 17:33:04 +0000171 int start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100172 int end_afflvl)
Achin Gupta0959db52013-12-02 17:33:04 +0000173{
174 int rc = PSCI_E_INVALID_PARAMS, level;
Dan Handleye2712bc2014-04-10 15:37:22 +0100175 aff_map_node_t *node;
Achin Gupta0959db52013-12-02 17:33:04 +0000176
177 for (level = start_afflvl; level <= end_afflvl; level++) {
178 node = mpidr_nodes[level];
179 if (node == NULL)
180 continue;
181
182 /*
183 * TODO: In case of an error should there be a way
184 * of restoring what we might have torn down at
185 * lower affinity levels.
186 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100187 rc = psci_afflvl_off_handlers[level](node);
Achin Gupta0959db52013-12-02 17:33:04 +0000188 if (rc != PSCI_E_SUCCESS)
189 break;
190 }
191
192 return rc;
193}
194
195/*******************************************************************************
196 * Top level handler which is called when a cpu wants to power itself down.
197 * It's assumed that along with turning the cpu off, higher affinity levels will
198 * be turned off as far as possible. It traverses through all the affinity
199 * levels performing generic, architectural, platform setup and state management
200 * e.g. for a cluster that's to be powered off, it will call the platform
201 * specific code which will disable coherency at the interconnect level if the
202 * cpu is the last in the cluster. For a cpu it could mean programming the power
203 * the power controller etc.
204 *
205 * The state of all the relevant affinity levels is changed prior to calling the
206 * affinity level specific handlers as their actions would depend upon the state
207 * the affinity level is about to enter.
208 *
209 * The affinity level specific handlers are called in ascending order i.e. from
210 * the lowest to the highest affinity level implemented by the platform because
211 * to turn off affinity level X it is neccesary to turn off affinity level X - 1
212 * first.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100213 ******************************************************************************/
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100214int psci_afflvl_off(int start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000215 int end_afflvl)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100216{
Achin Gupta0959db52013-12-02 17:33:04 +0000217 int rc = PSCI_E_SUCCESS;
Dan Handleye2712bc2014-04-10 15:37:22 +0100218 mpidr_aff_map_nodes_t mpidr_nodes;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100219
Achin Gupta4f6ad662013-10-25 09:08:21 +0100220
221 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000222 * Collect the pointers to the nodes in the topology tree for
223 * each affinity instance in the mpidr. If this function does
224 * not return successfully then either the mpidr or the affinity
225 * levels are incorrect. In either case, we cannot return back
226 * to the caller as it would not know what to do.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100227 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100228 rc = psci_get_aff_map_nodes(read_mpidr_el1() & MPIDR_AFFINITY_MASK,
Achin Gupta0959db52013-12-02 17:33:04 +0000229 start_afflvl,
230 end_afflvl,
231 mpidr_nodes);
232 assert (rc == PSCI_E_SUCCESS);
233
Achin Gupta4f6ad662013-10-25 09:08:21 +0100234 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000235 * This function acquires the lock corresponding to each affinity
236 * level so that by the time all locks are taken, the system topology
237 * is snapshot and state management can be done safely.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100238 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100239 psci_acquire_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000240 end_afflvl,
241 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100242
Achin Gupta0959db52013-12-02 17:33:04 +0000243 /* Perform generic, architecture and platform specific handling */
244 rc = psci_call_off_handlers(mpidr_nodes,
245 start_afflvl,
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100246 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100247
248 /*
Achin Gupta0959db52013-12-02 17:33:04 +0000249 * Release the locks corresponding to each affinity level in the
250 * reverse order to which they were acquired.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100251 */
Andrew Thoelke2bc07852014-06-09 12:44:21 +0100252 psci_release_afflvl_locks(start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +0000253 end_afflvl,
254 mpidr_nodes);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100255
Achin Gupta4f6ad662013-10-25 09:08:21 +0100256 return rc;
257}