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Benjamin Faira42b61b2016-10-14 01:13:46 +00001/*
Louis Mayencourt1c819c32020-01-24 13:30:28 +00002 * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
Benjamin Faira42b61b2016-10-14 01:13:46 +00003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
Benjamin Faira42b61b2016-10-14 01:13:46 +00007#include <assert.h>
Benjamin Faira42b61b2016-10-14 01:13:46 +00008#include <stdbool.h>
9
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <arch_helpers.h>
11#include <common/debug.h>
12#include <lib/el3_runtime/cpu_data.h>
13#include <lib/psci/psci.h>
14#include <plat/common/platform.h>
15
Andrew F. Davis3afb0052019-02-11 14:37:58 -060016#include <ti_sci_protocol.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000017#include <k3_gicv3.h>
Andrew F. Davis60541b12018-05-24 11:15:42 -050018#include <ti_sci.h>
19
Andrew F. Davisf6f33c22019-02-11 16:12:31 -060020#define CORE_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL0])
21#define CLUSTER_PWR_STATE(state) ((state)->pwr_domain_state[MPIDR_AFFLVL1])
22#define SYSTEM_PWR_STATE(state) ((state)->pwr_domain_state[PLAT_MAX_PWR_LVL])
23
Benjamin Faira42b61b2016-10-14 01:13:46 +000024uintptr_t k3_sec_entrypoint;
25
26static void k3_cpu_standby(plat_local_state_t cpu_state)
27{
Louis Mayencourt1c819c32020-01-24 13:30:28 +000028 u_register_t scr;
Andrew F. Davisae40e692018-06-25 12:36:25 -050029
30 scr = read_scr_el3();
31 /* Enable the Non secure interrupt to wake the CPU */
32 write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT);
33 isb();
34 /* dsb is good practice before using wfi to enter low power states */
Benjamin Faira42b61b2016-10-14 01:13:46 +000035 dsb();
Andrew F. Davisae40e692018-06-25 12:36:25 -050036 /* Enter standby state */
Benjamin Faira42b61b2016-10-14 01:13:46 +000037 wfi();
Andrew F. Davisae40e692018-06-25 12:36:25 -050038 /* Restore SCR */
39 write_scr_el3(scr);
Benjamin Faira42b61b2016-10-14 01:13:46 +000040}
41
42static int k3_pwr_domain_on(u_register_t mpidr)
43{
Andrew F. Davisd471a6a2020-01-16 16:05:43 -060044 int core, proc_id, device_id, ret;
Andrew F. Davis60541b12018-05-24 11:15:42 -050045
Andrew F. Davisd471a6a2020-01-16 16:05:43 -060046 core = plat_core_pos_by_mpidr(mpidr);
47 if (core < 0) {
48 ERROR("Could not get target core id: %d\n", core);
Andrew F. Davis60541b12018-05-24 11:15:42 -050049 return PSCI_E_INTERN_FAIL;
50 }
51
Andrew F. Davisd471a6a2020-01-16 16:05:43 -060052 proc_id = PLAT_PROC_START_ID + core;
53 device_id = PLAT_PROC_DEVICE_START_ID + core;
Andrew F. Davis60541b12018-05-24 11:15:42 -050054
Andrew F. Davisd471a6a2020-01-16 16:05:43 -060055 ret = ti_sci_proc_request(proc_id);
Andrew F. Davis60541b12018-05-24 11:15:42 -050056 if (ret) {
57 ERROR("Request for processor failed: %d\n", ret);
58 return PSCI_E_INTERN_FAIL;
59 }
60
Andrew F. Davisd471a6a2020-01-16 16:05:43 -060061 ret = ti_sci_proc_set_boot_cfg(proc_id, k3_sec_entrypoint, 0, 0);
Andrew F. Davis60541b12018-05-24 11:15:42 -050062 if (ret) {
63 ERROR("Request to set core boot address failed: %d\n", ret);
64 return PSCI_E_INTERN_FAIL;
65 }
66
Andrew F. Davisf6f33c22019-02-11 16:12:31 -060067 /* sanity check these are off before starting a core */
68 ret = ti_sci_proc_set_boot_ctrl(proc_id,
69 0, PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ |
70 PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS |
71 PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM);
72 if (ret) {
73 ERROR("Request to clear boot configuration failed: %d\n", ret);
74 return PSCI_E_INTERN_FAIL;
75 }
76
Andrew F. Davisd471a6a2020-01-16 16:05:43 -060077 ret = ti_sci_device_get(device_id);
Andrew F. Davis60541b12018-05-24 11:15:42 -050078 if (ret) {
79 ERROR("Request to start core failed: %d\n", ret);
80 return PSCI_E_INTERN_FAIL;
81 }
Benjamin Faira42b61b2016-10-14 01:13:46 +000082
Benjamin Faira42b61b2016-10-14 01:13:46 +000083 return PSCI_E_SUCCESS;
84}
85
86void k3_pwr_domain_off(const psci_power_state_t *target_state)
87{
Andrew F. Davisf6f33c22019-02-11 16:12:31 -060088 int core, cluster, proc_id, device_id, cluster_id, ret;
89
90 /* At very least the local core should be powering down */
91 assert(CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE);
Andrew F. Davis7804b272018-08-09 10:01:53 -050092
Benjamin Faira42b61b2016-10-14 01:13:46 +000093 /* Prevent interrupts from spuriously waking up this cpu */
94 k3_gic_cpuif_disable();
95
Andrew F. Davisd471a6a2020-01-16 16:05:43 -060096 core = plat_my_core_pos();
Andrew F. Davisf6f33c22019-02-11 16:12:31 -060097 cluster = MPIDR_AFFLVL1_VAL(read_mpidr_el1());
Andrew F. Davisd471a6a2020-01-16 16:05:43 -060098 proc_id = PLAT_PROC_START_ID + core;
99 device_id = PLAT_PROC_DEVICE_START_ID + core;
Andrew F. Davisf6f33c22019-02-11 16:12:31 -0600100 cluster_id = PLAT_CLUSTER_DEVICE_START_ID + (cluster * 2);
101
102 /*
103 * If we are the last core in the cluster then we take a reference to
104 * the cluster device so that it does not get shutdown before we
105 * execute the entire cluster L2 cleaning sequence below.
106 */
107 if (CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) {
108 ret = ti_sci_device_get(cluster_id);
109 if (ret) {
110 ERROR("Request to get cluster failed: %d\n", ret);
111 return;
112 }
113 }
Andrew F. Davis7804b272018-08-09 10:01:53 -0500114
Andrew F. Davis3afb0052019-02-11 14:37:58 -0600115 /* Start by sending wait for WFI command */
Andrew F. Davisd471a6a2020-01-16 16:05:43 -0600116 ret = ti_sci_proc_wait_boot_status_no_wait(proc_id,
Andrew F. Davis3afb0052019-02-11 14:37:58 -0600117 /*
118 * Wait maximum time to give us the best chance to get
119 * to WFI before this command timeouts
120 */
121 UINT8_MAX, 100, UINT8_MAX, UINT8_MAX,
122 /* Wait for WFI */
123 PROC_BOOT_STATUS_FLAG_ARMV8_WFI, 0, 0, 0);
124 if (ret) {
125 ERROR("Sending wait for WFI failed (%d)\n", ret);
126 return;
127 }
128
129 /* Now queue up the core shutdown request */
Andrew F. Davisd471a6a2020-01-16 16:05:43 -0600130 ret = ti_sci_device_put_no_wait(device_id);
Andrew F. Davis7804b272018-08-09 10:01:53 -0500131 if (ret) {
Andrew F. Davis3afb0052019-02-11 14:37:58 -0600132 ERROR("Sending core shutdown message failed (%d)\n", ret);
Andrew F. Davis7804b272018-08-09 10:01:53 -0500133 return;
134 }
Andrew F. Davisf6f33c22019-02-11 16:12:31 -0600135
136 /* If our cluster is not going down we stop here */
137 if (CLUSTER_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE)
138 return;
139
140 /* set AINACTS */
141 ret = ti_sci_proc_set_boot_ctrl_no_wait(proc_id,
142 PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS, 0);
143 if (ret) {
144 ERROR("Sending set control message failed (%d)\n", ret);
145 return;
146 }
147
148 /* set L2FLUSHREQ */
149 ret = ti_sci_proc_set_boot_ctrl_no_wait(proc_id,
150 PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ, 0);
151 if (ret) {
152 ERROR("Sending set control message failed (%d)\n", ret);
153 return;
154 }
155
156 /* wait for L2FLUSHDONE*/
157 ret = ti_sci_proc_wait_boot_status_no_wait(proc_id,
158 UINT8_MAX, 2, UINT8_MAX, UINT8_MAX,
159 PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE, 0, 0, 0);
160 if (ret) {
161 ERROR("Sending wait message failed (%d)\n", ret);
162 return;
163 }
164
165 /* clear L2FLUSHREQ */
166 ret = ti_sci_proc_set_boot_ctrl_no_wait(proc_id,
167 0, PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ);
168 if (ret) {
169 ERROR("Sending set control message failed (%d)\n", ret);
170 return;
171 }
172
173 /* set ACINACTM */
174 ret = ti_sci_proc_set_boot_ctrl_no_wait(proc_id,
175 PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM, 0);
176 if (ret) {
177 ERROR("Sending set control message failed (%d)\n", ret);
178 return;
179 }
180
181 /* wait for STANDBYWFIL2 */
182 ret = ti_sci_proc_wait_boot_status_no_wait(proc_id,
183 UINT8_MAX, 2, UINT8_MAX, UINT8_MAX,
184 PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2, 0, 0, 0);
185 if (ret) {
186 ERROR("Sending wait message failed (%d)\n", ret);
187 return;
188 }
189
190 /* Now queue up the cluster shutdown request */
191 ret = ti_sci_device_put_no_wait(cluster_id);
192 if (ret) {
193 ERROR("Sending cluster shutdown message failed (%d)\n", ret);
194 return;
195 }
Benjamin Faira42b61b2016-10-14 01:13:46 +0000196}
197
198void k3_pwr_domain_on_finish(const psci_power_state_t *target_state)
199{
200 /* TODO: Indicate to System firmware about completion */
201
202 k3_gic_pcpu_init();
203 k3_gic_cpuif_enable();
204}
Andrew F. Davis7c461d72018-10-12 15:37:04 -0500205
Jan Kiszka36c8a2c2020-05-17 10:21:09 +0200206static void __dead2 k3_system_off(void)
207{
208 ERROR("System Off: operation not handled.\n");
209 while (true)
210 wfi();
211}
212
Benjamin Faira42b61b2016-10-14 01:13:46 +0000213static void __dead2 k3_system_reset(void)
214{
Andrew F. Davis6a60d022018-05-24 11:15:42 -0500215 /* Send the system reset request to system firmware */
216 ti_sci_core_reboot();
Benjamin Faira42b61b2016-10-14 01:13:46 +0000217
218 while (true)
219 wfi();
220}
221
222static int k3_validate_power_state(unsigned int power_state,
223 psci_power_state_t *req_state)
224{
225 /* TODO: perform the proper validation */
226
227 return PSCI_E_SUCCESS;
228}
229
230static int k3_validate_ns_entrypoint(uintptr_t entrypoint)
231{
232 /* TODO: perform the proper validation */
233
234 return PSCI_E_SUCCESS;
235}
236
Dave Gerlachad525012021-11-30 15:45:34 -0600237#if K3_PM_SYSTEM_SUSPEND
238static void k3_pwr_domain_suspend(const psci_power_state_t *target_state)
239{
240 unsigned int core, proc_id;
241
242 core = plat_my_core_pos();
243 proc_id = PLAT_PROC_START_ID + core;
244
245 /* Prevent interrupts from spuriously waking up this cpu */
246 k3_gic_cpuif_disable();
247 k3_gic_save_context();
248
249 k3_pwr_domain_off(target_state);
250
251 ti_sci_enter_sleep(proc_id, 0, k3_sec_entrypoint);
252}
253
254static void k3_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
255{
256 k3_gic_restore_context();
257 k3_gic_cpuif_enable();
258}
259
260static void k3_get_sys_suspend_power_state(psci_power_state_t *req_state)
261{
262 unsigned int i;
263
264 /* CPU & cluster off, system in retention */
265 for (i = MPIDR_AFFLVL0; i <= PLAT_MAX_PWR_LVL; i++) {
266 req_state->pwr_domain_state[i] = PLAT_MAX_OFF_STATE;
267 }
268}
269#endif
270
Benjamin Faira42b61b2016-10-14 01:13:46 +0000271static const plat_psci_ops_t k3_plat_psci_ops = {
272 .cpu_standby = k3_cpu_standby,
273 .pwr_domain_on = k3_pwr_domain_on,
274 .pwr_domain_off = k3_pwr_domain_off,
275 .pwr_domain_on_finish = k3_pwr_domain_on_finish,
Dave Gerlachad525012021-11-30 15:45:34 -0600276#if K3_PM_SYSTEM_SUSPEND
277 .pwr_domain_suspend = k3_pwr_domain_suspend,
278 .pwr_domain_suspend_finish = k3_pwr_domain_suspend_finish,
279 .get_sys_suspend_power_state = k3_get_sys_suspend_power_state,
280#endif
Jan Kiszka36c8a2c2020-05-17 10:21:09 +0200281 .system_off = k3_system_off,
Benjamin Faira42b61b2016-10-14 01:13:46 +0000282 .system_reset = k3_system_reset,
283 .validate_power_state = k3_validate_power_state,
284 .validate_ns_entrypoint = k3_validate_ns_entrypoint
285};
286
287int plat_setup_psci_ops(uintptr_t sec_entrypoint,
288 const plat_psci_ops_t **psci_ops)
289{
290 k3_sec_entrypoint = sec_entrypoint;
291
292 *psci_ops = &k3_plat_psci_ops;
293
294 return 0;
295}