ti: k3: common: Do not disable cache on TI K3 core powerdown
Leave the caches on and explicitly flush any data that
may be stale when the core is powered down. This prevents
non-coherent interconnect access which has negative side-
effects on AM65x.
Signed-off-by: Andrew F. Davis <afd@ti.com>
diff --git a/plat/ti/k3/common/k3_psci.c b/plat/ti/k3/common/k3_psci.c
index e75ebac..787cc82 100644
--- a/plat/ti/k3/common/k3_psci.c
+++ b/plat/ti/k3/common/k3_psci.c
@@ -6,9 +6,12 @@
#include <arch_helpers.h>
#include <assert.h>
+#include <cpu_data.h>
#include <debug.h>
#include <k3_gicv3.h>
#include <psci.h>
+/* Need to flush psci internal locks before shutdown or their values are lost */
+#include <../../lib/psci/psci_private.h>
#include <platform.h>
#include <stdbool.h>
@@ -99,6 +102,14 @@
k3_gic_cpuif_enable();
}
+static void __dead2 k3_pwr_domain_pwr_down_wfi(const psci_power_state_t
+ *target_state)
+{
+ flush_cpu_data(psci_svc_cpu_data);
+ flush_dcache_range((uintptr_t) psci_locks, sizeof(psci_locks));
+ psci_power_down_wfi();
+}
+
static void __dead2 k3_system_reset(void)
{
/* Send the system reset request to system firmware */
@@ -128,6 +139,7 @@
.pwr_domain_on = k3_pwr_domain_on,
.pwr_domain_off = k3_pwr_domain_off,
.pwr_domain_on_finish = k3_pwr_domain_on_finish,
+ .pwr_domain_pwr_down_wfi = k3_pwr_domain_pwr_down_wfi,
.system_reset = k3_system_reset,
.validate_power_state = k3_validate_power_state,
.validate_ns_entrypoint = k3_validate_ns_entrypoint