Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 1 | # |
Dimitris Papastamos | 7ca21db | 2018-03-26 16:46:01 +0100 | [diff] [blame] | 2 | # Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 3 | # |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | # SPDX-License-Identifier: BSD-3-Clause |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 5 | # |
| 6 | |
Soby Mathew | 937488b | 2014-09-22 14:13:34 +0100 | [diff] [blame] | 7 | # Cortex A57 specific optimisation to skip L1 cache flush when |
| 8 | # cluster is powered down. |
| 9 | SKIP_A57_L1_FLUSH_PWR_DWN ?=0 |
| 10 | |
Sandrine Bailleux | d481759 | 2016-01-13 14:57:38 +0000 | [diff] [blame] | 11 | # Flag to disable the cache non-temporal hint. |
| 12 | # It is enabled by default. |
| 13 | A53_DISABLE_NON_TEMPORAL_HINT ?=1 |
| 14 | |
| 15 | # Flag to disable the cache non-temporal hint. |
| 16 | # It is enabled by default. |
| 17 | A57_DISABLE_NON_TEMPORAL_HINT ?=1 |
| 18 | |
Dimitris Papastamos | 446f7f1 | 2017-11-30 14:53:53 +0000 | [diff] [blame] | 19 | WORKAROUND_CVE_2017_5715 ?=1 |
Dimitris Papastamos | e6625ec | 2018-04-05 14:38:26 +0100 | [diff] [blame] | 20 | WORKAROUND_CVE_2018_3639 ?=1 |
Dimitris Papastamos | ba51d9e | 2018-05-16 11:36:14 +0100 | [diff] [blame] | 21 | DYNAMIC_WORKAROUND_CVE_2018_3639 ?=0 |
Dimitris Papastamos | 446f7f1 | 2017-11-30 14:53:53 +0000 | [diff] [blame] | 22 | |
Soby Mathew | 937488b | 2014-09-22 14:13:34 +0100 | [diff] [blame] | 23 | # Process SKIP_A57_L1_FLUSH_PWR_DWN flag |
| 24 | $(eval $(call assert_boolean,SKIP_A57_L1_FLUSH_PWR_DWN)) |
| 25 | $(eval $(call add_define,SKIP_A57_L1_FLUSH_PWR_DWN)) |
| 26 | |
Sandrine Bailleux | d481759 | 2016-01-13 14:57:38 +0000 | [diff] [blame] | 27 | # Process A53_DISABLE_NON_TEMPORAL_HINT flag |
| 28 | $(eval $(call assert_boolean,A53_DISABLE_NON_TEMPORAL_HINT)) |
| 29 | $(eval $(call add_define,A53_DISABLE_NON_TEMPORAL_HINT)) |
| 30 | |
| 31 | # Process A57_DISABLE_NON_TEMPORAL_HINT flag |
| 32 | $(eval $(call assert_boolean,A57_DISABLE_NON_TEMPORAL_HINT)) |
| 33 | $(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT)) |
| 34 | |
Dimitris Papastamos | 446f7f1 | 2017-11-30 14:53:53 +0000 | [diff] [blame] | 35 | # Process WORKAROUND_CVE_2017_5715 flag |
| 36 | $(eval $(call assert_boolean,WORKAROUND_CVE_2017_5715)) |
| 37 | $(eval $(call add_define,WORKAROUND_CVE_2017_5715)) |
Soby Mathew | 937488b | 2014-09-22 14:13:34 +0100 | [diff] [blame] | 38 | |
Dimitris Papastamos | e6625ec | 2018-04-05 14:38:26 +0100 | [diff] [blame] | 39 | # Process WORKAROUND_CVE_2018_3639 flag |
| 40 | $(eval $(call assert_boolean,WORKAROUND_CVE_2018_3639)) |
| 41 | $(eval $(call add_define,WORKAROUND_CVE_2018_3639)) |
| 42 | |
Dimitris Papastamos | ba51d9e | 2018-05-16 11:36:14 +0100 | [diff] [blame] | 43 | $(eval $(call assert_boolean,DYNAMIC_WORKAROUND_CVE_2018_3639)) |
| 44 | $(eval $(call add_define,DYNAMIC_WORKAROUND_CVE_2018_3639)) |
| 45 | |
| 46 | ifneq (${DYNAMIC_WORKAROUND_CVE_2018_3639},0) |
| 47 | ifeq (${WORKAROUND_CVE_2018_3639},0) |
| 48 | $(error "Error: WORKAROUND_CVE_2018_3639 must be 1 if DYNAMIC_WORKAROUND_CVE_2018_3639 is 1") |
| 49 | endif |
| 50 | endif |
| 51 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 52 | # CPU Errata Build flags. |
| 53 | # These should be enabled by the platform if the erratum workaround needs to be |
| 54 | # applied. |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 55 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 56 | # Flag to apply erratum 826319 workaround during reset. This erratum applies |
| 57 | # only to revision <= r0p2 of the Cortex A53 cpu. |
developer | 4fceaca | 2015-07-29 20:55:31 +0800 | [diff] [blame] | 58 | ERRATA_A53_826319 ?=0 |
| 59 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 60 | # Flag to apply erratum 835769 workaround at compile and link time. This |
| 61 | # erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this |
| 62 | # workaround can lead the linker to create "*.stub" sections. |
| 63 | ERRATA_A53_835769 ?=0 |
| 64 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 65 | # Flag to apply erratum 836870 workaround during reset. This erratum applies |
| 66 | # only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this |
Douglas Raillard | c847f66 | 2017-02-15 17:38:43 +0000 | [diff] [blame] | 67 | # erratum workaround is enabled by default in hardware. |
developer | 4fceaca | 2015-07-29 20:55:31 +0800 | [diff] [blame] | 68 | ERRATA_A53_836870 ?=0 |
| 69 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 70 | # Flag to apply erratum 843419 workaround at link time. |
| 71 | # This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this |
| 72 | # workaround could lead the linker to emit "*.stub" sections which are 4kB |
| 73 | # aligned. |
| 74 | ERRATA_A53_843419 ?=0 |
| 75 | |
Andre Przywara | 00eefd9 | 2016-10-06 16:54:53 +0100 | [diff] [blame] | 76 | # Flag to apply errata 855873 during reset. This errata applies to all |
| 77 | # revisions of the Cortex A53 CPU, but this firmware workaround only works |
| 78 | # for revisions r0p3 and higher. Earlier revisions are taken care |
| 79 | # of by the rich OS. |
| 80 | ERRATA_A53_855873 ?=0 |
| 81 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 82 | # Flag to apply erratum 806969 workaround during reset. This erratum applies |
| 83 | # only to revision r0p0 of the Cortex A57 cpu. |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 84 | ERRATA_A57_806969 ?=0 |
| 85 | |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 86 | # Flag to apply erratum 813419 workaround during reset. This erratum applies |
| 87 | # only to revision r0p0 of the Cortex A57 cpu. |
| 88 | ERRATA_A57_813419 ?=0 |
| 89 | |
Sandrine Bailleux | afa8a78 | 2016-04-14 12:59:42 +0100 | [diff] [blame] | 90 | # Flag to apply erratum 813420 workaround during reset. This erratum applies |
| 91 | # only to revision r0p0 of the Cortex A57 cpu. |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 92 | ERRATA_A57_813420 ?=0 |
| 93 | |
Sandrine Bailleux | a7e0c53 | 2016-04-14 13:32:31 +0100 | [diff] [blame] | 94 | # Flag to apply erratum 826974 workaround during reset. This erratum applies |
| 95 | # only to revision <= r1p1 of the Cortex A57 cpu. |
| 96 | ERRATA_A57_826974 ?=0 |
| 97 | |
Sandrine Bailleux | adcbd55 | 2016-04-14 14:24:13 +0100 | [diff] [blame] | 98 | # Flag to apply erratum 826977 workaround during reset. This erratum applies |
| 99 | # only to revision <= r1p1 of the Cortex A57 cpu. |
| 100 | ERRATA_A57_826977 ?=0 |
| 101 | |
Sandrine Bailleux | c11116f | 2016-04-14 14:04:48 +0100 | [diff] [blame] | 102 | # Flag to apply erratum 828024 workaround during reset. This erratum applies |
| 103 | # only to revision <= r1p1 of the Cortex A57 cpu. |
| 104 | ERRATA_A57_828024 ?=0 |
| 105 | |
Sandrine Bailleux | 48cbe85 | 2016-04-14 14:18:07 +0100 | [diff] [blame] | 106 | # Flag to apply erratum 829520 workaround during reset. This erratum applies |
| 107 | # only to revision <= r1p2 of the Cortex A57 cpu. |
| 108 | ERRATA_A57_829520 ?=0 |
| 109 | |
Sandrine Bailleux | 143ef1a | 2016-04-21 11:10:52 +0100 | [diff] [blame] | 110 | # Flag to apply erratum 833471 workaround during reset. This erratum applies |
| 111 | # only to revision <= r1p2 of the Cortex A57 cpu. |
| 112 | ERRATA_A57_833471 ?=0 |
| 113 | |
Eleanor Bonnici | 0c9bd27 | 2017-08-02 16:35:04 +0100 | [diff] [blame] | 114 | # Flag to apply erratum 855972 workaround during reset. This erratum applies |
| 115 | # only to revision <= r1p3 of the Cortex A57 cpu. |
| 116 | ERRATA_A57_859972 ?=0 |
| 117 | |
Eleanor Bonnici | c3b4ca1 | 2017-08-02 18:33:41 +0100 | [diff] [blame] | 118 | # Flag to apply erratum 855971 workaround during reset. This erratum applies |
| 119 | # only to revision <= r0p3 of the Cortex A72 cpu. |
| 120 | ERRATA_A72_859971 ?=0 |
| 121 | |
Dimitris Papastamos | 7ca21db | 2018-03-26 16:46:01 +0100 | [diff] [blame] | 122 | # Flag to apply T32 CLREX workaround during reset. This erratum applies |
| 123 | # only to r0p0 and r1p0 of the Ares cpu. |
| 124 | ERRATA_ARES_1043202 ?=1 |
| 125 | |
John Tsichritzis | 4daa1de | 2018-07-23 09:11:59 +0100 | [diff] [blame] | 126 | # Flag to apply DSU erratum 936184. This erratum applies to DSUs containing |
| 127 | # the ACP interface and revision < r2p0. Applying the workaround results in |
| 128 | # higher DSU power consumption on idle. |
| 129 | ERRATA_DSU_936184 ?=0 |
| 130 | |
developer | 4fceaca | 2015-07-29 20:55:31 +0800 | [diff] [blame] | 131 | # Process ERRATA_A53_826319 flag |
| 132 | $(eval $(call assert_boolean,ERRATA_A53_826319)) |
| 133 | $(eval $(call add_define,ERRATA_A53_826319)) |
| 134 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 135 | # Process ERRATA_A53_835769 flag |
| 136 | $(eval $(call assert_boolean,ERRATA_A53_835769)) |
| 137 | $(eval $(call add_define,ERRATA_A53_835769)) |
| 138 | |
developer | 4fceaca | 2015-07-29 20:55:31 +0800 | [diff] [blame] | 139 | # Process ERRATA_A53_836870 flag |
| 140 | $(eval $(call assert_boolean,ERRATA_A53_836870)) |
| 141 | $(eval $(call add_define,ERRATA_A53_836870)) |
| 142 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 143 | # Process ERRATA_A53_843419 flag |
| 144 | $(eval $(call assert_boolean,ERRATA_A53_843419)) |
| 145 | $(eval $(call add_define,ERRATA_A53_843419)) |
| 146 | |
Andre Przywara | 00eefd9 | 2016-10-06 16:54:53 +0100 | [diff] [blame] | 147 | # Process ERRATA_A53_855873 flag |
| 148 | $(eval $(call assert_boolean,ERRATA_A53_855873)) |
| 149 | $(eval $(call add_define,ERRATA_A53_855873)) |
| 150 | |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 151 | # Process ERRATA_A57_806969 flag |
| 152 | $(eval $(call assert_boolean,ERRATA_A57_806969)) |
| 153 | $(eval $(call add_define,ERRATA_A57_806969)) |
| 154 | |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 155 | # Process ERRATA_A57_813419 flag |
| 156 | $(eval $(call assert_boolean,ERRATA_A57_813419)) |
| 157 | $(eval $(call add_define,ERRATA_A57_813419)) |
| 158 | |
Soby Mathew | 802f865 | 2014-08-14 16:19:29 +0100 | [diff] [blame] | 159 | # Process ERRATA_A57_813420 flag |
| 160 | $(eval $(call assert_boolean,ERRATA_A57_813420)) |
| 161 | $(eval $(call add_define,ERRATA_A57_813420)) |
Sandrine Bailleux | a7e0c53 | 2016-04-14 13:32:31 +0100 | [diff] [blame] | 162 | |
| 163 | # Process ERRATA_A57_826974 flag |
| 164 | $(eval $(call assert_boolean,ERRATA_A57_826974)) |
| 165 | $(eval $(call add_define,ERRATA_A57_826974)) |
Sandrine Bailleux | c11116f | 2016-04-14 14:04:48 +0100 | [diff] [blame] | 166 | |
Sandrine Bailleux | adcbd55 | 2016-04-14 14:24:13 +0100 | [diff] [blame] | 167 | # Process ERRATA_A57_826977 flag |
| 168 | $(eval $(call assert_boolean,ERRATA_A57_826977)) |
| 169 | $(eval $(call add_define,ERRATA_A57_826977)) |
| 170 | |
Sandrine Bailleux | c11116f | 2016-04-14 14:04:48 +0100 | [diff] [blame] | 171 | # Process ERRATA_A57_828024 flag |
| 172 | $(eval $(call assert_boolean,ERRATA_A57_828024)) |
| 173 | $(eval $(call add_define,ERRATA_A57_828024)) |
Sandrine Bailleux | 48cbe85 | 2016-04-14 14:18:07 +0100 | [diff] [blame] | 174 | |
| 175 | # Process ERRATA_A57_829520 flag |
| 176 | $(eval $(call assert_boolean,ERRATA_A57_829520)) |
| 177 | $(eval $(call add_define,ERRATA_A57_829520)) |
Sandrine Bailleux | 143ef1a | 2016-04-21 11:10:52 +0100 | [diff] [blame] | 178 | |
| 179 | # Process ERRATA_A57_833471 flag |
| 180 | $(eval $(call assert_boolean,ERRATA_A57_833471)) |
| 181 | $(eval $(call add_define,ERRATA_A57_833471)) |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 182 | |
Eleanor Bonnici | 0c9bd27 | 2017-08-02 16:35:04 +0100 | [diff] [blame] | 183 | # Process ERRATA_A57_859972 flag |
| 184 | $(eval $(call assert_boolean,ERRATA_A57_859972)) |
| 185 | $(eval $(call add_define,ERRATA_A57_859972)) |
| 186 | |
Eleanor Bonnici | c3b4ca1 | 2017-08-02 18:33:41 +0100 | [diff] [blame] | 187 | # Process ERRATA_A72_859971 flag |
| 188 | $(eval $(call assert_boolean,ERRATA_A72_859971)) |
| 189 | $(eval $(call add_define,ERRATA_A72_859971)) |
| 190 | |
Dimitris Papastamos | 7ca21db | 2018-03-26 16:46:01 +0100 | [diff] [blame] | 191 | # Process ERRATA_ARES_1043202 flag |
| 192 | $(eval $(call assert_boolean,ERRATA_ARES_1043202)) |
| 193 | $(eval $(call add_define,ERRATA_ARES_1043202)) |
| 194 | |
John Tsichritzis | 4daa1de | 2018-07-23 09:11:59 +0100 | [diff] [blame] | 195 | # Process ERRATA_DSU_936184 flag |
| 196 | $(eval $(call assert_boolean,ERRATA_DSU_936184)) |
| 197 | $(eval $(call add_define,ERRATA_DSU_936184)) |
| 198 | |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 199 | # Errata build flags |
| 200 | ifneq (${ERRATA_A53_843419},0) |
Douglas Raillard | d0c8273 | 2017-06-22 14:44:48 +0100 | [diff] [blame] | 201 | TF_LDFLAGS_aarch64 += --fix-cortex-a53-843419 |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 202 | endif |
| 203 | |
| 204 | ifneq (${ERRATA_A53_835769},0) |
| 205 | TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769 |
Douglas Raillard | d0c8273 | 2017-06-22 14:44:48 +0100 | [diff] [blame] | 206 | TF_LDFLAGS_aarch64 += --fix-cortex-a53-835769 |
Douglas Raillard | d56fb04 | 2017-06-19 15:38:02 +0100 | [diff] [blame] | 207 | endif |