Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 1 | # |
Chris Kay | e927215 | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 2 | # Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved. |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
Chris Kay | e927215 | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 7 | include common/fdt_wrappers.mk |
| 8 | |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 9 | # platform configs |
Varun Wadekar | 19ecdb9 | 2017-12-01 09:24:12 -0800 | [diff] [blame] | 10 | ENABLE_CONSOLE_SPE := 1 |
Varun Wadekar | 9d15f7e | 2019-08-21 14:01:31 -0700 | [diff] [blame] | 11 | $(eval $(call add_define,ENABLE_CONSOLE_SPE)) |
| 12 | |
Varun Wadekar | 602cf7e | 2018-04-03 13:10:48 -0700 | [diff] [blame] | 13 | ENABLE_STRICT_CHECKING_MODE := 1 |
Steven Kao | 8f4f102 | 2017-12-13 06:39:15 +0800 | [diff] [blame] | 14 | $(eval $(call add_define,ENABLE_STRICT_CHECKING_MODE)) |
| 15 | |
Varun Wadekar | 602cf7e | 2018-04-03 13:10:48 -0700 | [diff] [blame] | 16 | USE_GPC_DMA := 1 |
| 17 | $(eval $(call add_define,USE_GPC_DMA)) |
| 18 | |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 19 | RESET_TO_BL31 := 1 |
| 20 | |
| 21 | PROGRAMMABLE_RESET_ADDRESS := 1 |
| 22 | |
| 23 | COLD_BOOT_SINGLE_CPU := 1 |
| 24 | |
| 25 | # platform settings |
| 26 | TZDRAM_BASE := 0x40000000 |
| 27 | $(eval $(call add_define,TZDRAM_BASE)) |
| 28 | |
Ajay Gupta | 8162109 | 2017-08-01 15:53:04 -0700 | [diff] [blame] | 29 | MAX_XLAT_TABLES := 25 |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 30 | $(eval $(call add_define,MAX_XLAT_TABLES)) |
| 31 | |
Steven Kao | 58d1194 | 2017-09-29 16:32:34 +0800 | [diff] [blame] | 32 | MAX_MMAP_REGIONS := 30 |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 33 | $(eval $(call add_define,MAX_MMAP_REGIONS)) |
| 34 | |
David Pu | 70f6597 | 2019-03-18 15:14:49 -0700 | [diff] [blame] | 35 | # enable RAS handling |
Manish Pandey | 0e3379d | 2022-10-10 11:43:08 +0100 | [diff] [blame] | 36 | HANDLE_EA_EL3_FIRST_NS := 1 |
Manish Pandey | d419e22 | 2023-02-13 12:39:17 +0000 | [diff] [blame] | 37 | ENABLE_FEAT_RAS := 1 |
| 38 | RAS_FFH_SUPPORT := 1 |
David Pu | 70f6597 | 2019-03-18 15:14:49 -0700 | [diff] [blame] | 39 | |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 40 | # platform files |
Varun Wadekar | 26dfb51 | 2019-01-17 16:36:23 -0800 | [diff] [blame] | 41 | PLAT_INCLUDES += -Iplat/nvidia/tegra/include/t194 \ |
| 42 | -I${SOC_DIR}/drivers/include |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 43 | |
Varun Wadekar | 8b1068b | 2020-02-26 14:52:01 -0800 | [diff] [blame] | 44 | BL31_SOURCES += ${TEGRA_GICv2_SOURCES} \ |
| 45 | drivers/ti/uart/aarch64/16550_console.S \ |
Varun Wadekar | 498d501 | 2017-11-15 15:52:01 -0800 | [diff] [blame] | 46 | lib/cpus/aarch64/denver.S \ |
Varun Wadekar | 0c9105e | 2019-06-13 15:32:11 -0700 | [diff] [blame] | 47 | ${TEGRA_DRIVERS}/bpmp_ipc/intf.c \ |
| 48 | ${TEGRA_DRIVERS}/bpmp_ipc/ivc.c \ |
| 49 | ${TEGRA_DRIVERS}/memctrl/memctrl_v2.c \ |
| 50 | ${TEGRA_DRIVERS}/smmu/smmu.c \ |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 51 | ${SOC_DIR}/drivers/mce/mce.c \ |
Steven Kao | 2cdb678 | 2017-01-05 17:04:40 +0800 | [diff] [blame] | 52 | ${SOC_DIR}/drivers/mce/nvg.c \ |
| 53 | ${SOC_DIR}/drivers/mce/aarch64/nvg_helpers.S \ |
Steven Kao | 530b217 | 2017-06-23 16:18:58 +0800 | [diff] [blame] | 54 | ${SOC_DIR}/drivers/se/se.c \ |
Varun Wadekar | 0075990 | 2017-05-31 11:41:00 -0700 | [diff] [blame] | 55 | ${SOC_DIR}/plat_memctrl.c \ |
Varun Wadekar | ecd6a5a | 2018-04-09 17:48:58 -0700 | [diff] [blame] | 56 | ${SOC_DIR}/plat_psci_handlers.c \ |
| 57 | ${SOC_DIR}/plat_setup.c \ |
| 58 | ${SOC_DIR}/plat_secondary.c \ |
Varun Wadekar | 0075990 | 2017-05-31 11:41:00 -0700 | [diff] [blame] | 59 | ${SOC_DIR}/plat_sip_calls.c \ |
Varun Wadekar | 362a6b2 | 2017-11-10 11:04:42 -0800 | [diff] [blame] | 60 | ${SOC_DIR}/plat_smmu.c \ |
| 61 | ${SOC_DIR}/plat_trampoline.S |
Varun Wadekar | 9d15f7e | 2019-08-21 14:01:31 -0700 | [diff] [blame] | 62 | |
Varun Wadekar | 0c9105e | 2019-06-13 15:32:11 -0700 | [diff] [blame] | 63 | ifeq (${USE_GPC_DMA}, 1) |
| 64 | BL31_SOURCES += ${TEGRA_DRIVERS}/gpcdma/gpcdma.c |
| 65 | endif |
| 66 | |
Varun Wadekar | 9d15f7e | 2019-08-21 14:01:31 -0700 | [diff] [blame] | 67 | ifeq (${ENABLE_CONSOLE_SPE},1) |
Varun Wadekar | 0c9105e | 2019-06-13 15:32:11 -0700 | [diff] [blame] | 68 | BL31_SOURCES += ${TEGRA_DRIVERS}/spe/shared_console.S |
Varun Wadekar | 9d15f7e | 2019-08-21 14:01:31 -0700 | [diff] [blame] | 69 | endif |
David Pu | 70f6597 | 2019-03-18 15:14:49 -0700 | [diff] [blame] | 70 | |
| 71 | # RAS sources |
Manish Pandey | d419e22 | 2023-02-13 12:39:17 +0000 | [diff] [blame] | 72 | ifeq (${RAS_FFH_SUPPORT},1) |
David Pu | 70f6597 | 2019-03-18 15:14:49 -0700 | [diff] [blame] | 73 | BL31_SOURCES += lib/extensions/ras/std_err_record.c \ |
| 74 | lib/extensions/ras/ras_common.c \ |
| 75 | ${SOC_DIR}/plat_ras.c |
| 76 | endif |
Varun Wadekar | 28d3102 | 2020-07-19 21:30:54 -0700 | [diff] [blame] | 77 | |
| 78 | # SPM dispatcher |
| 79 | ifeq (${SPD},spmd) |
Varun Wadekar | 28d3102 | 2020-07-19 21:30:54 -0700 | [diff] [blame] | 80 | include lib/libfdt/libfdt.mk |
| 81 | # sources to support spmd |
| 82 | BL31_SOURCES += plat/common/plat_spmd_manifest.c \ |
Varun Wadekar | 28d3102 | 2020-07-19 21:30:54 -0700 | [diff] [blame] | 83 | ${LIBFDT_SRCS} |
Chris Kay | e927215 | 2021-09-28 15:52:14 +0100 | [diff] [blame] | 84 | |
| 85 | BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} |
Varun Wadekar | 28d3102 | 2020-07-19 21:30:54 -0700 | [diff] [blame] | 86 | endif |