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Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001#
Andre Przywara93de78c2019-07-09 14:29:24 +01002# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Antonio Nino Diazf96582a2018-10-19 00:57:16 +01007include lib/libfdt/libfdt.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
Andre Przywara4ea3bd32019-07-09 14:32:11 +010010PLAT_INCLUDES := -Iplat/rpi/common/include \
11 -Iplat/rpi/rpi3/include
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000012
Julius Werner6b88b652018-11-27 17:50:28 -080013PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \
Andre Przywara9ba6bb02020-03-10 12:34:56 +000014 drivers/arm/pl011/aarch64/pl011_console.S \
Andre Przywara9e4815a2020-03-11 16:33:53 +000015 drivers/gpio/gpio.c \
16 drivers/delay_timer/delay_timer.c \
17 drivers/rpi3/gpio/rpi3_gpio.c \
Andre Przywara98e48562020-03-12 14:20:04 +000018 plat/rpi/common/aarch64/plat_helpers.S \
Andre Przywara4ea3bd32019-07-09 14:32:11 +010019 plat/rpi/common/rpi3_common.c \
Antonio Nino Diazf96582a2018-10-19 00:57:16 +010020 ${XLAT_TABLES_LIB_SRCS}
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000021
22BL1_SOURCES += drivers/io/io_fip.c \
23 drivers/io/io_memmap.c \
24 drivers/io/io_storage.c \
25 lib/cpus/aarch64/cortex_a53.S \
26 plat/common/aarch64/platform_mp_stack.S \
Andre Przywarab2262462019-07-09 11:18:59 +010027 plat/rpi/rpi3/rpi3_bl1_setup.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +010028 plat/rpi/common/rpi3_io_storage.c \
Andre Przywara05862fc2019-07-09 13:54:56 +010029 drivers/rpi3/mailbox/rpi3_mbox.c \
30 plat/rpi/rpi3/rpi_mbox_board.c
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000031
32BL2_SOURCES += common/desc_image_load.c \
33 drivers/io/io_fip.c \
34 drivers/io/io_memmap.c \
35 drivers/io/io_storage.c \
Ying-Chun Liu (PaulLiu)34527382019-01-22 03:27:55 +080036 drivers/delay_timer/generic_delay_timer.c \
Ying-Chun Liu (PaulLiu)de6f2f42019-01-30 04:20:38 +080037 drivers/io/io_block.c \
38 drivers/mmc/mmc.c \
39 drivers/rpi3/sdhost/rpi3_sdhost.c \
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000040 plat/common/aarch64/platform_mp_stack.S \
Andre Przywarab2262462019-07-09 11:18:59 +010041 plat/rpi/rpi3/aarch64/rpi3_bl2_mem_params_desc.c \
42 plat/rpi/rpi3/rpi3_bl2_setup.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +010043 plat/rpi/common/rpi3_image_load.c \
44 plat/rpi/common/rpi3_io_storage.c
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000045
46BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
Antonio Nino Diaz83d8c792018-08-17 14:25:08 +010047 plat/common/plat_psci_common.c \
Andre Przywarab2262462019-07-09 11:18:59 +010048 plat/rpi/rpi3/rpi3_bl31_setup.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +010049 plat/rpi/common/rpi3_pm.c \
50 plat/rpi/common/rpi3_topology.c \
Antonio Nino Diazf96582a2018-10-19 00:57:16 +010051 ${LIBFDT_SRCS}
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000052
53# Tune compiler for Cortex-A53
54ifeq ($(notdir $(CC)),armclang)
55 TF_CFLAGS_aarch64 += -mcpu=cortex-a53
56else ifneq ($(findstring clang,$(notdir $(CC))),)
57 TF_CFLAGS_aarch64 += -mcpu=cortex-a53
58else
59 TF_CFLAGS_aarch64 += -mtune=cortex-a53
60endif
61
Antonio Nino Diazdfe895d2018-07-12 08:58:38 +010062# Platform Makefile target
63# ------------------------
64
65RPI3_BL1_PAD_BIN := ${BUILD_PLAT}/bl1_pad.bin
66RPI3_ARMSTUB8_BIN := ${BUILD_PLAT}/armstub8.bin
67
68# Add new default target when compiling this platform
69all: armstub
70
71# This target concatenates BL1 and the FIP so that the base addresses match the
72# ones defined in the memory map
73armstub: bl1 fip
74 @echo " CAT $@"
75 ${Q}cp ${BUILD_PLAT}/bl1.bin ${RPI3_BL1_PAD_BIN}
76 ${Q}truncate --size=131072 ${RPI3_BL1_PAD_BIN}
77 ${Q}cat ${RPI3_BL1_PAD_BIN} ${BUILD_PLAT}/fip.bin > ${RPI3_ARMSTUB8_BIN}
78 @${ECHO_BLANK_LINE}
79 @echo "Built $@ successfully"
80 @${ECHO_BLANK_LINE}
81
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000082# Build config flags
83# ------------------
84
85# Enable all errata workarounds for Cortex-A53
86ERRATA_A53_826319 := 1
87ERRATA_A53_835769 := 1
88ERRATA_A53_836870 := 1
89ERRATA_A53_843419 := 1
90ERRATA_A53_855873 := 1
91
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +000092WORKAROUND_CVE_2017_5715 := 0
93
Antonio Nino Diaz4b7059d2018-07-13 15:26:49 +010094# Disable stack protector by default
95ENABLE_STACK_PROTECTOR := 0
96
Antonio Nino Diazdf0bb5a2018-07-13 20:19:21 +010097# Reset to BL31 isn't supported
98RESET_TO_BL31 := 0
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000099
100# Have different sections for code and rodata
101SEPARATE_CODE_AND_RODATA := 1
102
103# Use Coherent memory
104USE_COHERENT_MEM := 1
105
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000106# Platform build flags
107# --------------------
108
109# BL33 images are in AArch64 by default
110RPI3_BL33_IN_AARCH32 := 0
111
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +0100112# Assume that BL33 isn't the Linux kernel by default
113RPI3_DIRECT_LINUX_BOOT := 0
114
Pete Batardc9acd6c2018-11-13 13:14:26 +0000115# UART to use at runtime. -1 means the runtime UART is disabled.
116# Any other value means the default UART will be used.
Pete Batardf820cad2018-11-15 22:29:59 +0000117RPI3_RUNTIME_UART := -1
118
119# Use normal memory mapping for ROM, FIP, SRAM and DRAM
120RPI3_USE_UEFI_MAP := 0
Pete Batardc9acd6c2018-11-13 13:14:26 +0000121
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000122# BL32 location
123RPI3_BL32_RAM_LOCATION := tdram
124ifeq (${RPI3_BL32_RAM_LOCATION}, tsram)
125 RPI3_BL32_RAM_LOCATION_ID = SEC_SRAM_ID
126else ifeq (${RPI3_BL32_RAM_LOCATION}, tdram)
127 RPI3_BL32_RAM_LOCATION_ID = SEC_DRAM_ID
128else
129 $(error "Unsupported RPI3_BL32_RAM_LOCATION value")
130endif
131
132# Process platform flags
133# ----------------------
134
135$(eval $(call add_define,RPI3_BL32_RAM_LOCATION_ID))
136$(eval $(call add_define,RPI3_BL33_IN_AARCH32))
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +0100137$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
Igor Opaniuk02016b22019-01-16 23:59:41 +0200138ifdef RPI3_PRELOADED_DTB_BASE
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +0100139$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
Igor Opaniuk02016b22019-01-16 23:59:41 +0200140endif
Pete Batardc9acd6c2018-11-13 13:14:26 +0000141$(eval $(call add_define,RPI3_RUNTIME_UART))
Pete Batardf820cad2018-11-15 22:29:59 +0000142$(eval $(call add_define,RPI3_USE_UEFI_MAP))
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000143
144# Verify build config
145# -------------------
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +0100146#
147ifneq (${RPI3_DIRECT_LINUX_BOOT}, 0)
148 ifndef RPI3_PRELOADED_DTB_BASE
149 $(error Error: RPI3_PRELOADED_DTB_BASE needed if RPI3_DIRECT_LINUX_BOOT=1)
150 endif
151endif
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000152
Antonio Nino Diazdf0bb5a2018-07-13 20:19:21 +0100153ifneq (${RESET_TO_BL31}, 0)
154 $(error Error: rpi3 needs RESET_TO_BL31=0)
155endif
156
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000157ifeq (${ARCH},aarch32)
158 $(error Error: AArch32 not supported on rpi3)
159endif
Ying-Chun Liu (PaulLiu)d9f76e62018-06-10 02:00:27 +0800160
Antonio Nino Diaz4b7059d2018-07-13 15:26:49 +0100161ifneq ($(ENABLE_STACK_PROTECTOR), 0)
Andre Przywara93de78c2019-07-09 14:29:24 +0100162PLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +0100163 plat/rpi/common/rpi3_stack_protector.c
Antonio Nino Diaz4b7059d2018-07-13 15:26:49 +0100164endif
165
Ying-Chun Liu (PaulLiu)d9f76e62018-06-10 02:00:27 +0800166ifeq (${SPD},opteed)
167BL2_SOURCES += \
168 lib/optee/optee_utils.c
169endif
170
171# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
172# in the FIP if the platform requires.
173ifneq ($(BL32_EXTRA1),)
174$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
175endif
176ifneq ($(BL32_EXTRA2),)
177$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
178endif
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800179
180ifneq (${TRUSTED_BOARD_BOOT},0)
181
182 include drivers/auth/mbedtls/mbedtls_crypto.mk
183 include drivers/auth/mbedtls/mbedtls_x509.mk
184
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800185 AUTH_SOURCES := drivers/auth/auth_mod.c \
186 drivers/auth/crypto_mod.c \
187 drivers/auth/img_parser_mod.c \
188 drivers/auth/tbbr/tbbr_cot.c
189
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800190 BL1_SOURCES += ${AUTH_SOURCES} \
191 bl1/tbbr/tbbr_img_desc.c \
192 plat/common/tbbr/plat_tbbr.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +0100193 plat/rpi/common/rpi3_trusted_boot.c \
194 plat/rpi/common/rpi3_rotpk.S
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800195
196 BL2_SOURCES += ${AUTH_SOURCES} \
197 plat/common/tbbr/plat_tbbr.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +0100198 plat/rpi/common/rpi3_trusted_boot.c \
199 plat/rpi/common/rpi3_rotpk.S
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800200
201 ROT_KEY = $(BUILD_PLAT)/rot_key.pem
202 ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin
203
204 $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
205
206 $(BUILD_PLAT)/bl1/rpi3_rotpk.o: $(ROTPK_HASH)
207 $(BUILD_PLAT)/bl2/rpi3_rotpk.o: $(ROTPK_HASH)
208
209 certificates: $(ROT_KEY)
210
211 $(ROT_KEY):
212 @echo " OPENSSL $@"
213 $(Q)openssl genrsa 2048 > $@ 2>/dev/null
214
215 $(ROTPK_HASH): $(ROT_KEY)
216 @echo " OPENSSL $@"
217 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
218 openssl dgst -sha256 -binary > $@ 2>/dev/null
219endif