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Antonio Nino Diazae6779e2017-11-06 14:49:04 +00001#
Andre Przywara93de78c2019-07-09 14:29:24 +01002# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
Antonio Nino Diazae6779e2017-11-06 14:49:04 +00003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Antonio Nino Diazf96582a2018-10-19 00:57:16 +01007include lib/libfdt/libfdt.mk
8include lib/xlat_tables_v2/xlat_tables.mk
9
Andre Przywara4ea3bd32019-07-09 14:32:11 +010010PLAT_INCLUDES := -Iplat/rpi/common/include \
11 -Iplat/rpi/rpi3/include
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000012
Julius Werner6b88b652018-11-27 17:50:28 -080013PLAT_BL_COMMON_SOURCES := drivers/ti/uart/aarch64/16550_console.S \
Andre Przywara9ba6bb02020-03-10 12:34:56 +000014 drivers/arm/pl011/aarch64/pl011_console.S \
Andre Przywara9e4815a2020-03-11 16:33:53 +000015 drivers/gpio/gpio.c \
16 drivers/delay_timer/delay_timer.c \
17 drivers/rpi3/gpio/rpi3_gpio.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +010018 plat/rpi/common/rpi3_common.c \
Antonio Nino Diazf96582a2018-10-19 00:57:16 +010019 ${XLAT_TABLES_LIB_SRCS}
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000020
21BL1_SOURCES += drivers/io/io_fip.c \
22 drivers/io/io_memmap.c \
23 drivers/io/io_storage.c \
24 lib/cpus/aarch64/cortex_a53.S \
25 plat/common/aarch64/platform_mp_stack.S \
Andre Przywarab2262462019-07-09 11:18:59 +010026 plat/rpi/rpi3/aarch64/plat_helpers.S \
27 plat/rpi/rpi3/rpi3_bl1_setup.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +010028 plat/rpi/common/rpi3_io_storage.c \
Andre Przywara05862fc2019-07-09 13:54:56 +010029 drivers/rpi3/mailbox/rpi3_mbox.c \
30 plat/rpi/rpi3/rpi_mbox_board.c
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000031
32BL2_SOURCES += common/desc_image_load.c \
33 drivers/io/io_fip.c \
34 drivers/io/io_memmap.c \
35 drivers/io/io_storage.c \
Ying-Chun Liu (PaulLiu)34527382019-01-22 03:27:55 +080036 drivers/delay_timer/generic_delay_timer.c \
Ying-Chun Liu (PaulLiu)de6f2f42019-01-30 04:20:38 +080037 drivers/io/io_block.c \
38 drivers/mmc/mmc.c \
39 drivers/rpi3/sdhost/rpi3_sdhost.c \
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000040 plat/common/aarch64/platform_mp_stack.S \
Andre Przywarab2262462019-07-09 11:18:59 +010041 plat/rpi/rpi3/aarch64/plat_helpers.S \
42 plat/rpi/rpi3/aarch64/rpi3_bl2_mem_params_desc.c \
43 plat/rpi/rpi3/rpi3_bl2_setup.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +010044 plat/rpi/common/rpi3_image_load.c \
45 plat/rpi/common/rpi3_io_storage.c
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000046
47BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
Antonio Nino Diaz83d8c792018-08-17 14:25:08 +010048 plat/common/plat_psci_common.c \
Andre Przywarab2262462019-07-09 11:18:59 +010049 plat/rpi/rpi3/aarch64/plat_helpers.S \
50 plat/rpi/rpi3/rpi3_bl31_setup.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +010051 plat/rpi/common/rpi3_pm.c \
52 plat/rpi/common/rpi3_topology.c \
Antonio Nino Diazf96582a2018-10-19 00:57:16 +010053 ${LIBFDT_SRCS}
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000054
55# Tune compiler for Cortex-A53
56ifeq ($(notdir $(CC)),armclang)
57 TF_CFLAGS_aarch64 += -mcpu=cortex-a53
58else ifneq ($(findstring clang,$(notdir $(CC))),)
59 TF_CFLAGS_aarch64 += -mcpu=cortex-a53
60else
61 TF_CFLAGS_aarch64 += -mtune=cortex-a53
62endif
63
Antonio Nino Diazdfe895d2018-07-12 08:58:38 +010064# Platform Makefile target
65# ------------------------
66
67RPI3_BL1_PAD_BIN := ${BUILD_PLAT}/bl1_pad.bin
68RPI3_ARMSTUB8_BIN := ${BUILD_PLAT}/armstub8.bin
69
70# Add new default target when compiling this platform
71all: armstub
72
73# This target concatenates BL1 and the FIP so that the base addresses match the
74# ones defined in the memory map
75armstub: bl1 fip
76 @echo " CAT $@"
77 ${Q}cp ${BUILD_PLAT}/bl1.bin ${RPI3_BL1_PAD_BIN}
78 ${Q}truncate --size=131072 ${RPI3_BL1_PAD_BIN}
79 ${Q}cat ${RPI3_BL1_PAD_BIN} ${BUILD_PLAT}/fip.bin > ${RPI3_ARMSTUB8_BIN}
80 @${ECHO_BLANK_LINE}
81 @echo "Built $@ successfully"
82 @${ECHO_BLANK_LINE}
83
Antonio Nino Diazae6779e2017-11-06 14:49:04 +000084# Build config flags
85# ------------------
86
87# Enable all errata workarounds for Cortex-A53
88ERRATA_A53_826319 := 1
89ERRATA_A53_835769 := 1
90ERRATA_A53_836870 := 1
91ERRATA_A53_843419 := 1
92ERRATA_A53_855873 := 1
93
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +000094WORKAROUND_CVE_2017_5715 := 0
95
Antonio Nino Diaz4b7059d2018-07-13 15:26:49 +010096# Disable stack protector by default
97ENABLE_STACK_PROTECTOR := 0
98
Antonio Nino Diazdf0bb5a2018-07-13 20:19:21 +010099# Reset to BL31 isn't supported
100RESET_TO_BL31 := 0
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000101
102# Have different sections for code and rodata
103SEPARATE_CODE_AND_RODATA := 1
104
105# Use Coherent memory
106USE_COHERENT_MEM := 1
107
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000108# Platform build flags
109# --------------------
110
111# BL33 images are in AArch64 by default
112RPI3_BL33_IN_AARCH32 := 0
113
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +0100114# Assume that BL33 isn't the Linux kernel by default
115RPI3_DIRECT_LINUX_BOOT := 0
116
Pete Batardc9acd6c2018-11-13 13:14:26 +0000117# UART to use at runtime. -1 means the runtime UART is disabled.
118# Any other value means the default UART will be used.
Pete Batardf820cad2018-11-15 22:29:59 +0000119RPI3_RUNTIME_UART := -1
120
121# Use normal memory mapping for ROM, FIP, SRAM and DRAM
122RPI3_USE_UEFI_MAP := 0
Pete Batardc9acd6c2018-11-13 13:14:26 +0000123
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000124# BL32 location
125RPI3_BL32_RAM_LOCATION := tdram
126ifeq (${RPI3_BL32_RAM_LOCATION}, tsram)
127 RPI3_BL32_RAM_LOCATION_ID = SEC_SRAM_ID
128else ifeq (${RPI3_BL32_RAM_LOCATION}, tdram)
129 RPI3_BL32_RAM_LOCATION_ID = SEC_DRAM_ID
130else
131 $(error "Unsupported RPI3_BL32_RAM_LOCATION value")
132endif
133
134# Process platform flags
135# ----------------------
136
137$(eval $(call add_define,RPI3_BL32_RAM_LOCATION_ID))
138$(eval $(call add_define,RPI3_BL33_IN_AARCH32))
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +0100139$(eval $(call add_define,RPI3_DIRECT_LINUX_BOOT))
Igor Opaniuk02016b22019-01-16 23:59:41 +0200140ifdef RPI3_PRELOADED_DTB_BASE
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +0100141$(eval $(call add_define,RPI3_PRELOADED_DTB_BASE))
Igor Opaniuk02016b22019-01-16 23:59:41 +0200142endif
Pete Batardc9acd6c2018-11-13 13:14:26 +0000143$(eval $(call add_define,RPI3_RUNTIME_UART))
Pete Batardf820cad2018-11-15 22:29:59 +0000144$(eval $(call add_define,RPI3_USE_UEFI_MAP))
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000145
146# Verify build config
147# -------------------
Antonio Nino Diazf8b36cc2018-07-15 12:32:32 +0100148#
149ifneq (${RPI3_DIRECT_LINUX_BOOT}, 0)
150 ifndef RPI3_PRELOADED_DTB_BASE
151 $(error Error: RPI3_PRELOADED_DTB_BASE needed if RPI3_DIRECT_LINUX_BOOT=1)
152 endif
153endif
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000154
Antonio Nino Diazdf0bb5a2018-07-13 20:19:21 +0100155ifneq (${RESET_TO_BL31}, 0)
156 $(error Error: rpi3 needs RESET_TO_BL31=0)
157endif
158
Antonio Nino Diazae6779e2017-11-06 14:49:04 +0000159ifeq (${ARCH},aarch32)
160 $(error Error: AArch32 not supported on rpi3)
161endif
Ying-Chun Liu (PaulLiu)d9f76e62018-06-10 02:00:27 +0800162
Antonio Nino Diaz4b7059d2018-07-13 15:26:49 +0100163ifneq ($(ENABLE_STACK_PROTECTOR), 0)
Andre Przywara93de78c2019-07-09 14:29:24 +0100164PLAT_BL_COMMON_SOURCES += drivers/rpi3/rng/rpi3_rng.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +0100165 plat/rpi/common/rpi3_stack_protector.c
Antonio Nino Diaz4b7059d2018-07-13 15:26:49 +0100166endif
167
Ying-Chun Liu (PaulLiu)d9f76e62018-06-10 02:00:27 +0800168ifeq (${SPD},opteed)
169BL2_SOURCES += \
170 lib/optee/optee_utils.c
171endif
172
173# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
174# in the FIP if the platform requires.
175ifneq ($(BL32_EXTRA1),)
176$(eval $(call TOOL_ADD_IMG,BL32_EXTRA1,--tos-fw-extra1))
177endif
178ifneq ($(BL32_EXTRA2),)
179$(eval $(call TOOL_ADD_IMG,BL32_EXTRA2,--tos-fw-extra2))
180endif
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800181
182ifneq (${TRUSTED_BOARD_BOOT},0)
183
184 include drivers/auth/mbedtls/mbedtls_crypto.mk
185 include drivers/auth/mbedtls/mbedtls_x509.mk
186
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800187 AUTH_SOURCES := drivers/auth/auth_mod.c \
188 drivers/auth/crypto_mod.c \
189 drivers/auth/img_parser_mod.c \
190 drivers/auth/tbbr/tbbr_cot.c
191
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800192 BL1_SOURCES += ${AUTH_SOURCES} \
193 bl1/tbbr/tbbr_img_desc.c \
194 plat/common/tbbr/plat_tbbr.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +0100195 plat/rpi/common/rpi3_trusted_boot.c \
196 plat/rpi/common/rpi3_rotpk.S
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800197
198 BL2_SOURCES += ${AUTH_SOURCES} \
199 plat/common/tbbr/plat_tbbr.c \
Andre Przywara4ea3bd32019-07-09 14:32:11 +0100200 plat/rpi/common/rpi3_trusted_boot.c \
201 plat/rpi/common/rpi3_rotpk.S
Ying-Chun Liu (PaulLiu)9128df62018-07-04 02:26:48 +0800202
203 ROT_KEY = $(BUILD_PLAT)/rot_key.pem
204 ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin
205
206 $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
207
208 $(BUILD_PLAT)/bl1/rpi3_rotpk.o: $(ROTPK_HASH)
209 $(BUILD_PLAT)/bl2/rpi3_rotpk.o: $(ROTPK_HASH)
210
211 certificates: $(ROT_KEY)
212
213 $(ROT_KEY):
214 @echo " OPENSSL $@"
215 $(Q)openssl genrsa 2048 > $@ 2>/dev/null
216
217 $(ROTPK_HASH): $(ROT_KEY)
218 @echo " OPENSSL $@"
219 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
220 openssl dgst -sha256 -binary > $@ 2>/dev/null
221endif