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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Roberto Vargas2ca18d92018-02-12 12:36:17 +00002 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Dan Handley2b6b5742015-03-19 19:17:53 +00007#include <plat_arm.h>
Roberto Vargas2ca18d92018-02-12 12:36:17 +00008#include <platform.h>
Yatharth Kochar736a3bf2015-10-11 14:14:55 +01009#include <tbbr_img_def.h>
Dan Handleyed6ff952014-05-14 17:44:19 +010010#include "fvp_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010011
Achin Gupta4f6ad662013-10-25 09:08:21 +010012
13/*******************************************************************************
14 * Perform any BL1 specific platform actions.
15 ******************************************************************************/
16void bl1_early_platform_setup(void)
17{
Dan Handley2b6b5742015-03-19 19:17:53 +000018 arm_bl1_early_platform_setup();
Sandrine Bailleuxe3060e22014-06-13 14:48:18 +010019
Harry Liebel30affd52013-10-30 17:41:48 +000020 /* Initialize the platform config for future decision making */
Dan Handleyea451572014-05-15 14:53:30 +010021 fvp_config_setup();
James Morrissey9d72b4e2014-02-10 17:04:32 +000022
Dan Handley2b6b5742015-03-19 19:17:53 +000023 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +000024 * Initialize Interconnect for this cluster during cold boot.
Dan Handley2b6b5742015-03-19 19:17:53 +000025 * No need for locks as no other CPU is active.
26 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +000027 fvp_interconnect_init();
Dan Handley2b6b5742015-03-19 19:17:53 +000028 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +000029 * Enable coherency in Interconnect for the primary CPU's cluster.
Dan Handley2b6b5742015-03-19 19:17:53 +000030 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +000031 fvp_interconnect_enable();
Vikram Kanigirida567432014-04-15 18:08:08 +010032}