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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Manish V Badarkhe56808e42021-05-23 13:16:46 +01002 * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Alexei Fedorov25d7c882020-03-20 18:38:55 +00007#include <assert.h>
Manish V Badarkhe56808e42021-05-23 13:16:46 +01008#include <errno.h>
Alexei Fedorov25d7c882020-03-20 18:38:55 +00009
10#include <bl1/bl1.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <common/tbbr/tbbr_img_def.h>
Alexei Fedorov896799a2019-05-09 12:14:40 +010012#include <drivers/arm/smmu_v3.h>
Aditya Angadi20b48412019-04-16 11:29:14 +053013#include <drivers/arm/sp805.h>
Manish V Badarkhe56808e42021-05-23 13:16:46 +010014#include <lib/mmio.h>
Alexei Fedorov896799a2019-05-09 12:14:40 +010015#include <plat/arm/common/arm_config.h>
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +000016#include <plat/arm/common/plat_arm.h>
Aditya Angadi20b48412019-04-16 11:29:14 +053017#include <plat/arm/common/arm_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000018#include <plat/common/platform.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000019#include "fvp_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010020
21/*******************************************************************************
22 * Perform any BL1 specific platform actions.
23 ******************************************************************************/
24void bl1_early_platform_setup(void)
25{
Dan Handley2b6b5742015-03-19 19:17:53 +000026 arm_bl1_early_platform_setup();
Sandrine Bailleuxe3060e22014-06-13 14:48:18 +010027
Harry Liebel30affd52013-10-30 17:41:48 +000028 /* Initialize the platform config for future decision making */
Dan Handleyea451572014-05-15 14:53:30 +010029 fvp_config_setup();
James Morrissey9d72b4e2014-02-10 17:04:32 +000030
Dan Handley2b6b5742015-03-19 19:17:53 +000031 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +000032 * Initialize Interconnect for this cluster during cold boot.
Dan Handley2b6b5742015-03-19 19:17:53 +000033 * No need for locks as no other CPU is active.
34 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +000035 fvp_interconnect_init();
Dan Handley2b6b5742015-03-19 19:17:53 +000036 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +000037 * Enable coherency in Interconnect for the primary CPU's cluster.
Dan Handley2b6b5742015-03-19 19:17:53 +000038 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +000039 fvp_interconnect_enable();
Vikram Kanigirida567432014-04-15 18:08:08 +010040}
Aditya Angadi20b48412019-04-16 11:29:14 +053041
42void plat_arm_secure_wdt_start(void)
43{
44 sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL);
45}
46
47void plat_arm_secure_wdt_stop(void)
48{
49 sp805_stop(ARM_SP805_TWDG_BASE);
50}
Alexei Fedorov896799a2019-05-09 12:14:40 +010051
52void bl1_platform_setup(void)
53{
54 arm_bl1_platform_setup();
55
Alexei Fedorov7131d832019-08-16 14:15:59 +010056 /* Initialize System level generic or SP804 timer */
57 fvp_timer_init();
58
Alexei Fedorov896799a2019-05-09 12:14:40 +010059 /* On FVP RevC, initialize SMMUv3 */
60 if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U)
61 smmuv3_security_init(PLAT_FVP_SMMUV3_BASE);
62}
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +010063
64__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
65{
Manish V Badarkhe56808e42021-05-23 13:16:46 +010066 uint32_t nv_flags = mmio_read_32(V2M_SYS_NVFLAGS_ADDR);
67
68 /* Clear the NV flags register. */
69 mmio_write_32((V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR),
70 nv_flags);
71
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +010072 /* Setup the watchdog to reset the system as soon as possible */
73 sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
74
Jimmy Brisson471550a2020-08-06 10:50:15 -050075 while (true)
Ambroise Vincentfa42c9e2019-07-04 14:58:45 +010076 wfi();
77}
Alexei Fedorov25d7c882020-03-20 18:38:55 +000078
Manish V Badarkhe56808e42021-05-23 13:16:46 +010079/*******************************************************************************
80 * The following function checks if Firmware update is needed by checking error
81 * reported in NV flag.
82 ******************************************************************************/
83bool plat_arm_bl1_fwu_needed(void)
84{
85 int32_t nv_flags = (int32_t)mmio_read_32(V2M_SYS_NVFLAGS_ADDR);
86
87 /* if image load/authentication failed */
88 return ((nv_flags == -EAUTH) || (nv_flags == -ENOENT));
89}