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Yann Gautier66386952018-07-05 16:49:51 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
Yann Gautier2e286922019-03-11 10:04:38 +01003 * Copyright (C) STMicroelectronics 2017-2019 - All Rights Reserved
Yann Gautier66386952018-07-05 16:49:51 +02004 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Yann Gautier66386952018-07-05 16:49:51 +02006/dts-v1/;
7
Yann Gautier4ede20a2020-09-18 15:04:14 +02008#include "stm32mp157.dtsi"
9#include "stm32mp15xc.dtsi"
10#include "stm32mp15-pinctrl.dtsi"
11#include "stm32mp15xxaa-pinctrl.dtsi"
12#include <dt-bindings/clock/stm32mp1-clksrc.h>
13#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
Yann Gautier66386952018-07-05 16:49:51 +020014
15/ {
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010016 model = "STMicroelectronics STM32MP157C eval daughter";
Yann Gautier66386952018-07-05 16:49:51 +020017 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18
19 chosen {
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010020 stdout-path = "serial0:115200n8";
Yann Gautier66386952018-07-05 16:49:51 +020021 };
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010022
Yann Gautier4ede20a2020-09-18 15:04:14 +020023
24 memory@c0000000 {
25 device_type = "memory";
26 reg = <0xC0000000 0x40000000>;
27 };
28
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010029 aliases {
30 serial0 = &uart4;
31 };
32};
33
Yann Gautier4ede20a2020-09-18 15:04:14 +020034&bsec {
35 board_id: board_id@ec {
36 reg = <0xec 0x4>;
37 status = "okay";
38 secure-status = "okay";
39 };
40};
41
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010042&clk_hse {
43 st,digbypass;
Yann Gautier66386952018-07-05 16:49:51 +020044};
45
Yann Gautier4ede20a2020-09-18 15:04:14 +020046&cpu0 {
47 cpu-supply = <&vddcore>;
48};
49
50&cpu1 {
51 cpu-supply = <&vddcore>;
52};
53
54&cryp1 {
55 status="okay";
56};
57
Yann Gautier3466d682020-10-13 18:05:06 +020058&hash1 {
59 status = "okay";
60};
61
Yann Gautier66386952018-07-05 16:49:51 +020062&i2c4 {
63 pinctrl-names = "default";
64 pinctrl-0 = <&i2c4_pins_a>;
65 i2c-scl-rising-time-ns = <185>;
66 i2c-scl-falling-time-ns = <20>;
Yann Gautier4ede20a2020-09-18 15:04:14 +020067 clock-frequency = <400000>;
Yann Gautier66386952018-07-05 16:49:51 +020068 status = "okay";
69
Yann Gautiera45433b2019-01-16 18:31:00 +010070 pmic: stpmic@33 {
71 compatible = "st,stpmic1";
Yann Gautier66386952018-07-05 16:49:51 +020072 reg = <0x33>;
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010073 interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
74 interrupt-controller;
75 #interrupt-cells = <2>;
Yann Gautier66386952018-07-05 16:49:51 +020076 status = "okay";
77
Yann Gautier66386952018-07-05 16:49:51 +020078 regulators {
Yann Gautiera45433b2019-01-16 18:31:00 +010079 compatible = "st,stpmic1-regulators";
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010080 ldo1-supply = <&v3v3>;
81 ldo2-supply = <&v3v3>;
82 ldo3-supply = <&vdd_ddr>;
83 ldo5-supply = <&v3v3>;
84 ldo6-supply = <&v3v3>;
Yann Gautier4ede20a2020-09-18 15:04:14 +020085 pwr_sw1-supply = <&bst_out>;
86 pwr_sw2-supply = <&bst_out>;
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010087
88 vddcore: buck1 {
89 regulator-name = "vddcore";
Yann Gautierf3928f62019-02-14 11:15:03 +010090 regulator-min-microvolt = <1200000>;
Yann Gautier7b7e4bf2019-01-17 19:16:03 +010091 regulator-max-microvolt = <1350000>;
92 regulator-always-on;
93 regulator-initial-mode = <0>;
94 regulator-over-current-protection;
95 };
96
97 vdd_ddr: buck2 {
98 regulator-name = "vdd_ddr";
99 regulator-min-microvolt = <1350000>;
100 regulator-max-microvolt = <1350000>;
101 regulator-always-on;
102 regulator-initial-mode = <0>;
103 regulator-over-current-protection;
104 };
105
106 vdd: buck3 {
107 regulator-name = "vdd";
108 regulator-min-microvolt = <3300000>;
109 regulator-max-microvolt = <3300000>;
110 regulator-always-on;
111 st,mask-reset;
112 regulator-initial-mode = <0>;
113 regulator-over-current-protection;
114 };
115
Yann Gautier66386952018-07-05 16:49:51 +0200116 v3v3: buck4 {
117 regulator-name = "v3v3";
118 regulator-min-microvolt = <3300000>;
119 regulator-max-microvolt = <3300000>;
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100120 regulator-always-on;
Yann Gautier66386952018-07-05 16:49:51 +0200121 regulator-over-current-protection;
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100122 regulator-initial-mode = <0>;
123 };
124
125 vdda: ldo1 {
126 regulator-name = "vdda";
127 regulator-min-microvolt = <2900000>;
128 regulator-max-microvolt = <2900000>;
129 };
Yann Gautier66386952018-07-05 16:49:51 +0200130
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100131 v2v8: ldo2 {
132 regulator-name = "v2v8";
133 regulator-min-microvolt = <2800000>;
134 regulator-max-microvolt = <2800000>;
Yann Gautier66386952018-07-05 16:49:51 +0200135 };
136
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100137 vtt_ddr: ldo3 {
138 regulator-name = "vtt_ddr";
139 regulator-min-microvolt = <500000>;
140 regulator-max-microvolt = <750000>;
141 regulator-always-on;
142 regulator-over-current-protection;
143 };
144
145 vdd_usb: ldo4 {
146 regulator-name = "vdd_usb";
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100147 };
148
Yann Gautier66386952018-07-05 16:49:51 +0200149 vdd_sd: ldo5 {
150 regulator-name = "vdd_sd";
151 regulator-min-microvolt = <2900000>;
152 regulator-max-microvolt = <2900000>;
153 regulator-boot-on;
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100154 };
Yann Gautier66386952018-07-05 16:49:51 +0200155
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100156 v1v8: ldo6 {
157 regulator-name = "v1v8";
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <1800000>;
160 };
161
162 vref_ddr: vref_ddr {
163 regulator-name = "vref_ddr";
164 regulator-always-on;
Yann Gautier66386952018-07-05 16:49:51 +0200165 };
Yann Gautier66386952018-07-05 16:49:51 +0200166
Yann Gautier4ede20a2020-09-18 15:04:14 +0200167 bst_out: boost {
168 regulator-name = "bst_out";
169 };
Yann Gautier3edc7c32019-05-20 19:17:08 +0200170
Yann Gautier4ede20a2020-09-18 15:04:14 +0200171 vbus_otg: pwr_sw1 {
172 regulator-name = "vbus_otg";
173 };
Yann Gautier66386952018-07-05 16:49:51 +0200174
Yann Gautier4ede20a2020-09-18 15:04:14 +0200175 vbus_sw: pwr_sw2 {
176 regulator-name = "vbus_sw";
177 regulator-active-discharge = <1>;
178 };
179 };
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100180
Yann Gautier4ede20a2020-09-18 15:04:14 +0200181 onkey {
182 compatible = "st,stpmic1-onkey";
183 power-off-time-sec = <10>;
184 status = "okay";
185 };
Yann Gautier66386952018-07-05 16:49:51 +0200186
Yann Gautier4ede20a2020-09-18 15:04:14 +0200187 watchdog {
188 compatible = "st,stpmic1-wdt";
189 status = "disabled";
190 };
191 };
Yann Gautier66386952018-07-05 16:49:51 +0200192};
193
Yann Gautier4ede20a2020-09-18 15:04:14 +0200194&iwdg2 {
195 timeout-sec = <32>;
Yann Gautier66386952018-07-05 16:49:51 +0200196 status = "okay";
197};
198
Yann Gautier4ede20a2020-09-18 15:04:14 +0200199&pwr_regulators {
200 vdd-supply = <&vdd>;
201 vdd_3v3_usbfs-supply = <&vdd_usb>;
Yann Gautier66386952018-07-05 16:49:51 +0200202};
203
Yann Gautier66386952018-07-05 16:49:51 +0200204&rcc {
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100205 secure-status = "disabled";
Yann Gautier66386952018-07-05 16:49:51 +0200206 st,clksrc = <
207 CLK_MPU_PLL1P
208 CLK_AXI_PLL2P
Yann Gautiered342322019-02-15 17:33:27 +0100209 CLK_MCU_PLL3P
Yann Gautier66386952018-07-05 16:49:51 +0200210 CLK_PLL12_HSE
211 CLK_PLL3_HSE
212 CLK_PLL4_HSE
213 CLK_RTC_LSE
214 CLK_MCO1_DISABLED
215 CLK_MCO2_DISABLED
216 >;
217
218 st,clkdiv = <
219 1 /*MPU*/
220 0 /*AXI*/
Yann Gautiered342322019-02-15 17:33:27 +0100221 0 /*MCU*/
Yann Gautier66386952018-07-05 16:49:51 +0200222 1 /*APB1*/
223 1 /*APB2*/
224 1 /*APB3*/
225 1 /*APB4*/
226 2 /*APB5*/
227 23 /*RTC*/
228 0 /*MCO1*/
229 0 /*MCO2*/
230 >;
231
232 st,pkcs = <
233 CLK_CKPER_HSE
234 CLK_FMC_ACLK
235 CLK_QSPI_ACLK
236 CLK_ETH_DISABLED
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100237 CLK_SDMMC12_PLL4P
Yann Gautier66386952018-07-05 16:49:51 +0200238 CLK_DSI_DSIPLL
239 CLK_STGEN_HSE
240 CLK_USBPHY_HSE
241 CLK_SPI2S1_PLL3Q
242 CLK_SPI2S23_PLL3Q
243 CLK_SPI45_HSI
244 CLK_SPI6_HSI
245 CLK_I2C46_HSI
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100246 CLK_SDMMC3_PLL4P
Yann Gautier66386952018-07-05 16:49:51 +0200247 CLK_USBO_USBPHY
248 CLK_ADC_CKPER
249 CLK_CEC_LSE
250 CLK_I2C12_HSI
251 CLK_I2C35_HSI
252 CLK_UART1_HSI
253 CLK_UART24_HSI
254 CLK_UART35_HSI
255 CLK_UART6_HSI
256 CLK_UART78_HSI
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100257 CLK_SPDIF_PLL4P
Antonio Borneodd445ab2019-07-29 14:46:16 +0200258 CLK_FDCAN_PLL4R
Yann Gautier66386952018-07-05 16:49:51 +0200259 CLK_SAI1_PLL3Q
260 CLK_SAI2_PLL3Q
261 CLK_SAI3_PLL3Q
262 CLK_SAI4_PLL3Q
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100263 CLK_RNG1_LSI
264 CLK_RNG2_LSI
Yann Gautier66386952018-07-05 16:49:51 +0200265 CLK_LPTIM1_PCLK1
266 CLK_LPTIM23_PCLK3
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100267 CLK_LPTIM45_LSE
Yann Gautier66386952018-07-05 16:49:51 +0200268 >;
269
270 /* VCO = 1300.0 MHz => P = 650 (CPU) */
271 pll1: st,pll@0 {
272 cfg = < 2 80 0 0 0 PQR(1,0,0) >;
273 frac = < 0x800 >;
274 };
275
276 /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
277 pll2: st,pll@1 {
278 cfg = < 2 65 1 0 0 PQR(1,1,1) >;
279 frac = < 0x1400 >;
280 };
281
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100282 /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
Yann Gautier66386952018-07-05 16:49:51 +0200283 pll3: st,pll@2 {
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100284 cfg = < 1 33 1 16 36 PQR(1,1,1) >;
285 frac = < 0x1a04 >;
Yann Gautier66386952018-07-05 16:49:51 +0200286 };
287
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100288 /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
Yann Gautier66386952018-07-05 16:49:51 +0200289 pll4: st,pll@3 {
Yann Gautier7b7e4bf2019-01-17 19:16:03 +0100290 cfg = < 3 98 5 7 7 PQR(1,1,1) >;
Yann Gautier66386952018-07-05 16:49:51 +0200291 };
292};
293
Yann Gautier4ede20a2020-09-18 15:04:14 +0200294&rng1 {
295 status = "okay";
296};
297
298&rtc {
299 status = "okay";
300};
301
302&sdmmc1 {
303 pinctrl-names = "default";
304 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
305 disable-wp;
306 st,sig-dir;
307 st,neg-edge;
308 st,use-ckin;
309 bus-width = <4>;
310 vmmc-supply = <&vdd_sd>;
311 sd-uhs-sdr12;
312 sd-uhs-sdr25;
313 sd-uhs-sdr50;
314 sd-uhs-ddr50;
315 status = "okay";
316};
317
318&sdmmc2 {
319 pinctrl-names = "default";
320 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
321 non-removable;
322 no-sd;
323 no-sdio;
324 st,neg-edge;
325 bus-width = <8>;
326 vmmc-supply = <&v3v3>;
327 vqmmc-supply = <&vdd>;
328 mmc-ddr-3_3v;
329 status = "okay";
330};
331
332&uart4 {
333 pinctrl-names = "default";
334 pinctrl-0 = <&uart4_pins_a>;
335 status = "okay";
Yann Gautier990ecea2019-06-04 17:24:36 +0200336};