Anson Huang | f753d46 | 2019-01-15 10:34:04 +0800 | [diff] [blame] | 1 | /* |
Jacky Bai | 4d93d1d | 2020-07-02 14:39:58 +0800 | [diff] [blame] | 2 | * Copyright (c) 2015-2024, ARM Limited and Contributors. All rights reserved. |
Anson Huang | f753d46 | 2019-01-15 10:34:04 +0800 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: BSD-3-Clause |
| 5 | */ |
| 6 | |
| 7 | #ifndef __IMX_SIP_SVC_H__ |
| 8 | #define __IMX_SIP_SVC_H__ |
| 9 | |
| 10 | /* SMC function IDs for SiP Service queries */ |
Jacky Bai | 31f0232 | 2019-12-11 16:26:59 +0800 | [diff] [blame] | 11 | #define IMX_SIP_GPC 0xC2000000 |
| 12 | |
Anson Huang | 922c45f | 2019-01-15 10:56:36 +0800 | [diff] [blame] | 13 | #define IMX_SIP_CPUFREQ 0xC2000001 |
| 14 | #define IMX_SIP_SET_CPUFREQ 0x00 |
| 15 | |
Anson Huang | f753d46 | 2019-01-15 10:34:04 +0800 | [diff] [blame] | 16 | #define IMX_SIP_SRTC 0xC2000002 |
| 17 | #define IMX_SIP_SRTC_SET_TIME 0x00 |
| 18 | |
Anson Huang | 971392d | 2019-01-18 10:43:59 +0800 | [diff] [blame] | 19 | #define IMX_SIP_BUILDINFO 0xC2000003 |
| 20 | #define IMX_SIP_BUILDINFO_GET_COMMITHASH 0x00 |
| 21 | |
Jacky Bai | d746daa1 | 2019-11-25 13:19:37 +0800 | [diff] [blame] | 22 | #define IMX_SIP_DDR_DVFS 0xc2000004 |
| 23 | |
Igor Opaniuk | f2de681 | 2021-03-10 13:42:55 +0200 | [diff] [blame] | 24 | #define IMX_SIP_SRC 0xC2000005 |
| 25 | #define IMX_SIP_SRC_SET_SECONDARY_BOOT 0x10 |
| 26 | #define IMX_SIP_SRC_IS_SECONDARY_BOOT 0x11 |
| 27 | |
Leonard Crestez | 5511908 | 2019-05-10 13:07:41 +0300 | [diff] [blame] | 28 | #define IMX_SIP_GET_SOC_INFO 0xC2000006 |
| 29 | |
Andrey Zhizhikin | 10a4d86 | 2022-09-26 22:25:33 +0200 | [diff] [blame] | 30 | #define IMX_SIP_HAB 0xC2000007 |
| 31 | #define IMX_SIP_HAB_AUTH_IMG 0x00 |
| 32 | #define IMX_SIP_HAB_ENTRY 0x01 |
| 33 | #define IMX_SIP_HAB_EXIT 0x02 |
| 34 | #define IMX_SIP_HAB_REPORT_EVENT 0x03 |
| 35 | #define IMX_SIP_HAB_REPORT_STATUS 0x04 |
| 36 | #define IMX_SIP_HAB_FAILSAFE 0x05 |
| 37 | #define IMX_SIP_HAB_CHECK_TARGET 0x06 |
| 38 | #define IMX_SIP_HAB_GET_VERSION 0x07 |
| 39 | #define IMX_SIP_HAB_AUTH_IMG_NO_DCD 0x08 |
| 40 | |
Anson Huang | e1d418c | 2019-01-18 10:01:50 +0800 | [diff] [blame] | 41 | #define IMX_SIP_WAKEUP_SRC 0xC2000009 |
| 42 | #define IMX_SIP_WAKEUP_SRC_SCU 0x1 |
| 43 | #define IMX_SIP_WAKEUP_SRC_IRQSTEER 0x2 |
| 44 | |
Anson Huang | 6e47de5 | 2019-01-18 10:27:48 +0800 | [diff] [blame] | 45 | #define IMX_SIP_OTP_READ 0xC200000A |
| 46 | #define IMX_SIP_OTP_WRITE 0xC200000B |
| 47 | |
Anson Huang | e708bfb | 2019-01-18 10:35:54 +0800 | [diff] [blame] | 48 | #define IMX_SIP_MISC_SET_TEMP 0xC200000C |
| 49 | |
Peng Fan | dd860d1 | 2020-07-10 14:18:01 +0800 | [diff] [blame] | 50 | #define IMX_SIP_AARCH32 0xC20000FD |
| 51 | |
| 52 | int imx_kernel_entry_handler(uint32_t smc_fid, u_register_t x1, |
| 53 | u_register_t x2, u_register_t x3, |
| 54 | u_register_t x4); |
Jacky Bai | 4d93d1d | 2020-07-02 14:39:58 +0800 | [diff] [blame] | 55 | |
| 56 | #define IMX_SIP_SCMI 0xC20000FE |
| 57 | |
Jacky Bai | 7ec9451 | 2023-09-21 14:01:37 +0800 | [diff] [blame] | 58 | #define IMX_SIP_HIFI_XRDC 0xC200000E |
| 59 | |
Leonard Crestez | 5511908 | 2019-05-10 13:07:41 +0300 | [diff] [blame] | 60 | #if defined(PLAT_imx8mq) |
| 61 | int imx_soc_info_handler(uint32_t smc_fid, u_register_t x1, |
| 62 | u_register_t x2, u_register_t x3); |
Jacky Bai | a940799 | 2020-01-08 16:56:01 +0800 | [diff] [blame] | 63 | int imx_gpc_handler(uint32_t smc_fid, u_register_t x1, |
| 64 | u_register_t x2, u_register_t x3); |
Jacky Bai | a51b11a | 2020-01-14 14:19:05 +0800 | [diff] [blame] | 65 | int dram_dvfs_handler(uint32_t smc_fid, void *handle, |
| 66 | u_register_t x1, u_register_t x2, u_register_t x3); |
Leonard Crestez | 5511908 | 2019-05-10 13:07:41 +0300 | [diff] [blame] | 67 | #endif |
Jacky Bai | d746daa1 | 2019-11-25 13:19:37 +0800 | [diff] [blame] | 68 | #if defined(PLAT_imx8mm) || defined(PLAT_imx8mn) || defined(PLAT_imx8mp) |
| 69 | int dram_dvfs_handler(uint32_t smc_fid, void *handle, |
| 70 | u_register_t x1, u_register_t x2, u_register_t x3); |
Jacky Bai | 31f0232 | 2019-12-11 16:26:59 +0800 | [diff] [blame] | 71 | |
| 72 | int imx_gpc_handler(uint32_t smc_fid, u_register_t x1, |
| 73 | u_register_t x2, u_register_t x3); |
Jacky Bai | d746daa1 | 2019-11-25 13:19:37 +0800 | [diff] [blame] | 74 | #endif |
Leonard Crestez | 5511908 | 2019-05-10 13:07:41 +0300 | [diff] [blame] | 75 | |
Igor Opaniuk | e1ff460 | 2023-10-31 17:10:35 +0100 | [diff] [blame] | 76 | #if defined(PLAT_imx8mm) || defined(PLAT_imx8mq) || defined(PLAT_imx8mn) || \ |
| 77 | defined(PLAT_imx8mp) |
| 78 | |
Igor Opaniuk | f2de681 | 2021-03-10 13:42:55 +0200 | [diff] [blame] | 79 | int imx_src_handler(uint32_t smc_fid, u_register_t x1, |
| 80 | u_register_t x2, u_register_t x3, void *handle); |
| 81 | #endif |
| 82 | |
Andrey Zhizhikin | 10a4d86 | 2022-09-26 22:25:33 +0200 | [diff] [blame] | 83 | #if defined(PLAT_imx8mm) || defined(PLAT_imx8mn) || defined(PLAT_imx8mp) |
| 84 | int imx_hab_handler(uint32_t smc_fid, u_register_t x1, |
| 85 | u_register_t x2, u_register_t x3, u_register_t x4); |
| 86 | #endif |
| 87 | |
Leonard Crestez | d62c161 | 2019-05-20 11:28:50 +0300 | [diff] [blame] | 88 | #if (defined(PLAT_imx8qm) || defined(PLAT_imx8qx)) |
Anson Huang | 922c45f | 2019-01-15 10:56:36 +0800 | [diff] [blame] | 89 | int imx_cpufreq_handler(uint32_t smc_fid, u_register_t x1, |
| 90 | u_register_t x2, u_register_t x3); |
Anson Huang | f753d46 | 2019-01-15 10:34:04 +0800 | [diff] [blame] | 91 | int imx_srtc_handler(uint32_t smc_fid, void *handle, u_register_t x1, |
| 92 | u_register_t x2, u_register_t x3, u_register_t x4); |
Anson Huang | e1d418c | 2019-01-18 10:01:50 +0800 | [diff] [blame] | 93 | int imx_wakeup_src_handler(uint32_t smc_fid, u_register_t x1, |
| 94 | u_register_t x2, u_register_t x3); |
Anson Huang | 6e47de5 | 2019-01-18 10:27:48 +0800 | [diff] [blame] | 95 | int imx_otp_handler(uint32_t smc_fid, void *handle, |
| 96 | u_register_t x1, u_register_t x2); |
Anson Huang | e708bfb | 2019-01-18 10:35:54 +0800 | [diff] [blame] | 97 | int imx_misc_set_temp_handler(uint32_t smc_fid, u_register_t x1, |
| 98 | u_register_t x2, u_register_t x3, |
| 99 | u_register_t x4); |
Leonard Crestez | 402bd52 | 2019-05-08 22:29:21 +0300 | [diff] [blame] | 100 | #endif |
Anson Huang | 971392d | 2019-01-18 10:43:59 +0800 | [diff] [blame] | 101 | uint64_t imx_buildinfo_handler(uint32_t smc_fid, u_register_t x1, |
| 102 | u_register_t x2, u_register_t x3, |
| 103 | u_register_t x4); |
Jacky Bai | 4d93d1d | 2020-07-02 14:39:58 +0800 | [diff] [blame] | 104 | int scmi_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3); |
Jacky Bai | 7ec9451 | 2023-09-21 14:01:37 +0800 | [diff] [blame] | 105 | int imx_hifi_xrdc(uint32_t smc_fid); |
Anson Huang | f753d46 | 2019-01-15 10:34:04 +0800 | [diff] [blame] | 106 | |
Jacky Bai | 9f6e5d9 | 2022-01-25 16:34:58 +0800 | [diff] [blame] | 107 | #if defined(PLAT_imx8ulp) |
| 108 | int dram_dvfs_handler(uint32_t smc_fid, void *handle, |
| 109 | u_register_t x1, u_register_t x2, u_register_t x3); |
| 110 | #endif |
| 111 | |
Anson Huang | f753d46 | 2019-01-15 10:34:04 +0800 | [diff] [blame] | 112 | #endif /* __IMX_SIP_SVC_H__ */ |