Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 1 | /* |
Michal Simek | 2a47faa | 2023-04-14 08:43:51 +0200 | [diff] [blame] | 2 | * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. |
Michal Simek | d4ff272 | 2023-04-20 08:01:03 +0200 | [diff] [blame] | 3 | * Copyright (c) 2023, Advanced Micro Devices, Inc. All rights reserved. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 4 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 5 | * SPDX-License-Identifier: BSD-3-Clause |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * Top-level SMC handler for ZynqMP power management calls and |
| 10 | * IPI setup functions for communication with PMU. |
| 11 | */ |
| 12 | |
| 13 | #include <errno.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 14 | |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 15 | #include <arch_helpers.h> |
Prasad Kummari | 536e110 | 2023-06-22 10:50:02 +0530 | [diff] [blame] | 16 | #include <common/runtime_svc.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 17 | #include <drivers/arm/gicv2.h> |
| 18 | #include <lib/mmio.h> |
| 19 | #include <lib/spinlock.h> |
| 20 | #include <plat/common/platform.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 21 | |
Jolly Shah | 0bfd700 | 2019-01-08 11:10:47 -0800 | [diff] [blame] | 22 | #include <plat_private.h> |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 23 | #include "pm_client.h" |
| 24 | #include "pm_ipi.h" |
Jay Buddhabhatti | 26e138a | 2022-12-21 23:03:35 -0800 | [diff] [blame] | 25 | #include "zynqmp_pm_api_sys.h" |
Jay Buddhabhatti | 5b9f391 | 2023-02-02 22:34:03 -0800 | [diff] [blame] | 26 | #include "zynqmp_pm_defs.h" |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 27 | |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 28 | /* pm_up = !0 - UP, pm_up = 0 - DOWN */ |
| 29 | static int32_t pm_up, ipi_irq_flag; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 30 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 31 | #if ZYNQMP_WDT_RESTART |
| 32 | static spinlock_t inc_lock; |
| 33 | static int active_cores = 0; |
| 34 | #endif |
| 35 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 36 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 37 | * typedef pm_ctx_t - Structure which contains data for power management. |
| 38 | * @api_version: version of PM API, must match with one on PMU side. |
| 39 | * @payload: payload array used to store received. |
| 40 | * data from ipi buffer registers. |
| 41 | * |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 42 | */ |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 43 | typedef struct { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 44 | uint32_t api_version; |
| 45 | uint32_t payload[PAYLOAD_ARG_CNT]; |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 46 | } pm_ctx_t; |
| 47 | |
| 48 | static pm_ctx_t pm_ctx; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 49 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 50 | #if ZYNQMP_WDT_RESTART |
| 51 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 52 | * trigger_wdt_restart() - Trigger warm restart event to APU cores. |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 53 | * |
| 54 | * This function triggers SGI for all active APU CPUs. SGI handler then |
| 55 | * power down CPU and call system reset. |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 56 | * |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 57 | */ |
| 58 | static void trigger_wdt_restart(void) |
| 59 | { |
| 60 | uint32_t core_count = 0; |
| 61 | uint32_t core_status[3]; |
| 62 | uint32_t target_cpu_list = 0; |
| 63 | int i; |
| 64 | |
| 65 | for (i = 0; i < 4; i++) { |
| 66 | pm_get_node_status(NODE_APU_0 + i, core_status); |
| 67 | if (core_status[0] == 1) { |
| 68 | core_count++; |
| 69 | target_cpu_list |= (1 << i); |
| 70 | } |
| 71 | } |
| 72 | |
| 73 | spin_lock(&inc_lock); |
| 74 | active_cores = core_count; |
| 75 | spin_unlock(&inc_lock); |
| 76 | |
| 77 | INFO("Active Cores: %d\n", active_cores); |
| 78 | |
Siva Durga Prasad Paladugu | 60bfbc9 | 2018-09-24 22:51:49 -0700 | [diff] [blame] | 79 | for (i = PLATFORM_CORE_COUNT - 1; i >= 0; i--) { |
| 80 | if (target_cpu_list & (1 << i)) { |
| 81 | /* trigger SGI to active cores */ |
| 82 | plat_ic_raise_el3_sgi(ARM_IRQ_SEC_SGI_7, i); |
| 83 | } |
| 84 | } |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 85 | } |
| 86 | |
| 87 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 88 | * ttc_fiq_handler() - TTC Handler for timer event. |
| 89 | * @id: number of the highest priority pending interrupt of the type |
| 90 | * that this handler was registered for. |
| 91 | * @flags: security state, bit[0]. |
| 92 | * @handle: pointer to 'cpu_context' structure of the current CPU for the |
| 93 | * security state specified in the 'flags' parameter. |
| 94 | * @cookie: unused. |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 95 | * |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 96 | * Function registered as INTR_TYPE_EL3 interrupt handler. |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 97 | * |
| 98 | * When WDT event is received in PMU, PMU needs to notify master to do cleanup |
| 99 | * if required. PMU sets up timer and starts timer to overflow in zero time upon |
Prasad Kummari | e078311 | 2023-04-26 11:02:07 +0530 | [diff] [blame] | 100 | * WDT event. TF-A handles this timer event and takes necessary action required |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 101 | * for warm restart. |
| 102 | * |
| 103 | * In presence of non-secure software layers (EL1/2) sets the interrupt |
Elyes Haouas | 2be03c0 | 2023-02-13 09:14:48 +0100 | [diff] [blame] | 104 | * at registered entrance in GIC and informs that PMU responded or demands |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 105 | * action. |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 106 | * |
| 107 | * Return: 0 on success. |
| 108 | * |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 109 | */ |
| 110 | static uint64_t ttc_fiq_handler(uint32_t id, uint32_t flags, void *handle, |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 111 | void *cookie) |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 112 | { |
| 113 | INFO("BL31: Got TTC FIQ\n"); |
| 114 | |
Siva Durga Prasad Paladugu | 60bfbc9 | 2018-09-24 22:51:49 -0700 | [diff] [blame] | 115 | plat_ic_end_of_interrupt(id); |
| 116 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 117 | /* Clear TTC interrupt by reading interrupt register */ |
| 118 | mmio_read_32(TTC3_INTR_REGISTER_1); |
| 119 | |
| 120 | /* Disable the timer interrupts */ |
| 121 | mmio_write_32(TTC3_INTR_ENABLE_1, 0); |
| 122 | |
| 123 | trigger_wdt_restart(); |
| 124 | |
| 125 | return 0; |
| 126 | } |
| 127 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 128 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 129 | * zynqmp_sgi7_irq() - Handler for SGI7 IRQ. |
| 130 | * @id: number of the highest priority pending interrupt of the type |
| 131 | * that this handler was registered for. |
| 132 | * @flags: security state, bit[0]. |
| 133 | * @handle: pointer to 'cpu_context' structure of the current CPU for the |
| 134 | * security state specified in the 'flags' parameter. |
| 135 | * @cookie: unused. |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 136 | * |
| 137 | * Function registered as INTR_TYPE_EL3 interrupt handler |
| 138 | * |
Prasad Kummari | e078311 | 2023-04-26 11:02:07 +0530 | [diff] [blame] | 139 | * On receiving WDT event from PMU, TF-A generates SGI7 to all running CPUs. |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 140 | * In response to SGI7 interrupt, each CPUs do clean up if required and last |
| 141 | * running CPU calls system restart. |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 142 | * |
| 143 | * Return: This function does not return a value and it enters into wfi. |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 144 | */ |
| 145 | static uint64_t __unused __dead2 zynqmp_sgi7_irq(uint32_t id, uint32_t flags, |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 146 | void *handle, void *cookie) |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 147 | { |
| 148 | int i; |
Will Wong | cc12795 | 2020-11-22 23:45:21 -0800 | [diff] [blame] | 149 | uint32_t value; |
| 150 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 151 | /* enter wfi and stay there */ |
| 152 | INFO("Entering wfi\n"); |
| 153 | |
| 154 | spin_lock(&inc_lock); |
| 155 | active_cores--; |
| 156 | |
| 157 | for (i = 0; i < 4; i++) { |
| 158 | mmio_write_32(BASE_GICD_BASE + GICD_CPENDSGIR + 4 * i, |
| 159 | 0xffffffff); |
| 160 | } |
| 161 | |
Tanmay Shah | 50702ba | 2022-09-13 11:10:08 -0700 | [diff] [blame] | 162 | dsb(); |
| 163 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 164 | spin_unlock(&inc_lock); |
| 165 | |
| 166 | if (active_cores == 0) { |
Will Wong | cc12795 | 2020-11-22 23:45:21 -0800 | [diff] [blame] | 167 | pm_mmio_read(PMU_GLOBAL_GEN_STORAGE4, &value); |
| 168 | value = (value & RESTART_SCOPE_MASK) >> RESTART_SCOPE_SHIFT; |
| 169 | pm_system_shutdown(PMF_SHUTDOWN_TYPE_RESET, value); |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 170 | } |
| 171 | |
| 172 | /* enter wfi and stay there */ |
| 173 | while (1) |
| 174 | wfi(); |
| 175 | } |
| 176 | |
| 177 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 178 | * pm_wdt_restart_setup() - Setup warm restart interrupts. |
| 179 | * |
| 180 | * Return: Returns status, 0 on success or error+reason. |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 181 | * |
| 182 | * This function sets up handler for SGI7 and TTC interrupts |
| 183 | * used for warm restart. |
| 184 | */ |
| 185 | static int pm_wdt_restart_setup(void) |
| 186 | { |
| 187 | int ret; |
| 188 | |
| 189 | /* register IRQ handler for SGI7 */ |
| 190 | ret = request_intr_type_el3(ARM_IRQ_SEC_SGI_7, zynqmp_sgi7_irq); |
| 191 | if (ret) { |
| 192 | WARN("BL31: registering SGI7 interrupt failed\n"); |
| 193 | goto err; |
| 194 | } |
| 195 | |
| 196 | ret = request_intr_type_el3(IRQ_TTC3_1, ttc_fiq_handler); |
| 197 | if (ret) |
| 198 | WARN("BL31: registering TTC3 interrupt failed\n"); |
| 199 | |
| 200 | err: |
| 201 | return ret; |
| 202 | } |
| 203 | #endif |
| 204 | |
| 205 | /** |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 206 | * pm_setup() - PM service setup. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 207 | * |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 208 | * Return: On success, the initialization function must return 0. |
| 209 | * Any other return value will cause the framework to ignore |
| 210 | * the service. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 211 | * |
| 212 | * Initialization functions for ZynqMP power management for |
| 213 | * communicaton with PMU. |
| 214 | * |
| 215 | * Called from sip_svc_setup initialization function with the |
| 216 | * rt_svc_init signature. |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 217 | * |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 218 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 219 | int32_t pm_setup(void) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 220 | { |
Naman Patel | 0feb5ea | 2022-11-22 05:01:37 -0800 | [diff] [blame] | 221 | enum pm_ret_status err; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 222 | |
HariBabu Gattem | aa81171 | 2022-10-07 00:07:49 -0700 | [diff] [blame] | 223 | pm_ipi_init(primary_proc); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 224 | |
Naman Patel | 0feb5ea | 2022-11-22 05:01:37 -0800 | [diff] [blame] | 225 | err = pm_get_api_version(&pm_ctx.api_version); |
| 226 | if (err != PM_RET_SUCCESS) { |
| 227 | ERROR("BL31: Failed to read Platform Management API version. " |
| 228 | "Return: %d\n", err); |
| 229 | return -EINVAL; |
| 230 | } |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 231 | if (pm_ctx.api_version < PM_VERSION) { |
| 232 | ERROR("BL31: Platform Management API version error. Expected: " |
| 233 | "v%d.%d - Found: v%d.%d\n", PM_VERSION_MAJOR, |
| 234 | PM_VERSION_MINOR, pm_ctx.api_version >> 16, |
Venkatesh Yadav Abbarapu | a2ca35d | 2022-07-04 11:40:27 +0530 | [diff] [blame] | 235 | pm_ctx.api_version & 0xFFFFU); |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 236 | return -EINVAL; |
| 237 | } |
| 238 | |
HariBabu Gattem | aa81171 | 2022-10-07 00:07:49 -0700 | [diff] [blame] | 239 | int32_t status = 0, ret = 0; |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 240 | #if ZYNQMP_WDT_RESTART |
| 241 | status = pm_wdt_restart_setup(); |
| 242 | if (status) |
| 243 | WARN("BL31: warm-restart setup failed\n"); |
| 244 | #endif |
| 245 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 246 | if (status >= 0) { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 247 | INFO("BL31: PM Service Init Complete: API v%d.%d\n", |
| 248 | PM_VERSION_MAJOR, PM_VERSION_MINOR); |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 249 | ret = 0; |
| 250 | } else { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 251 | INFO("BL31: PM Service Init Failed, Error Code %d!\n", status); |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 252 | ret = status; |
| 253 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 254 | |
Siva Durga Prasad Paladugu | 79f7595 | 2018-04-30 19:39:49 +0530 | [diff] [blame] | 255 | pm_up = !status; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 256 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 257 | return ret; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 258 | } |
| 259 | |
| 260 | /** |
| 261 | * pm_smc_handler() - SMC handler for PM-API calls coming from EL1/EL2. |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 262 | * @smc_fid: Function Identifier. |
| 263 | * @x1: Arguments. |
| 264 | * @x2: Arguments. |
| 265 | * @x3: Arguments. |
| 266 | * @x4: Arguments. |
| 267 | * @cookie: Unused. |
| 268 | * @handle: Pointer to caller's context structure. |
| 269 | * @flags: SECURE_FLAG or NON_SECURE_FLAG. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 270 | * |
| 271 | * Determines that smc_fid is valid and supported PM SMC Function ID from the |
| 272 | * list of pm_api_ids, otherwise completes the request with |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 273 | * the unknown SMC Function ID. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 274 | * |
| 275 | * The SMC calls for PM service are forwarded from SIP Service SMC handler |
Prasad Kummari | 7d0623a | 2023-06-09 14:32:00 +0530 | [diff] [blame] | 276 | * function with rt_svc_handle signature. |
| 277 | * |
| 278 | * Return: Unused. |
| 279 | * |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 280 | */ |
| 281 | uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
Venkatesh Yadav Abbarapu | 0386e65 | 2022-05-24 14:05:57 +0530 | [diff] [blame] | 282 | uint64_t x4, const void *cookie, void *handle, uint64_t flags) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 283 | { |
| 284 | enum pm_ret_status ret; |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 285 | uint32_t payload[PAYLOAD_ARG_CNT]; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 286 | |
Ronak Jain | f841467 | 2022-05-11 02:48:52 -0700 | [diff] [blame] | 287 | uint32_t pm_arg[5]; |
HariBabu Gattem | aa81171 | 2022-10-07 00:07:49 -0700 | [diff] [blame] | 288 | uint32_t result[PAYLOAD_ARG_CNT] = {0}; |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 289 | uint32_t api_id; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 290 | |
| 291 | /* Handle case where PM wasn't initialized properly */ |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 292 | if (pm_up == 0) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 293 | SMC_RET1(handle, SMC_UNK); |
| 294 | |
| 295 | pm_arg[0] = (uint32_t)x1; |
| 296 | pm_arg[1] = (uint32_t)(x1 >> 32); |
| 297 | pm_arg[2] = (uint32_t)x2; |
| 298 | pm_arg[3] = (uint32_t)(x2 >> 32); |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 299 | pm_arg[4] = (uint32_t)x3; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 300 | |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 301 | api_id = smc_fid & FUNCID_NUM_MASK; |
| 302 | |
| 303 | switch (api_id) { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 304 | /* PM API Functions */ |
| 305 | case PM_SELF_SUSPEND: |
| 306 | ret = pm_self_suspend(pm_arg[0], pm_arg[1], pm_arg[2], |
| 307 | pm_arg[3]); |
| 308 | SMC_RET1(handle, (uint64_t)ret); |
| 309 | |
| 310 | case PM_REQ_SUSPEND: |
| 311 | ret = pm_req_suspend(pm_arg[0], pm_arg[1], pm_arg[2], |
| 312 | pm_arg[3]); |
| 313 | SMC_RET1(handle, (uint64_t)ret); |
| 314 | |
| 315 | case PM_REQ_WAKEUP: |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 316 | { |
| 317 | /* Use address flag is encoded in the 1st bit of the low-word */ |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 318 | uint32_t set_addr = pm_arg[1] & 0x1U; |
| 319 | uint64_t address = (uint64_t)pm_arg[2] << 32U; |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 320 | |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 321 | address |= pm_arg[1] & (~0x1U); |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 322 | ret = pm_req_wakeup(pm_arg[0], set_addr, address, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 323 | pm_arg[3]); |
| 324 | SMC_RET1(handle, (uint64_t)ret); |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 325 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 326 | |
| 327 | case PM_FORCE_POWERDOWN: |
| 328 | ret = pm_force_powerdown(pm_arg[0], pm_arg[1]); |
| 329 | SMC_RET1(handle, (uint64_t)ret); |
| 330 | |
| 331 | case PM_ABORT_SUSPEND: |
| 332 | ret = pm_abort_suspend(pm_arg[0]); |
| 333 | SMC_RET1(handle, (uint64_t)ret); |
| 334 | |
| 335 | case PM_SET_WAKEUP_SOURCE: |
| 336 | ret = pm_set_wakeup_source(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 337 | SMC_RET1(handle, (uint64_t)ret); |
| 338 | |
| 339 | case PM_SYSTEM_SHUTDOWN: |
Soren Brinkmann | 58fbb9b | 2016-09-02 09:50:54 -0700 | [diff] [blame] | 340 | ret = pm_system_shutdown(pm_arg[0], pm_arg[1]); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 341 | SMC_RET1(handle, (uint64_t)ret); |
| 342 | |
| 343 | case PM_REQ_NODE: |
| 344 | ret = pm_req_node(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 345 | SMC_RET1(handle, (uint64_t)ret); |
| 346 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 347 | case PM_SET_REQUIREMENT: |
| 348 | ret = pm_set_requirement(pm_arg[0], pm_arg[1], pm_arg[2], |
| 349 | pm_arg[3]); |
| 350 | SMC_RET1(handle, (uint64_t)ret); |
| 351 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 352 | case PM_GET_API_VERSION: |
Boyan Karatotev | b3d2b4f | 2022-11-22 12:13:44 +0000 | [diff] [blame] | 353 | if (ipi_irq_flag == 0U) { |
| 354 | /* |
| 355 | * Enable IPI IRQ |
| 356 | * assume the rich OS is OK to handle callback IRQs now. |
| 357 | * Even if we were wrong, it would not enable the IRQ in |
| 358 | * the GIC. |
| 359 | */ |
| 360 | pm_ipi_irq_enable(primary_proc); |
| 361 | ipi_irq_flag = 1U; |
Soren Brinkmann | a1b0a90 | 2016-09-30 11:30:21 -0700 | [diff] [blame] | 362 | } |
Boyan Karatotev | b3d2b4f | 2022-11-22 12:13:44 +0000 | [diff] [blame] | 363 | SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
| 364 | ((uint64_t)pm_ctx.api_version << 32)); |
Nava kishore Manne | 68d460c | 2016-08-20 23:18:09 +0530 | [diff] [blame] | 365 | case PM_FPGA_LOAD: |
| 366 | ret = pm_fpga_load(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 367 | SMC_RET1(handle, (uint64_t)ret); |
| 368 | |
| 369 | case PM_FPGA_GET_STATUS: |
| 370 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 371 | uint32_t value = 0U; |
Nava kishore Manne | 68d460c | 2016-08-20 23:18:09 +0530 | [diff] [blame] | 372 | |
| 373 | ret = pm_fpga_get_status(&value); |
| 374 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 375 | } |
| 376 | |
Siva Durga Prasad Paladugu | de93d98 | 2018-04-30 15:49:27 +0530 | [diff] [blame] | 377 | case PM_SECURE_RSA_AES: |
| 378 | ret = pm_secure_rsaaes(pm_arg[0], pm_arg[1], pm_arg[2], |
| 379 | pm_arg[3]); |
| 380 | SMC_RET1(handle, (uint64_t)ret); |
| 381 | |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 382 | case PM_GET_CALLBACK_DATA: |
Naman Trivedi Manojbhai | beec83f | 2023-03-07 12:41:12 +0530 | [diff] [blame] | 383 | ret = pm_get_callbackdata(result, ARRAY_SIZE(result)); |
| 384 | if (ret != PM_RET_SUCCESS) { |
| 385 | result[0] = ret; |
| 386 | } |
| 387 | |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 388 | SMC_RET2(handle, |
| 389 | (uint64_t)result[0] | ((uint64_t)result[1] << 32), |
| 390 | (uint64_t)result[2] | ((uint64_t)result[3] << 32)); |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 391 | case PM_IOCTL: |
| 392 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 393 | uint32_t value = 0U; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 394 | |
| 395 | ret = pm_ioctl(pm_arg[0], pm_arg[1], pm_arg[2], |
| 396 | pm_arg[3], &value); |
| 397 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 398 | } |
| 399 | |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 400 | case PM_QUERY_DATA: |
| 401 | { |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 402 | uint32_t data[4] = { 0 }; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 403 | |
Rajan Vaja | cd82568 | 2020-11-23 21:33:39 -0800 | [diff] [blame] | 404 | pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2], |
| 405 | pm_arg[3], data); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 406 | SMC_RET2(handle, (uint64_t)data[0] | ((uint64_t)data[1] << 32), |
| 407 | (uint64_t)data[2] | ((uint64_t)data[3] << 32)); |
| 408 | } |
| 409 | |
| 410 | case PM_CLOCK_ENABLE: |
| 411 | ret = pm_clock_enable(pm_arg[0]); |
| 412 | SMC_RET1(handle, (uint64_t)ret); |
| 413 | |
| 414 | case PM_CLOCK_DISABLE: |
| 415 | ret = pm_clock_disable(pm_arg[0]); |
| 416 | SMC_RET1(handle, (uint64_t)ret); |
| 417 | |
| 418 | case PM_CLOCK_GETSTATE: |
| 419 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 420 | uint32_t value = 0U; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 421 | |
| 422 | ret = pm_clock_getstate(pm_arg[0], &value); |
| 423 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 424 | } |
| 425 | |
| 426 | case PM_CLOCK_SETDIVIDER: |
| 427 | ret = pm_clock_setdivider(pm_arg[0], pm_arg[1]); |
| 428 | SMC_RET1(handle, (uint64_t)ret); |
| 429 | |
| 430 | case PM_CLOCK_GETDIVIDER: |
| 431 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 432 | uint32_t value = 0U; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 433 | |
| 434 | ret = pm_clock_getdivider(pm_arg[0], &value); |
| 435 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 436 | } |
| 437 | |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 438 | case PM_CLOCK_SETPARENT: |
| 439 | ret = pm_clock_setparent(pm_arg[0], pm_arg[1]); |
| 440 | SMC_RET1(handle, (uint64_t)ret); |
| 441 | |
| 442 | case PM_CLOCK_GETPARENT: |
| 443 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 444 | uint32_t value = 0U; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 445 | |
| 446 | ret = pm_clock_getparent(pm_arg[0], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 447 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 448 | } |
| 449 | |
Rajan Vaja | c7ee23d | 2018-02-14 23:10:54 -0800 | [diff] [blame] | 450 | case PM_GET_TRUSTZONE_VERSION: |
| 451 | SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 452 | ((uint64_t)ZYNQMP_TZ_VERSION << 32U)); |
Rajan Vaja | c7ee23d | 2018-02-14 23:10:54 -0800 | [diff] [blame] | 453 | |
Siva Durga Prasad Paladugu | 43b23a3 | 2018-04-27 16:26:47 +0530 | [diff] [blame] | 454 | case PM_SET_SUSPEND_MODE: |
| 455 | ret = pm_set_suspend_mode(pm_arg[0]); |
| 456 | SMC_RET1(handle, (uint64_t)ret); |
| 457 | |
Siva Durga Prasad Paladugu | f3994cc | 2018-05-01 11:12:55 +0530 | [diff] [blame] | 458 | case PM_SECURE_SHA: |
| 459 | ret = pm_sha_hash(pm_arg[0], pm_arg[1], pm_arg[2], |
| 460 | pm_arg[3]); |
| 461 | SMC_RET1(handle, (uint64_t)ret); |
| 462 | |
| 463 | case PM_SECURE_RSA: |
| 464 | ret = pm_rsa_core(pm_arg[0], pm_arg[1], pm_arg[2], |
| 465 | pm_arg[3]); |
| 466 | SMC_RET1(handle, (uint64_t)ret); |
| 467 | |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 468 | case PM_SECURE_IMAGE: |
| 469 | { |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 470 | ret = pm_secure_image(pm_arg[0], pm_arg[1], pm_arg[2], |
| 471 | pm_arg[3], &result[0]); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 472 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U), |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 473 | result[1]); |
| 474 | } |
| 475 | |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 476 | case PM_FPGA_READ: |
| 477 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 478 | uint32_t value = 0U; |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 479 | |
| 480 | ret = pm_fpga_read(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3], |
| 481 | &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 482 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 483 | } |
| 484 | |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 485 | case PM_SECURE_AES: |
| 486 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 487 | uint32_t value = 0U; |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 488 | |
| 489 | ret = pm_aes_engine(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 490 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 491 | } |
| 492 | |
Jolly Shah | a7cc5ee | 2019-01-02 12:27:00 -0800 | [diff] [blame] | 493 | case PM_PLL_SET_PARAMETER: |
| 494 | ret = pm_pll_set_parameter(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 495 | SMC_RET1(handle, (uint64_t)ret); |
| 496 | |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 497 | case PM_PLL_GET_PARAMETER: |
| 498 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 499 | uint32_t value = 0U; |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 500 | |
| 501 | ret = pm_pll_get_parameter(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 502 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value << 32U)); |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 503 | } |
| 504 | |
Jolly Shah | 1f0d585 | 2019-01-04 11:32:31 -0800 | [diff] [blame] | 505 | case PM_PLL_SET_MODE: |
| 506 | ret = pm_pll_set_mode(pm_arg[0], pm_arg[1]); |
| 507 | SMC_RET1(handle, (uint64_t)ret); |
| 508 | |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 509 | case PM_PLL_GET_MODE: |
| 510 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 511 | uint32_t mode = 0U; |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 512 | |
| 513 | ret = pm_pll_get_mode(pm_arg[0], &mode); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 514 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)mode << 32U)); |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 515 | } |
| 516 | |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 517 | case PM_REGISTER_ACCESS: |
| 518 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 519 | uint32_t value = 0U; |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 520 | |
| 521 | ret = pm_register_access(pm_arg[0], pm_arg[1], pm_arg[2], |
| 522 | pm_arg[3], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 523 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 524 | } |
| 525 | |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 526 | case PM_EFUSE_ACCESS: |
| 527 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 528 | uint32_t value = 0U; |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 529 | |
Vesa Jääskeläinen | 28f9ce5 | 2022-04-29 08:47:24 +0300 | [diff] [blame] | 530 | #if defined(ZYNQMP_SECURE_EFUSES) |
| 531 | if (is_caller_non_secure(flags)) { |
| 532 | SMC_RET1(handle, |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 533 | (((uint64_t)PM_RET_ERROR_NOT_ENABLED) << 32U) | |
Vesa Jääskeläinen | 28f9ce5 | 2022-04-29 08:47:24 +0300 | [diff] [blame] | 534 | (uint64_t)PM_RET_ERROR_ACCESS); |
| 535 | } |
| 536 | #endif |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 537 | ret = pm_efuse_access(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 538 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 539 | } |
| 540 | |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 541 | case PM_FPGA_GET_VERSION: |
| 542 | case PM_FPGA_GET_FEATURE_LIST: |
| 543 | { |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 544 | uint32_t ret_payload[PAYLOAD_ARG_CNT]; |
| 545 | |
| 546 | PM_PACK_PAYLOAD5(payload, smc_fid & FUNCID_NUM_MASK, |
| 547 | pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 548 | ret = pm_ipi_send_sync(primary_proc, payload, ret_payload, 3U); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 549 | SMC_RET2(handle, (uint64_t)ret | (uint64_t)ret_payload[0] << 32U, |
| 550 | (uint64_t)ret_payload[1] | (uint64_t)ret_payload[2] << 32U); |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 551 | } |
| 552 | |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 553 | case PM_FEATURE_CHECK: |
| 554 | { |
Ronak Jain | f841467 | 2022-05-11 02:48:52 -0700 | [diff] [blame] | 555 | uint32_t version = 0; |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 556 | uint32_t bit_mask[2] = {0}; |
| 557 | |
| 558 | ret = pm_feature_check(pm_arg[0], &version, bit_mask, |
| 559 | ARRAY_SIZE(bit_mask)); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 560 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)version << 32U), |
| 561 | (uint64_t)bit_mask[0] | ((uint64_t)bit_mask[1] << 32U)); |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 562 | } |
| 563 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 564 | default: |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 565 | /* Send request to the PMU */ |
| 566 | PM_PACK_PAYLOAD6(payload, api_id, pm_arg[0], pm_arg[1], |
| 567 | pm_arg[2], pm_arg[3], pm_arg[4]); |
| 568 | ret = pm_ipi_send_sync(primary_proc, payload, result, |
| 569 | PAYLOAD_ARG_CNT); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 570 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U), |
| 571 | (uint64_t)result[1] | ((uint64_t)result[2] << 32U)); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 572 | } |
| 573 | } |