fix(zynqmp): ensure memory write finish with dsb()

GICD reg write must complete before core goes to idle
mode. Achieve this with dsb() barrier instruction in IPI
ISR

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Change-Id: I5af42ca901567ee5e54a5434ebe3e673a92cb9be
1 file changed