commit | 50702bab694368a97ef28df632f6e893970017a9 | [log] [tgz] |
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author | Tanmay Shah <tanmay.shah@amd.com> | Tue Sep 13 11:10:08 2022 -0700 |
committer | Tanmay Shah <tanmay.shah@amd.com> | Tue Sep 13 11:19:01 2022 -0700 |
tree | 9d27bc7c674ed4453541136c30168a6131f526f2 | |
parent | 927ddb062a98248504d69df9a253992f76051f3f [diff] |
fix(zynqmp): ensure memory write finish with dsb() GICD reg write must complete before core goes to idle mode. Achieve this with dsb() barrier instruction in IPI ISR Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> Change-Id: I5af42ca901567ee5e54a5434ebe3e673a92cb9be