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Haojian Zhuang5f281b32017-05-24 08:45:05 +08001#
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06002# Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
Haojian Zhuang5f281b32017-05-24 08:45:05 +08003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Haojian Zhuangb755da32018-01-25 16:10:14 +08007# Non-TF Boot ROM
Arvind Ram Prakash11b9b492022-11-22 14:41:00 -06008RESET_TO_BL2 := 1
Haojian Zhuangb755da32018-01-25 16:10:14 +08009
Victor Chongb9a8db22017-05-28 00:14:25 +090010# On Hikey, the TSP can execute from TZC secure area in DRAM (default)
11# or SRAM.
Victor Chong4d64c2b2018-02-01 00:37:49 +090012HIKEY_TSP_RAM_LOCATION ?= dram
Victor Chongb9a8db22017-05-28 00:14:25 +090013ifeq (${HIKEY_TSP_RAM_LOCATION}, dram)
14 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID
15else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram)
Victor Chong4d64c2b2018-02-01 00:37:49 +090016 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID
Victor Chongb9a8db22017-05-28 00:14:25 +090017else
18 $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value")
19endif
20
Haojian Zhuang5f281b32017-05-24 08:45:05 +080021CONSOLE_BASE := PL011_UART3_BASE
22CRASH_CONSOLE_BASE := PL011_UART3_BASE
Haojian Zhuang934ae712017-05-24 08:47:49 +080023PLAT_PARTITION_MAX_ENTRIES := 12
Haojian Zhuang5f281b32017-05-24 08:45:05 +080024PLAT_PL061_MAX_GPIOS := 160
25COLD_BOOT_SINGLE_CPU := 1
26PROGRAMMABLE_RESET_ADDRESS := 1
David Cunadoc5b0c0f2017-10-31 23:19:21 +000027ENABLE_SVE_FOR_NS := 0
Haojian Zhuang5f281b32017-05-24 08:45:05 +080028
29# Process flags
Victor Chongb9a8db22017-05-28 00:14:25 +090030$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID))
Haojian Zhuang5f281b32017-05-24 08:45:05 +080031$(eval $(call add_define,CONSOLE_BASE))
32$(eval $(call add_define,CRASH_CONSOLE_BASE))
33$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
Haojian Zhuang934ae712017-05-24 08:47:49 +080034$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES))
Haojian Zhuang5f281b32017-05-24 08:45:05 +080035
Victor Chong7d787f52017-08-16 13:53:56 +090036# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
37# in the FIP if the platform requires.
38ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090039$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Victor Chong7d787f52017-08-16 13:53:56 +090040endif
41ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090042$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Victor Chong7d787f52017-08-16 13:53:56 +090043endif
44
Haojian Zhuang5f281b32017-05-24 08:45:05 +080045USE_COHERENT_MEM := 1
46
Antonio Nino Diaz50a4d1a2019-02-01 12:22:22 +000047PLAT_INCLUDES := -Iplat/hisilicon/hikey/include
Haojian Zhuang5f281b32017-05-24 08:45:05 +080048
Antonio Nino Diaz42c7bbd2018-09-24 17:15:05 +010049PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \
50 lib/xlat_tables/aarch64/xlat_tables.c \
51 lib/xlat_tables/xlat_tables_common.c \
Haojian Zhuang5f281b32017-05-24 08:45:05 +080052 plat/hisilicon/hikey/aarch64/hikey_common.c
53
54BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \
55 drivers/arm/pl061/pl061_gpio.c \
56 drivers/arm/sp804/sp804_delay_timer.c \
57 drivers/delay_timer/delay_timer.c \
58 drivers/gpio/gpio.c \
59 drivers/io/io_block.c \
60 drivers/io/io_fip.c \
61 drivers/io/io_storage.c \
Haojian Zhuange9713772018-08-04 18:07:10 +080062 drivers/mmc/mmc.c \
Haojian Zhuang5f281b32017-05-24 08:45:05 +080063 drivers/synopsys/emmc/dw_mmc.c \
64 lib/cpus/aarch64/cortex_a53.S \
65 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
66 plat/hisilicon/hikey/hikey_bl1_setup.c \
Haojian Zhuang590188a2018-03-05 13:03:53 +080067 plat/hisilicon/hikey/hikey_bl_common.c \
Haojian Zhuang5f281b32017-05-24 08:45:05 +080068 plat/hisilicon/hikey/hikey_io_storage.c
Haojian Zhuang934ae712017-05-24 08:47:49 +080069
Haojian Zhuang3bd94382018-01-28 23:33:02 +080070BL2_SOURCES += common/desc_image_load.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080071 drivers/arm/pl061/pl061_gpio.c \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080072 drivers/arm/sp804/sp804_delay_timer.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080073 drivers/delay_timer/delay_timer.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080074 drivers/gpio/gpio.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080075 drivers/io/io_block.c \
76 drivers/io/io_fip.c \
77 drivers/io/io_storage.c \
Haojian Zhuange9713772018-08-04 18:07:10 +080078 drivers/mmc/mmc.c \
Haojian Zhuang53e70df2019-09-14 19:18:01 +080079 drivers/partition/gpt.c \
80 drivers/partition/partition.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080081 drivers/synopsys/emmc/dw_mmc.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080082 lib/cpus/aarch64/cortex_a53.S \
Haojian Zhuang934ae712017-05-24 08:47:49 +080083 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080084 plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080085 plat/hisilicon/hikey/hikey_bl2_setup.c \
Haojian Zhuang590188a2018-03-05 13:03:53 +080086 plat/hisilicon/hikey/hikey_bl_common.c \
Jerome Forissierc52e55f2015-05-04 09:40:03 +020087 plat/hisilicon/hikey/hikey_security.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080088 plat/hisilicon/hikey/hikey_ddr.c \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080089 plat/hisilicon/hikey/hikey_image_load.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080090 plat/hisilicon/hikey/hikey_io_storage.c \
91 plat/hisilicon/hikey/hisi_dvfs.c \
92 plat/hisilicon/hikey/hisi_mcu.c
Haojian Zhuang3846f142017-05-24 08:49:26 +080093
Victor Chong7d787f52017-08-16 13:53:56 +090094ifeq (${SPD},opteed)
95BL2_SOURCES += lib/optee/optee_utils.c
96endif
Victor Chong2d9a42d2017-08-17 15:21:10 +090097
Rohit Nerb9bed282022-05-11 03:06:07 -070098include lib/zlib/zlib.mk
99PLAT_INCLUDES += -Ilib/zlib
100BL2_SOURCES += $(ZLIB_SOURCES)
101
Haojian Zhuang3846f142017-05-24 08:49:26 +0800102HIKEY_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
103 drivers/arm/gic/v2/gicv2_main.c \
104 drivers/arm/gic/v2/gicv2_helpers.c \
105 plat/common/plat_gicv2.c
106
107BL31_SOURCES += drivers/arm/cci/cci.c \
Leo Yand5e2d1a2017-05-27 13:17:45 +0800108 drivers/arm/sp804/sp804_delay_timer.c \
109 drivers/delay_timer/delay_timer.c \
Haojian Zhuang3846f142017-05-24 08:49:26 +0800110 lib/cpus/aarch64/cortex_a53.S \
Antonio Nino Diaz42c7bbd2018-09-24 17:15:05 +0100111 plat/common/plat_psci_common.c \
Haojian Zhuang3846f142017-05-24 08:49:26 +0800112 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
113 plat/hisilicon/hikey/hikey_bl31_setup.c \
114 plat/hisilicon/hikey/hikey_pm.c \
115 plat/hisilicon/hikey/hikey_topology.c \
116 plat/hisilicon/hikey/hisi_ipc.c \
117 plat/hisilicon/hikey/hisi_pwrc.c \
118 plat/hisilicon/hikey/hisi_pwrc_sram.S \
119 ${HIKEY_GIC_SOURCES}
Vincent Guittot492acec2017-06-07 10:12:05 +0200120ifeq (${ENABLE_PMF}, 1)
121BL31_SOURCES += plat/hisilicon/hikey/hisi_sip_svc.c \
122 lib/pmf/pmf_smc.c
123endif
124
Teddy Reed349cf892018-06-22 22:23:36 -0400125ifneq (${TRUSTED_BOARD_BOOT},0)
126
127include drivers/auth/mbedtls/mbedtls_crypto.mk
128include drivers/auth/mbedtls/mbedtls_x509.mk
129
Teddy Reed349cf892018-06-22 22:23:36 -0400130AUTH_SOURCES := drivers/auth/auth_mod.c \
131 drivers/auth/crypto_mod.c \
132 drivers/auth/img_parser_mod.c \
Manish V Badarkhe043fd622020-05-16 16:36:39 +0100133 drivers/auth/tbbr/tbbr_cot_common.c
Teddy Reed349cf892018-06-22 22:23:36 -0400134
Haojian Zhuangc104f192018-07-18 17:07:00 +0800135BL1_SOURCES += ${AUTH_SOURCES} \
136 plat/common/tbbr/plat_tbbr.c \
137 plat/hisilicon/hikey/hikey_tbbr.c \
Manish V Badarkhe043fd622020-05-16 16:36:39 +0100138 plat/hisilicon/hikey/hikey_rotpk.S \
139 drivers/auth/tbbr/tbbr_cot_bl1.c
Haojian Zhuangc104f192018-07-18 17:07:00 +0800140
Teddy Reed349cf892018-06-22 22:23:36 -0400141BL2_SOURCES += ${AUTH_SOURCES} \
142 plat/common/tbbr/plat_tbbr.c \
143 plat/hisilicon/hikey/hikey_tbbr.c \
Manish V Badarkhe043fd622020-05-16 16:36:39 +0100144 plat/hisilicon/hikey/hikey_rotpk.S \
145 drivers/auth/tbbr/tbbr_cot_bl2.c
Teddy Reed349cf892018-06-22 22:23:36 -0400146
147ROT_KEY = $(BUILD_PLAT)/rot_key.pem
148ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin
149
150$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
Haojian Zhuangc104f192018-07-18 17:07:00 +0800151$(BUILD_PLAT)/bl1/hikey_rotpk.o: $(ROTPK_HASH)
Teddy Reed349cf892018-06-22 22:23:36 -0400152$(BUILD_PLAT)/bl2/hikey_rotpk.o: $(ROTPK_HASH)
153
154certificates: $(ROT_KEY)
155$(ROT_KEY): | $(BUILD_PLAT)
156 @echo " OPENSSL $@"
Salome Thirot0b35da32022-07-14 16:14:15 +0100157 $(Q)${OPENSSL_BIN_PATH}/openssl genrsa 2048 > $@ 2>/dev/null
Teddy Reed349cf892018-06-22 22:23:36 -0400158
159$(ROTPK_HASH): $(ROT_KEY)
160 @echo " OPENSSL $@"
Salome Thirot0b35da32022-07-14 16:14:15 +0100161 $(Q)${OPENSSL_BIN_PATH}/openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
162 ${OPENSSL_BIN_PATH}/openssl dgst -sha256 -binary > $@ 2>/dev/null
Teddy Reed349cf892018-06-22 22:23:36 -0400163endif
164
Haojian Zhuang66430832017-06-30 16:21:54 +0800165# Enable workarounds for selected Cortex-A53 errata.
166ERRATA_A53_836870 := 1
167ERRATA_A53_843419 := 1
168ERRATA_A53_855873 := 1
Leo Yan75c83832017-11-22 17:07:09 +0800169
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +0000170WORKAROUND_CVE_2017_5715 := 0
171
Leo Yan75c83832017-11-22 17:07:09 +0800172FIP_ALIGN := 512