blob: c8e760d3f7b0f8379b0d92afd41cabd7b5d10661 [file] [log] [blame]
Haojian Zhuang5f281b32017-05-24 08:45:05 +08001#
Masahiro Yamada4d156802018-01-26 11:42:01 +09002# Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
Haojian Zhuang5f281b32017-05-24 08:45:05 +08003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Haojian Zhuangb755da32018-01-25 16:10:14 +08007# Non-TF Boot ROM
8BL2_AT_EL3 := 1
9
Victor Chongb9a8db22017-05-28 00:14:25 +090010# On Hikey, the TSP can execute from TZC secure area in DRAM (default)
11# or SRAM.
Victor Chong4d64c2b2018-02-01 00:37:49 +090012HIKEY_TSP_RAM_LOCATION ?= dram
Victor Chongb9a8db22017-05-28 00:14:25 +090013ifeq (${HIKEY_TSP_RAM_LOCATION}, dram)
14 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID
15else ifeq (${HIKEY_TSP_RAM_LOCATION}, sram)
Victor Chong4d64c2b2018-02-01 00:37:49 +090016 HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID
Victor Chongb9a8db22017-05-28 00:14:25 +090017else
18 $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value")
19endif
20
Haojian Zhuang5f281b32017-05-24 08:45:05 +080021CONSOLE_BASE := PL011_UART3_BASE
22CRASH_CONSOLE_BASE := PL011_UART3_BASE
Haojian Zhuang934ae712017-05-24 08:47:49 +080023PLAT_PARTITION_MAX_ENTRIES := 12
Haojian Zhuang5f281b32017-05-24 08:45:05 +080024PLAT_PL061_MAX_GPIOS := 160
25COLD_BOOT_SINGLE_CPU := 1
26PROGRAMMABLE_RESET_ADDRESS := 1
David Cunadoc5b0c0f2017-10-31 23:19:21 +000027ENABLE_SVE_FOR_NS := 0
Haojian Zhuang5f281b32017-05-24 08:45:05 +080028
29# Process flags
Victor Chongb9a8db22017-05-28 00:14:25 +090030$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID))
Haojian Zhuang5f281b32017-05-24 08:45:05 +080031$(eval $(call add_define,CONSOLE_BASE))
32$(eval $(call add_define,CRASH_CONSOLE_BASE))
33$(eval $(call add_define,PLAT_PL061_MAX_GPIOS))
Haojian Zhuang934ae712017-05-24 08:47:49 +080034$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES))
Haojian Zhuang5f281b32017-05-24 08:45:05 +080035
Victor Chong7d787f52017-08-16 13:53:56 +090036# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images
37# in the FIP if the platform requires.
38ifneq ($(BL32_EXTRA1),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090039$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1))
Victor Chong7d787f52017-08-16 13:53:56 +090040endif
41ifneq ($(BL32_EXTRA2),)
Masahiro Yamada9c5ca522018-01-26 11:42:01 +090042$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2))
Victor Chong7d787f52017-08-16 13:53:56 +090043endif
44
Haojian Zhuang5f281b32017-05-24 08:45:05 +080045USE_COHERENT_MEM := 1
46
47PLAT_INCLUDES := -Iinclude/common/tbbr \
48 -Iinclude/drivers/synopsys \
49 -Iplat/hisilicon/hikey/include
50
Antonio Nino Diaz42c7bbd2018-09-24 17:15:05 +010051PLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \
52 lib/xlat_tables/aarch64/xlat_tables.c \
53 lib/xlat_tables/xlat_tables_common.c \
Haojian Zhuang5f281b32017-05-24 08:45:05 +080054 plat/hisilicon/hikey/aarch64/hikey_common.c
55
56BL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \
57 drivers/arm/pl061/pl061_gpio.c \
58 drivers/arm/sp804/sp804_delay_timer.c \
59 drivers/delay_timer/delay_timer.c \
60 drivers/gpio/gpio.c \
61 drivers/io/io_block.c \
62 drivers/io/io_fip.c \
63 drivers/io/io_storage.c \
Haojian Zhuange9713772018-08-04 18:07:10 +080064 drivers/mmc/mmc.c \
Haojian Zhuang5f281b32017-05-24 08:45:05 +080065 drivers/synopsys/emmc/dw_mmc.c \
66 lib/cpus/aarch64/cortex_a53.S \
67 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
68 plat/hisilicon/hikey/hikey_bl1_setup.c \
Haojian Zhuang590188a2018-03-05 13:03:53 +080069 plat/hisilicon/hikey/hikey_bl_common.c \
Haojian Zhuang5f281b32017-05-24 08:45:05 +080070 plat/hisilicon/hikey/hikey_io_storage.c
Haojian Zhuang934ae712017-05-24 08:47:49 +080071
Haojian Zhuang3bd94382018-01-28 23:33:02 +080072BL2_SOURCES += common/desc_image_load.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080073 drivers/arm/pl061/pl061_gpio.c \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080074 drivers/arm/sp804/sp804_delay_timer.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080075 drivers/delay_timer/delay_timer.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080076 drivers/gpio/gpio.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080077 drivers/io/io_block.c \
78 drivers/io/io_fip.c \
79 drivers/io/io_storage.c \
Haojian Zhuange9713772018-08-04 18:07:10 +080080 drivers/mmc/mmc.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080081 drivers/synopsys/emmc/dw_mmc.c \
Haojian Zhuangb755da32018-01-25 16:10:14 +080082 lib/cpus/aarch64/cortex_a53.S \
Haojian Zhuang934ae712017-05-24 08:47:49 +080083 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080084 plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080085 plat/hisilicon/hikey/hikey_bl2_setup.c \
Haojian Zhuang590188a2018-03-05 13:03:53 +080086 plat/hisilicon/hikey/hikey_bl_common.c \
Jerome Forissierc52e55f2015-05-04 09:40:03 +020087 plat/hisilicon/hikey/hikey_security.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080088 plat/hisilicon/hikey/hikey_ddr.c \
Haojian Zhuang3bd94382018-01-28 23:33:02 +080089 plat/hisilicon/hikey/hikey_image_load.c \
Haojian Zhuang934ae712017-05-24 08:47:49 +080090 plat/hisilicon/hikey/hikey_io_storage.c \
91 plat/hisilicon/hikey/hisi_dvfs.c \
92 plat/hisilicon/hikey/hisi_mcu.c
Haojian Zhuang3846f142017-05-24 08:49:26 +080093
Victor Chong7d787f52017-08-16 13:53:56 +090094ifeq (${SPD},opteed)
95BL2_SOURCES += lib/optee/optee_utils.c
96endif
Victor Chong2d9a42d2017-08-17 15:21:10 +090097
Haojian Zhuang3846f142017-05-24 08:49:26 +080098HIKEY_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \
99 drivers/arm/gic/v2/gicv2_main.c \
100 drivers/arm/gic/v2/gicv2_helpers.c \
101 plat/common/plat_gicv2.c
102
103BL31_SOURCES += drivers/arm/cci/cci.c \
Leo Yand5e2d1a2017-05-27 13:17:45 +0800104 drivers/arm/sp804/sp804_delay_timer.c \
105 drivers/delay_timer/delay_timer.c \
Haojian Zhuang3846f142017-05-24 08:49:26 +0800106 lib/cpus/aarch64/cortex_a53.S \
Antonio Nino Diaz42c7bbd2018-09-24 17:15:05 +0100107 plat/common/plat_psci_common.c \
Haojian Zhuang3846f142017-05-24 08:49:26 +0800108 plat/hisilicon/hikey/aarch64/hikey_helpers.S \
109 plat/hisilicon/hikey/hikey_bl31_setup.c \
110 plat/hisilicon/hikey/hikey_pm.c \
111 plat/hisilicon/hikey/hikey_topology.c \
112 plat/hisilicon/hikey/hisi_ipc.c \
113 plat/hisilicon/hikey/hisi_pwrc.c \
114 plat/hisilicon/hikey/hisi_pwrc_sram.S \
115 ${HIKEY_GIC_SOURCES}
Vincent Guittot492acec2017-06-07 10:12:05 +0200116ifeq (${ENABLE_PMF}, 1)
117BL31_SOURCES += plat/hisilicon/hikey/hisi_sip_svc.c \
118 lib/pmf/pmf_smc.c
119endif
120
Teddy Reed349cf892018-06-22 22:23:36 -0400121ifneq (${TRUSTED_BOARD_BOOT},0)
122
123include drivers/auth/mbedtls/mbedtls_crypto.mk
124include drivers/auth/mbedtls/mbedtls_x509.mk
125
Teddy Reed349cf892018-06-22 22:23:36 -0400126AUTH_SOURCES := drivers/auth/auth_mod.c \
127 drivers/auth/crypto_mod.c \
128 drivers/auth/img_parser_mod.c \
129 drivers/auth/tbbr/tbbr_cot.c
130
Haojian Zhuangc104f192018-07-18 17:07:00 +0800131BL1_SOURCES += ${AUTH_SOURCES} \
132 plat/common/tbbr/plat_tbbr.c \
133 plat/hisilicon/hikey/hikey_tbbr.c \
134 plat/hisilicon/hikey/hikey_rotpk.S
135
Teddy Reed349cf892018-06-22 22:23:36 -0400136BL2_SOURCES += ${AUTH_SOURCES} \
137 plat/common/tbbr/plat_tbbr.c \
138 plat/hisilicon/hikey/hikey_tbbr.c \
139 plat/hisilicon/hikey/hikey_rotpk.S
140
141ROT_KEY = $(BUILD_PLAT)/rot_key.pem
142ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin
143
144$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
Haojian Zhuangc104f192018-07-18 17:07:00 +0800145$(BUILD_PLAT)/bl1/hikey_rotpk.o: $(ROTPK_HASH)
Teddy Reed349cf892018-06-22 22:23:36 -0400146$(BUILD_PLAT)/bl2/hikey_rotpk.o: $(ROTPK_HASH)
147
148certificates: $(ROT_KEY)
149$(ROT_KEY): | $(BUILD_PLAT)
150 @echo " OPENSSL $@"
151 $(Q)openssl genrsa 2048 > $@ 2>/dev/null
152
153$(ROTPK_HASH): $(ROT_KEY)
154 @echo " OPENSSL $@"
155 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
156 openssl dgst -sha256 -binary > $@ 2>/dev/null
Teddy Reed349cf892018-06-22 22:23:36 -0400157endif
158
Haojian Zhuang66430832017-06-30 16:21:54 +0800159# Enable workarounds for selected Cortex-A53 errata.
160ERRATA_A53_836870 := 1
161ERRATA_A53_843419 := 1
162ERRATA_A53_855873 := 1
Leo Yan75c83832017-11-22 17:07:09 +0800163
Dimitris Papastamos8e5bd5e2018-01-24 16:41:14 +0000164WORKAROUND_CVE_2017_5715 := 0
165
Leo Yan75c83832017-11-22 17:07:09 +0800166FIP_ALIGN := 512