Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Antonio Nino Diaz | e40306b | 2017-01-13 15:03:07 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __ARCH_HELPERS_H__ |
| 8 | #define __ARCH_HELPERS_H__ |
| 9 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 10 | #include <arch.h> /* for additional register definitions */ |
| 11 | #include <cdefs.h> /* For __dead2 */ |
| 12 | #include <stdint.h> |
Antonio Nino Diaz | e40306b | 2017-01-13 15:03:07 +0000 | [diff] [blame] | 13 | #include <sys/types.h> |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 14 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 15 | /********************************************************************** |
| 16 | * Macros which create inline functions to read or write CPU system |
| 17 | * registers |
| 18 | *********************************************************************/ |
| 19 | |
Sandrine Bailleux | 30c231b | 2015-01-07 16:36:11 +0000 | [diff] [blame] | 20 | #define _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \ |
| 21 | static inline uint64_t read_ ## _name(void) \ |
| 22 | { \ |
| 23 | uint64_t v; \ |
| 24 | __asm__ volatile ("mrs %0, " #_reg_name : "=r" (v)); \ |
| 25 | return v; \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 26 | } |
| 27 | |
Sandrine Bailleux | 30c231b | 2015-01-07 16:36:11 +0000 | [diff] [blame] | 28 | #define _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) \ |
| 29 | static inline void write_ ## _name(uint64_t v) \ |
| 30 | { \ |
| 31 | __asm__ volatile ("msr " #_reg_name ", %0" : : "r" (v)); \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 32 | } |
| 33 | |
Roberto Vargas | c51cdb7 | 2017-09-18 09:53:25 +0100 | [diff] [blame] | 34 | #define SYSREG_WRITE_CONST(reg_name, v) \ |
| 35 | __asm__ volatile ("msr " #reg_name ", %0" : : "i" (v)) |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 36 | |
| 37 | /* Define read function for system register */ |
| 38 | #define DEFINE_SYSREG_READ_FUNC(_name) \ |
| 39 | _DEFINE_SYSREG_READ_FUNC(_name, _name) |
| 40 | |
| 41 | /* Define read & write function for system register */ |
| 42 | #define DEFINE_SYSREG_RW_FUNCS(_name) \ |
| 43 | _DEFINE_SYSREG_READ_FUNC(_name, _name) \ |
| 44 | _DEFINE_SYSREG_WRITE_FUNC(_name, _name) |
| 45 | |
| 46 | /* Define read & write function for renamed system register */ |
| 47 | #define DEFINE_RENAME_SYSREG_RW_FUNCS(_name, _reg_name) \ |
| 48 | _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \ |
| 49 | _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) |
| 50 | |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 51 | /* Define read function for renamed system register */ |
| 52 | #define DEFINE_RENAME_SYSREG_READ_FUNC(_name, _reg_name) \ |
| 53 | _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) |
| 54 | |
| 55 | /* Define write function for renamed system register */ |
| 56 | #define DEFINE_RENAME_SYSREG_WRITE_FUNC(_name, _reg_name) \ |
| 57 | _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) |
| 58 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 59 | /********************************************************************** |
| 60 | * Macros to create inline functions for system instructions |
| 61 | *********************************************************************/ |
| 62 | |
| 63 | /* Define function for simple system instruction */ |
| 64 | #define DEFINE_SYSOP_FUNC(_op) \ |
Juan Castillo | 2d55240 | 2014-06-13 17:05:10 +0100 | [diff] [blame] | 65 | static inline void _op(void) \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 66 | { \ |
| 67 | __asm__ (#_op); \ |
| 68 | } |
| 69 | |
| 70 | /* Define function for system instruction with type specifier */ |
| 71 | #define DEFINE_SYSOP_TYPE_FUNC(_op, _type) \ |
Juan Castillo | 2d55240 | 2014-06-13 17:05:10 +0100 | [diff] [blame] | 72 | static inline void _op ## _type(void) \ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 73 | { \ |
| 74 | __asm__ (#_op " " #_type); \ |
| 75 | } |
| 76 | |
| 77 | /* Define function for system instruction with register parameter */ |
| 78 | #define DEFINE_SYSOP_TYPE_PARAM_FUNC(_op, _type) \ |
| 79 | static inline void _op ## _type(uint64_t v) \ |
| 80 | { \ |
| 81 | __asm__ (#_op " " #_type ", %0" : : "r" (v)); \ |
| 82 | } |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 83 | |
| 84 | /******************************************************************************* |
| 85 | * TLB maintenance accessor prototypes |
| 86 | ******************************************************************************/ |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 87 | |
| 88 | #if ERRATA_A57_813419 |
| 89 | /* |
| 90 | * Define function for TLBI instruction with type specifier that implements |
| 91 | * the workaround for errata 813419 of Cortex-A57. |
| 92 | */ |
| 93 | #define DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(_type)\ |
| 94 | static inline void tlbi ## _type(void) \ |
| 95 | { \ |
| 96 | __asm__("tlbi " #_type "\n" \ |
| 97 | "dsb ish\n" \ |
| 98 | "tlbi " #_type); \ |
| 99 | } |
| 100 | |
| 101 | /* |
| 102 | * Define function for TLBI instruction with register parameter that implements |
| 103 | * the workaround for errata 813419 of Cortex-A57. |
| 104 | */ |
| 105 | #define DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(_type) \ |
| 106 | static inline void tlbi ## _type(uint64_t v) \ |
| 107 | { \ |
| 108 | __asm__("tlbi " #_type ", %0\n" \ |
| 109 | "dsb ish\n" \ |
| 110 | "tlbi " #_type ", %0" : : "r" (v)); \ |
| 111 | } |
| 112 | #endif /* ERRATA_A57_813419 */ |
| 113 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 114 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1) |
| 115 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is) |
| 116 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2) |
| 117 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is) |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 118 | #if ERRATA_A57_813419 |
| 119 | DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(alle3) |
| 120 | DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(alle3is) |
| 121 | #else |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 122 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3) |
| 123 | DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3is) |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 124 | #endif |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 125 | DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 126 | |
Antonio Nino Diaz | ac99803 | 2017-02-27 17:23:54 +0000 | [diff] [blame] | 127 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is) |
| 128 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is) |
| 129 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is) |
| 130 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is) |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 131 | #if ERRATA_A57_813419 |
| 132 | DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(vae3is) |
| 133 | DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(vale3is) |
| 134 | #else |
Antonio Nino Diaz | ac99803 | 2017-02-27 17:23:54 +0000 | [diff] [blame] | 135 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae3is) |
| 136 | DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale3is) |
Antonio Nino Diaz | 3f13c35 | 2017-02-24 11:39:22 +0000 | [diff] [blame] | 137 | #endif |
Antonio Nino Diaz | ac99803 | 2017-02-27 17:23:54 +0000 | [diff] [blame] | 138 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 139 | /******************************************************************************* |
| 140 | * Cache maintenance accessor prototypes |
| 141 | ******************************************************************************/ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 142 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, isw) |
| 143 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cisw) |
| 144 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, csw) |
| 145 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvac) |
| 146 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, ivac) |
| 147 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, civac) |
| 148 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvau) |
| 149 | DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, zva) |
| 150 | |
Varun Wadekar | 97625e3 | 2015-03-13 14:59:03 +0530 | [diff] [blame] | 151 | /******************************************************************************* |
| 152 | * Address translation accessor prototypes |
| 153 | ******************************************************************************/ |
| 154 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1r) |
| 155 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w) |
| 156 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r) |
| 157 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w) |
Jeenu Viswambharan | 1dc771b | 2017-10-19 09:15:15 +0100 | [diff] [blame] | 158 | DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s1e2r) |
Varun Wadekar | 97625e3 | 2015-03-13 14:59:03 +0530 | [diff] [blame] | 159 | |
Antonio Nino Diaz | e40306b | 2017-01-13 15:03:07 +0000 | [diff] [blame] | 160 | void flush_dcache_range(uintptr_t addr, size_t size); |
| 161 | void clean_dcache_range(uintptr_t addr, size_t size); |
| 162 | void inv_dcache_range(uintptr_t addr, size_t size); |
| 163 | |
| 164 | void dcsw_op_louis(u_register_t op_type); |
| 165 | void dcsw_op_all(u_register_t op_type); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 166 | |
Antonio Nino Diaz | 4613d5f | 2017-10-05 15:19:42 +0100 | [diff] [blame] | 167 | void disable_mmu_el1(void); |
Dan Handley | a17fefa | 2014-05-14 12:38:32 +0100 | [diff] [blame] | 168 | void disable_mmu_el3(void); |
Antonio Nino Diaz | 4613d5f | 2017-10-05 15:19:42 +0100 | [diff] [blame] | 169 | void disable_mmu_icache_el1(void); |
Dan Handley | a17fefa | 2014-05-14 12:38:32 +0100 | [diff] [blame] | 170 | void disable_mmu_icache_el3(void); |
Andrew Thoelke | 438c63a | 2014-04-28 12:06:18 +0100 | [diff] [blame] | 171 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 172 | /******************************************************************************* |
| 173 | * Misc. accessor prototypes |
| 174 | ******************************************************************************/ |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 175 | |
Roberto Vargas | c51cdb7 | 2017-09-18 09:53:25 +0100 | [diff] [blame] | 176 | #define write_daifclr(val) SYSREG_WRITE_CONST(daifclr, val) |
| 177 | #define write_daifset(val) SYSREG_WRITE_CONST(daifset, val) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 178 | |
Varun Wadekar | 97625e3 | 2015-03-13 14:59:03 +0530 | [diff] [blame] | 179 | DEFINE_SYSREG_READ_FUNC(par_el1) |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 180 | DEFINE_SYSREG_READ_FUNC(id_pfr1_el1) |
| 181 | DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1) |
dp-arm | ee3457b | 2017-05-23 09:32:49 +0100 | [diff] [blame] | 182 | DEFINE_SYSREG_READ_FUNC(id_aa64dfr0_el1) |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 183 | DEFINE_SYSREG_READ_FUNC(CurrentEl) |
| 184 | DEFINE_SYSREG_RW_FUNCS(daif) |
| 185 | DEFINE_SYSREG_RW_FUNCS(spsr_el1) |
| 186 | DEFINE_SYSREG_RW_FUNCS(spsr_el2) |
| 187 | DEFINE_SYSREG_RW_FUNCS(spsr_el3) |
| 188 | DEFINE_SYSREG_RW_FUNCS(elr_el1) |
| 189 | DEFINE_SYSREG_RW_FUNCS(elr_el2) |
| 190 | DEFINE_SYSREG_RW_FUNCS(elr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 191 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 192 | DEFINE_SYSOP_FUNC(wfi) |
| 193 | DEFINE_SYSOP_FUNC(wfe) |
| 194 | DEFINE_SYSOP_FUNC(sev) |
| 195 | DEFINE_SYSOP_TYPE_FUNC(dsb, sy) |
Soby Mathew | ed99566 | 2014-12-30 16:11:42 +0000 | [diff] [blame] | 196 | DEFINE_SYSOP_TYPE_FUNC(dmb, sy) |
Juan Castillo | 2e86cb1 | 2016-01-13 15:01:09 +0000 | [diff] [blame] | 197 | DEFINE_SYSOP_TYPE_FUNC(dmb, st) |
| 198 | DEFINE_SYSOP_TYPE_FUNC(dmb, ld) |
Soby Mathew | ed99566 | 2014-12-30 16:11:42 +0000 | [diff] [blame] | 199 | DEFINE_SYSOP_TYPE_FUNC(dsb, ish) |
Dimitris Papastamos | 5bdbb47 | 2017-10-13 12:06:06 +0100 | [diff] [blame] | 200 | DEFINE_SYSOP_TYPE_FUNC(dsb, nsh) |
Antonio Nino Diaz | ac99803 | 2017-02-27 17:23:54 +0000 | [diff] [blame] | 201 | DEFINE_SYSOP_TYPE_FUNC(dsb, ishst) |
Soby Mathew | ed99566 | 2014-12-30 16:11:42 +0000 | [diff] [blame] | 202 | DEFINE_SYSOP_TYPE_FUNC(dmb, ish) |
Jeenu Viswambharan | 6250507 | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 203 | DEFINE_SYSOP_TYPE_FUNC(dmb, ishst) |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 204 | DEFINE_SYSOP_FUNC(isb) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 205 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 206 | uint32_t get_afflvl_shift(uint32_t); |
| 207 | uint32_t mpidr_mask_lower_afflvls(uint64_t, uint32_t); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 208 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 209 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 210 | void __dead2 eret(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, |
| 211 | uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7); |
| 212 | void __dead2 smc(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3, |
| 213 | uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 214 | |
| 215 | /******************************************************************************* |
| 216 | * System register accessor prototypes |
| 217 | ******************************************************************************/ |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 218 | DEFINE_SYSREG_READ_FUNC(midr_el1) |
| 219 | DEFINE_SYSREG_READ_FUNC(mpidr_el1) |
Antonio Nino Diaz | d1beee2 | 2016-12-13 15:28:54 +0000 | [diff] [blame] | 220 | DEFINE_SYSREG_READ_FUNC(id_aa64mmfr0_el1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 221 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 222 | DEFINE_SYSREG_RW_FUNCS(scr_el3) |
| 223 | DEFINE_SYSREG_RW_FUNCS(hcr_el2) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 224 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 225 | DEFINE_SYSREG_RW_FUNCS(vbar_el1) |
| 226 | DEFINE_SYSREG_RW_FUNCS(vbar_el2) |
| 227 | DEFINE_SYSREG_RW_FUNCS(vbar_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 228 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 229 | DEFINE_SYSREG_RW_FUNCS(sctlr_el1) |
| 230 | DEFINE_SYSREG_RW_FUNCS(sctlr_el2) |
| 231 | DEFINE_SYSREG_RW_FUNCS(sctlr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 232 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 233 | DEFINE_SYSREG_RW_FUNCS(actlr_el1) |
| 234 | DEFINE_SYSREG_RW_FUNCS(actlr_el2) |
| 235 | DEFINE_SYSREG_RW_FUNCS(actlr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 236 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 237 | DEFINE_SYSREG_RW_FUNCS(esr_el1) |
| 238 | DEFINE_SYSREG_RW_FUNCS(esr_el2) |
| 239 | DEFINE_SYSREG_RW_FUNCS(esr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 240 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 241 | DEFINE_SYSREG_RW_FUNCS(afsr0_el1) |
| 242 | DEFINE_SYSREG_RW_FUNCS(afsr0_el2) |
| 243 | DEFINE_SYSREG_RW_FUNCS(afsr0_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 244 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 245 | DEFINE_SYSREG_RW_FUNCS(afsr1_el1) |
| 246 | DEFINE_SYSREG_RW_FUNCS(afsr1_el2) |
| 247 | DEFINE_SYSREG_RW_FUNCS(afsr1_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 248 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 249 | DEFINE_SYSREG_RW_FUNCS(far_el1) |
| 250 | DEFINE_SYSREG_RW_FUNCS(far_el2) |
| 251 | DEFINE_SYSREG_RW_FUNCS(far_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 252 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 253 | DEFINE_SYSREG_RW_FUNCS(mair_el1) |
| 254 | DEFINE_SYSREG_RW_FUNCS(mair_el2) |
| 255 | DEFINE_SYSREG_RW_FUNCS(mair_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 256 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 257 | DEFINE_SYSREG_RW_FUNCS(amair_el1) |
| 258 | DEFINE_SYSREG_RW_FUNCS(amair_el2) |
| 259 | DEFINE_SYSREG_RW_FUNCS(amair_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 260 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 261 | DEFINE_SYSREG_READ_FUNC(rvbar_el1) |
| 262 | DEFINE_SYSREG_READ_FUNC(rvbar_el2) |
| 263 | DEFINE_SYSREG_READ_FUNC(rvbar_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 264 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 265 | DEFINE_SYSREG_RW_FUNCS(rmr_el1) |
| 266 | DEFINE_SYSREG_RW_FUNCS(rmr_el2) |
| 267 | DEFINE_SYSREG_RW_FUNCS(rmr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 268 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 269 | DEFINE_SYSREG_RW_FUNCS(tcr_el1) |
| 270 | DEFINE_SYSREG_RW_FUNCS(tcr_el2) |
| 271 | DEFINE_SYSREG_RW_FUNCS(tcr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 272 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 273 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el1) |
| 274 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el2) |
| 275 | DEFINE_SYSREG_RW_FUNCS(ttbr0_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 276 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 277 | DEFINE_SYSREG_RW_FUNCS(ttbr1_el1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 278 | |
Sandrine Bailleux | 8b0eafe | 2015-11-25 17:00:44 +0000 | [diff] [blame] | 279 | DEFINE_SYSREG_RW_FUNCS(vttbr_el2) |
| 280 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 281 | DEFINE_SYSREG_RW_FUNCS(cptr_el2) |
| 282 | DEFINE_SYSREG_RW_FUNCS(cptr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 283 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 284 | DEFINE_SYSREG_RW_FUNCS(cpacr_el1) |
| 285 | DEFINE_SYSREG_RW_FUNCS(cntfrq_el0) |
| 286 | DEFINE_SYSREG_RW_FUNCS(cntps_ctl_el1) |
| 287 | DEFINE_SYSREG_RW_FUNCS(cntps_tval_el1) |
| 288 | DEFINE_SYSREG_RW_FUNCS(cntps_cval_el1) |
| 289 | DEFINE_SYSREG_READ_FUNC(cntpct_el0) |
| 290 | DEFINE_SYSREG_RW_FUNCS(cnthctl_el2) |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 291 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 292 | DEFINE_SYSREG_RW_FUNCS(tpidr_el3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 293 | |
Soby Mathew | feddfcf | 2014-08-29 14:41:58 +0100 | [diff] [blame] | 294 | DEFINE_SYSREG_RW_FUNCS(cntvoff_el2) |
| 295 | |
Andrew Thoelke | 4e12607 | 2014-06-04 21:10:52 +0100 | [diff] [blame] | 296 | DEFINE_SYSREG_RW_FUNCS(vpidr_el2) |
| 297 | DEFINE_SYSREG_RW_FUNCS(vmpidr_el2) |
developer | 550bf5e | 2016-07-11 16:05:23 +0800 | [diff] [blame] | 298 | DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el0) |
Andrew Thoelke | 4e12607 | 2014-06-04 21:10:52 +0100 | [diff] [blame] | 299 | |
Soby Mathew | 26fb90e | 2015-01-06 21:36:55 +0000 | [diff] [blame] | 300 | DEFINE_SYSREG_READ_FUNC(isr_el1) |
| 301 | |
Dan Handley | 0cdebbd | 2015-03-30 17:15:16 +0100 | [diff] [blame] | 302 | DEFINE_SYSREG_READ_FUNC(ctr_el0) |
| 303 | |
David Cunado | 5f55e28 | 2016-10-31 17:37:34 +0000 | [diff] [blame] | 304 | DEFINE_SYSREG_RW_FUNCS(mdcr_el2) |
Dimitris Papastamos | 5bdbb47 | 2017-10-13 12:06:06 +0100 | [diff] [blame] | 305 | DEFINE_SYSREG_RW_FUNCS(mdcr_el3) |
David Cunado | c14b08e | 2016-11-25 00:21:59 +0000 | [diff] [blame] | 306 | DEFINE_SYSREG_RW_FUNCS(hstr_el2) |
| 307 | DEFINE_SYSREG_RW_FUNCS(cnthp_ctl_el2) |
David Cunado | 4168f2f | 2017-10-02 17:41:39 +0100 | [diff] [blame] | 308 | DEFINE_SYSREG_RW_FUNCS(pmcr_el0) |
David Cunado | 5f55e28 | 2016-10-31 17:37:34 +0000 | [diff] [blame] | 309 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 310 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el1, ICC_SRE_EL1) |
| 311 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2) |
| 312 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el3, ICC_SRE_EL3) |
| 313 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_pmr_el1, ICC_PMR_EL1) |
Jeenu Viswambharan | b1e957e | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 314 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_rpr_el1, ICC_RPR_EL1) |
Achin Gupta | 92712a5 | 2015-09-03 14:18:02 +0100 | [diff] [blame] | 315 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_igrpen1_el3, ICC_IGRPEN1_EL3) |
| 316 | DEFINE_RENAME_SYSREG_RW_FUNCS(icc_igrpen0_el1, ICC_IGRPEN0_EL1) |
| 317 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_hppir0_el1, ICC_HPPIR0_EL1) |
| 318 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_hppir1_el1, ICC_HPPIR1_EL1) |
| 319 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_iar0_el1, ICC_IAR0_EL1) |
| 320 | DEFINE_RENAME_SYSREG_READ_FUNC(icc_iar1_el1, ICC_IAR1_EL1) |
| 321 | DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_eoir0_el1, ICC_EOIR0_EL1) |
| 322 | DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_eoir1_el1, ICC_EOIR1_EL1) |
Jeenu Viswambharan | ab14e9b | 2017-09-22 08:32:09 +0100 | [diff] [blame] | 323 | DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_sgi0r_el1, ICC_SGI0R_EL1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 324 | |
Dimitris Papastamos | 525c37a | 2017-11-13 09:49:45 +0000 | [diff] [blame] | 325 | DEFINE_RENAME_SYSREG_RW_FUNCS(amcgcr_el0, AMCGCR_EL0) |
Dimitris Papastamos | e08005a | 2017-10-12 13:02:29 +0100 | [diff] [blame] | 326 | DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenclr0_el0, AMCNTENCLR0_EL0) |
| 327 | DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenset0_el0, AMCNTENSET0_EL0) |
| 328 | DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenclr1_el0, AMCNTENCLR1_EL0) |
| 329 | DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenset1_el0, AMCNTENSET1_EL0) |
| 330 | |
Dimitris Papastamos | 5bdbb47 | 2017-10-13 12:06:06 +0100 | [diff] [blame] | 331 | DEFINE_RENAME_SYSREG_RW_FUNCS(pmblimitr_el1, PMBLIMITR_EL1) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 332 | |
David Cunado | ce88eee | 2017-10-20 11:30:57 +0100 | [diff] [blame] | 333 | DEFINE_RENAME_SYSREG_WRITE_FUNC(zcr_el3, ZCR_EL3) |
| 334 | DEFINE_RENAME_SYSREG_WRITE_FUNC(zcr_el2, ZCR_EL2) |
| 335 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 336 | #define IS_IN_EL(x) \ |
| 337 | (GET_EL(read_CurrentEl()) == MODE_EL##x) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 338 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 339 | #define IS_IN_EL1() IS_IN_EL(1) |
| 340 | #define IS_IN_EL3() IS_IN_EL(3) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 341 | |
Jeenu Viswambharan | 2a9b882 | 2017-02-21 14:40:44 +0000 | [diff] [blame] | 342 | /* |
| 343 | * Check if an EL is implemented from AA64PFR0 register fields. 'el' argument |
| 344 | * must be one of 1, 2 or 3. |
| 345 | */ |
| 346 | #define EL_IMPLEMENTED(el) \ |
| 347 | ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL##el##_SHIFT) \ |
| 348 | & ID_AA64PFR0_ELX_MASK) |
| 349 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 350 | /* Previously defined accesor functions with incomplete register names */ |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 351 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 352 | #define read_current_el() read_CurrentEl() |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 353 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 354 | #define dsb() dsbsy() |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 355 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 356 | #define read_midr() read_midr_el1() |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 357 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 358 | #define read_mpidr() read_mpidr_el1() |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 359 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 360 | #define read_scr() read_scr_el3() |
| 361 | #define write_scr(_v) write_scr_el3(_v) |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 362 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 363 | #define read_hcr() read_hcr_el2() |
| 364 | #define write_hcr(_v) write_hcr_el2(_v) |
Sandrine Bailleux | 25232af | 2014-05-09 11:23:11 +0100 | [diff] [blame] | 365 | |
Andrew Thoelke | 3f78dc3 | 2014-06-02 15:44:43 +0100 | [diff] [blame] | 366 | #define read_cpacr() read_cpacr_el1() |
| 367 | #define write_cpacr(_v) write_cpacr_el1(_v) |
Soby Mathew | 5e5c207 | 2014-04-07 15:28:55 +0100 | [diff] [blame] | 368 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 369 | #endif /* __ARCH_HELPERS_H__ */ |