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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Antonio Nino Diaze40306b2017-01-13 15:03:07 +00002 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
7#ifndef __ARCH_HELPERS_H__
8#define __ARCH_HELPERS_H__
9
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010010#include <arch.h> /* for additional register definitions */
11#include <cdefs.h> /* For __dead2 */
12#include <stdint.h>
Antonio Nino Diaze40306b2017-01-13 15:03:07 +000013#include <sys/types.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010014
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010015/**********************************************************************
16 * Macros which create inline functions to read or write CPU system
17 * registers
18 *********************************************************************/
19
Sandrine Bailleux30c231b2015-01-07 16:36:11 +000020#define _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \
21static inline uint64_t read_ ## _name(void) \
22{ \
23 uint64_t v; \
24 __asm__ volatile ("mrs %0, " #_reg_name : "=r" (v)); \
25 return v; \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010026}
27
Sandrine Bailleux30c231b2015-01-07 16:36:11 +000028#define _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name) \
29static inline void write_ ## _name(uint64_t v) \
30{ \
31 __asm__ volatile ("msr " #_reg_name ", %0" : : "r" (v)); \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010032}
33
34#define _DEFINE_SYSREG_WRITE_CONST_FUNC(_name, _reg_name) \
Sandrine Bailleux30c231b2015-01-07 16:36:11 +000035static inline void write_ ## _name(const uint64_t v) \
36{ \
37 __asm__ volatile ("msr " #_reg_name ", %0" : : "i" (v)); \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010038}
39
40/* Define read function for system register */
41#define DEFINE_SYSREG_READ_FUNC(_name) \
42 _DEFINE_SYSREG_READ_FUNC(_name, _name)
43
44/* Define read & write function for system register */
45#define DEFINE_SYSREG_RW_FUNCS(_name) \
46 _DEFINE_SYSREG_READ_FUNC(_name, _name) \
47 _DEFINE_SYSREG_WRITE_FUNC(_name, _name)
48
49/* Define read & write function for renamed system register */
50#define DEFINE_RENAME_SYSREG_RW_FUNCS(_name, _reg_name) \
51 _DEFINE_SYSREG_READ_FUNC(_name, _reg_name) \
52 _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name)
53
Achin Gupta92712a52015-09-03 14:18:02 +010054/* Define read function for renamed system register */
55#define DEFINE_RENAME_SYSREG_READ_FUNC(_name, _reg_name) \
56 _DEFINE_SYSREG_READ_FUNC(_name, _reg_name)
57
58/* Define write function for renamed system register */
59#define DEFINE_RENAME_SYSREG_WRITE_FUNC(_name, _reg_name) \
60 _DEFINE_SYSREG_WRITE_FUNC(_name, _reg_name)
61
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010062/* Define write function for special system registers */
63#define DEFINE_SYSREG_WRITE_CONST_FUNC(_name) \
64 _DEFINE_SYSREG_WRITE_CONST_FUNC(_name, _name)
65
66
67/**********************************************************************
68 * Macros to create inline functions for system instructions
69 *********************************************************************/
70
71/* Define function for simple system instruction */
72#define DEFINE_SYSOP_FUNC(_op) \
Juan Castillo2d552402014-06-13 17:05:10 +010073static inline void _op(void) \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010074{ \
75 __asm__ (#_op); \
76}
77
78/* Define function for system instruction with type specifier */
79#define DEFINE_SYSOP_TYPE_FUNC(_op, _type) \
Juan Castillo2d552402014-06-13 17:05:10 +010080static inline void _op ## _type(void) \
Andrew Thoelke3f78dc32014-06-02 15:44:43 +010081{ \
82 __asm__ (#_op " " #_type); \
83}
84
85/* Define function for system instruction with register parameter */
86#define DEFINE_SYSOP_TYPE_PARAM_FUNC(_op, _type) \
87static inline void _op ## _type(uint64_t v) \
88{ \
89 __asm__ (#_op " " #_type ", %0" : : "r" (v)); \
90}
Achin Gupta4f6ad662013-10-25 09:08:21 +010091
92/*******************************************************************************
93 * TLB maintenance accessor prototypes
94 ******************************************************************************/
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +000095
96#if ERRATA_A57_813419
97/*
98 * Define function for TLBI instruction with type specifier that implements
99 * the workaround for errata 813419 of Cortex-A57.
100 */
101#define DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(_type)\
102static inline void tlbi ## _type(void) \
103{ \
104 __asm__("tlbi " #_type "\n" \
105 "dsb ish\n" \
106 "tlbi " #_type); \
107}
108
109/*
110 * Define function for TLBI instruction with register parameter that implements
111 * the workaround for errata 813419 of Cortex-A57.
112 */
113#define DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(_type) \
114static inline void tlbi ## _type(uint64_t v) \
115{ \
116 __asm__("tlbi " #_type ", %0\n" \
117 "dsb ish\n" \
118 "tlbi " #_type ", %0" : : "r" (v)); \
119}
120#endif /* ERRATA_A57_813419 */
121
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100122DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1)
123DEFINE_SYSOP_TYPE_FUNC(tlbi, alle1is)
124DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2)
125DEFINE_SYSOP_TYPE_FUNC(tlbi, alle2is)
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000126#if ERRATA_A57_813419
127DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(alle3)
128DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_FUNC(alle3is)
129#else
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100130DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3)
131DEFINE_SYSOP_TYPE_FUNC(tlbi, alle3is)
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000132#endif
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100133DEFINE_SYSOP_TYPE_FUNC(tlbi, vmalle1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100134
Antonio Nino Diazac998032017-02-27 17:23:54 +0000135DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaae1is)
136DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vaale1is)
137DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae2is)
138DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale2is)
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000139#if ERRATA_A57_813419
140DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(vae3is)
141DEFINE_TLBIOP_ERRATA_A57_813419_TYPE_PARAM_FUNC(vale3is)
142#else
Antonio Nino Diazac998032017-02-27 17:23:54 +0000143DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vae3is)
144DEFINE_SYSOP_TYPE_PARAM_FUNC(tlbi, vale3is)
Antonio Nino Diaz3f13c352017-02-24 11:39:22 +0000145#endif
Antonio Nino Diazac998032017-02-27 17:23:54 +0000146
Achin Gupta4f6ad662013-10-25 09:08:21 +0100147/*******************************************************************************
148 * Cache maintenance accessor prototypes
149 ******************************************************************************/
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100150DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, isw)
151DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cisw)
152DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, csw)
153DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvac)
154DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, ivac)
155DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, civac)
156DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, cvau)
157DEFINE_SYSOP_TYPE_PARAM_FUNC(dc, zva)
158
Varun Wadekar97625e32015-03-13 14:59:03 +0530159/*******************************************************************************
160 * Address translation accessor prototypes
161 ******************************************************************************/
162DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1r)
163DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e1w)
164DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0r)
165DEFINE_SYSOP_TYPE_PARAM_FUNC(at, s12e0w)
166
Antonio Nino Diaze40306b2017-01-13 15:03:07 +0000167void flush_dcache_range(uintptr_t addr, size_t size);
168void clean_dcache_range(uintptr_t addr, size_t size);
169void inv_dcache_range(uintptr_t addr, size_t size);
170
171void dcsw_op_louis(u_register_t op_type);
172void dcsw_op_all(u_register_t op_type);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100173
Dan Handleya17fefa2014-05-14 12:38:32 +0100174void disable_mmu_el3(void);
175void disable_mmu_icache_el3(void);
Andrew Thoelke438c63a2014-04-28 12:06:18 +0100176
Achin Gupta4f6ad662013-10-25 09:08:21 +0100177/*******************************************************************************
178 * Misc. accessor prototypes
179 ******************************************************************************/
Achin Gupta4f6ad662013-10-25 09:08:21 +0100180
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100181DEFINE_SYSREG_WRITE_CONST_FUNC(daifset)
182DEFINE_SYSREG_WRITE_CONST_FUNC(daifclr)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100183
Varun Wadekar97625e32015-03-13 14:59:03 +0530184DEFINE_SYSREG_READ_FUNC(par_el1)
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100185DEFINE_SYSREG_READ_FUNC(id_pfr1_el1)
186DEFINE_SYSREG_READ_FUNC(id_aa64pfr0_el1)
dp-armee3457b2017-05-23 09:32:49 +0100187DEFINE_SYSREG_READ_FUNC(id_aa64dfr0_el1)
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100188DEFINE_SYSREG_READ_FUNC(CurrentEl)
189DEFINE_SYSREG_RW_FUNCS(daif)
190DEFINE_SYSREG_RW_FUNCS(spsr_el1)
191DEFINE_SYSREG_RW_FUNCS(spsr_el2)
192DEFINE_SYSREG_RW_FUNCS(spsr_el3)
193DEFINE_SYSREG_RW_FUNCS(elr_el1)
194DEFINE_SYSREG_RW_FUNCS(elr_el2)
195DEFINE_SYSREG_RW_FUNCS(elr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100196
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100197DEFINE_SYSOP_FUNC(wfi)
198DEFINE_SYSOP_FUNC(wfe)
199DEFINE_SYSOP_FUNC(sev)
200DEFINE_SYSOP_TYPE_FUNC(dsb, sy)
Soby Mathewed995662014-12-30 16:11:42 +0000201DEFINE_SYSOP_TYPE_FUNC(dmb, sy)
Juan Castillo2e86cb12016-01-13 15:01:09 +0000202DEFINE_SYSOP_TYPE_FUNC(dmb, st)
203DEFINE_SYSOP_TYPE_FUNC(dmb, ld)
Soby Mathewed995662014-12-30 16:11:42 +0000204DEFINE_SYSOP_TYPE_FUNC(dsb, ish)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000205DEFINE_SYSOP_TYPE_FUNC(dsb, ishst)
Soby Mathewed995662014-12-30 16:11:42 +0000206DEFINE_SYSOP_TYPE_FUNC(dmb, ish)
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100207DEFINE_SYSOP_FUNC(isb)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100208
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100209uint32_t get_afflvl_shift(uint32_t);
210uint32_t mpidr_mask_lower_afflvls(uint64_t, uint32_t);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100211
Achin Gupta4f6ad662013-10-25 09:08:21 +0100212
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100213void __dead2 eret(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3,
214 uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7);
215void __dead2 smc(uint64_t x0, uint64_t x1, uint64_t x2, uint64_t x3,
216 uint64_t x4, uint64_t x5, uint64_t x6, uint64_t x7);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100217
218/*******************************************************************************
219 * System register accessor prototypes
220 ******************************************************************************/
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100221DEFINE_SYSREG_READ_FUNC(midr_el1)
222DEFINE_SYSREG_READ_FUNC(mpidr_el1)
Antonio Nino Diazd1beee22016-12-13 15:28:54 +0000223DEFINE_SYSREG_READ_FUNC(id_aa64mmfr0_el1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100224
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100225DEFINE_SYSREG_RW_FUNCS(scr_el3)
226DEFINE_SYSREG_RW_FUNCS(hcr_el2)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100227
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100228DEFINE_SYSREG_RW_FUNCS(vbar_el1)
229DEFINE_SYSREG_RW_FUNCS(vbar_el2)
230DEFINE_SYSREG_RW_FUNCS(vbar_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100231
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100232DEFINE_SYSREG_RW_FUNCS(sctlr_el1)
233DEFINE_SYSREG_RW_FUNCS(sctlr_el2)
234DEFINE_SYSREG_RW_FUNCS(sctlr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100235
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100236DEFINE_SYSREG_RW_FUNCS(actlr_el1)
237DEFINE_SYSREG_RW_FUNCS(actlr_el2)
238DEFINE_SYSREG_RW_FUNCS(actlr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100239
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100240DEFINE_SYSREG_RW_FUNCS(esr_el1)
241DEFINE_SYSREG_RW_FUNCS(esr_el2)
242DEFINE_SYSREG_RW_FUNCS(esr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100243
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100244DEFINE_SYSREG_RW_FUNCS(afsr0_el1)
245DEFINE_SYSREG_RW_FUNCS(afsr0_el2)
246DEFINE_SYSREG_RW_FUNCS(afsr0_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100247
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100248DEFINE_SYSREG_RW_FUNCS(afsr1_el1)
249DEFINE_SYSREG_RW_FUNCS(afsr1_el2)
250DEFINE_SYSREG_RW_FUNCS(afsr1_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100251
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100252DEFINE_SYSREG_RW_FUNCS(far_el1)
253DEFINE_SYSREG_RW_FUNCS(far_el2)
254DEFINE_SYSREG_RW_FUNCS(far_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100255
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100256DEFINE_SYSREG_RW_FUNCS(mair_el1)
257DEFINE_SYSREG_RW_FUNCS(mair_el2)
258DEFINE_SYSREG_RW_FUNCS(mair_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100259
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100260DEFINE_SYSREG_RW_FUNCS(amair_el1)
261DEFINE_SYSREG_RW_FUNCS(amair_el2)
262DEFINE_SYSREG_RW_FUNCS(amair_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100263
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100264DEFINE_SYSREG_READ_FUNC(rvbar_el1)
265DEFINE_SYSREG_READ_FUNC(rvbar_el2)
266DEFINE_SYSREG_READ_FUNC(rvbar_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100267
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100268DEFINE_SYSREG_RW_FUNCS(rmr_el1)
269DEFINE_SYSREG_RW_FUNCS(rmr_el2)
270DEFINE_SYSREG_RW_FUNCS(rmr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100271
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100272DEFINE_SYSREG_RW_FUNCS(tcr_el1)
273DEFINE_SYSREG_RW_FUNCS(tcr_el2)
274DEFINE_SYSREG_RW_FUNCS(tcr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100275
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100276DEFINE_SYSREG_RW_FUNCS(ttbr0_el1)
277DEFINE_SYSREG_RW_FUNCS(ttbr0_el2)
278DEFINE_SYSREG_RW_FUNCS(ttbr0_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100279
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100280DEFINE_SYSREG_RW_FUNCS(ttbr1_el1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100281
Sandrine Bailleux8b0eafe2015-11-25 17:00:44 +0000282DEFINE_SYSREG_RW_FUNCS(vttbr_el2)
283
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100284DEFINE_SYSREG_RW_FUNCS(cptr_el2)
285DEFINE_SYSREG_RW_FUNCS(cptr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100286
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100287DEFINE_SYSREG_RW_FUNCS(cpacr_el1)
288DEFINE_SYSREG_RW_FUNCS(cntfrq_el0)
289DEFINE_SYSREG_RW_FUNCS(cntps_ctl_el1)
290DEFINE_SYSREG_RW_FUNCS(cntps_tval_el1)
291DEFINE_SYSREG_RW_FUNCS(cntps_cval_el1)
292DEFINE_SYSREG_READ_FUNC(cntpct_el0)
293DEFINE_SYSREG_RW_FUNCS(cnthctl_el2)
Soby Mathew5e5c2072014-04-07 15:28:55 +0100294
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100295DEFINE_SYSREG_RW_FUNCS(tpidr_el3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100296
Soby Mathewfeddfcf2014-08-29 14:41:58 +0100297DEFINE_SYSREG_RW_FUNCS(cntvoff_el2)
298
Andrew Thoelke4e126072014-06-04 21:10:52 +0100299DEFINE_SYSREG_RW_FUNCS(vpidr_el2)
300DEFINE_SYSREG_RW_FUNCS(vmpidr_el2)
developer550bf5e2016-07-11 16:05:23 +0800301DEFINE_SYSREG_RW_FUNCS(cntp_ctl_el0)
Andrew Thoelke4e126072014-06-04 21:10:52 +0100302
Soby Mathew26fb90e2015-01-06 21:36:55 +0000303DEFINE_SYSREG_READ_FUNC(isr_el1)
304
Dan Handley0cdebbd2015-03-30 17:15:16 +0100305DEFINE_SYSREG_READ_FUNC(ctr_el0)
306
David Cunado5f55e282016-10-31 17:37:34 +0000307DEFINE_SYSREG_RW_FUNCS(mdcr_el2)
David Cunadoc14b08e2016-11-25 00:21:59 +0000308DEFINE_SYSREG_RW_FUNCS(hstr_el2)
309DEFINE_SYSREG_RW_FUNCS(cnthp_ctl_el2)
David Cunado5f55e282016-10-31 17:37:34 +0000310DEFINE_SYSREG_READ_FUNC(pmcr_el0)
311
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100312DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el1, ICC_SRE_EL1)
313DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el2, ICC_SRE_EL2)
314DEFINE_RENAME_SYSREG_RW_FUNCS(icc_sre_el3, ICC_SRE_EL3)
315DEFINE_RENAME_SYSREG_RW_FUNCS(icc_pmr_el1, ICC_PMR_EL1)
Jeenu Viswambharanb1e957e2017-09-22 08:32:09 +0100316DEFINE_RENAME_SYSREG_READ_FUNC(icc_rpr_el1, ICC_RPR_EL1)
Achin Gupta92712a52015-09-03 14:18:02 +0100317DEFINE_RENAME_SYSREG_RW_FUNCS(icc_igrpen1_el3, ICC_IGRPEN1_EL3)
318DEFINE_RENAME_SYSREG_RW_FUNCS(icc_igrpen0_el1, ICC_IGRPEN0_EL1)
319DEFINE_RENAME_SYSREG_READ_FUNC(icc_hppir0_el1, ICC_HPPIR0_EL1)
320DEFINE_RENAME_SYSREG_READ_FUNC(icc_hppir1_el1, ICC_HPPIR1_EL1)
321DEFINE_RENAME_SYSREG_READ_FUNC(icc_iar0_el1, ICC_IAR0_EL1)
322DEFINE_RENAME_SYSREG_READ_FUNC(icc_iar1_el1, ICC_IAR1_EL1)
323DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_eoir0_el1, ICC_EOIR0_EL1)
324DEFINE_RENAME_SYSREG_WRITE_FUNC(icc_eoir1_el1, ICC_EOIR1_EL1)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100325
Achin Gupta4f6ad662013-10-25 09:08:21 +0100326
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100327#define IS_IN_EL(x) \
328 (GET_EL(read_CurrentEl()) == MODE_EL##x)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100329
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100330#define IS_IN_EL1() IS_IN_EL(1)
331#define IS_IN_EL3() IS_IN_EL(3)
Achin Gupta4f6ad662013-10-25 09:08:21 +0100332
Jeenu Viswambharan2a9b8822017-02-21 14:40:44 +0000333/*
334 * Check if an EL is implemented from AA64PFR0 register fields. 'el' argument
335 * must be one of 1, 2 or 3.
336 */
337#define EL_IMPLEMENTED(el) \
338 ((read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL##el##_SHIFT) \
339 & ID_AA64PFR0_ELX_MASK)
340
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100341/* Previously defined accesor functions with incomplete register names */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100342
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100343#define read_current_el() read_CurrentEl()
Achin Gupta4f6ad662013-10-25 09:08:21 +0100344
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100345#define dsb() dsbsy()
Achin Gupta4f6ad662013-10-25 09:08:21 +0100346
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100347#define read_midr() read_midr_el1()
Achin Gupta4f6ad662013-10-25 09:08:21 +0100348
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100349#define read_mpidr() read_mpidr_el1()
Achin Gupta4f6ad662013-10-25 09:08:21 +0100350
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100351#define read_scr() read_scr_el3()
352#define write_scr(_v) write_scr_el3(_v)
Soby Mathew5e5c2072014-04-07 15:28:55 +0100353
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100354#define read_hcr() read_hcr_el2()
355#define write_hcr(_v) write_hcr_el2(_v)
Sandrine Bailleux25232af2014-05-09 11:23:11 +0100356
Andrew Thoelke3f78dc32014-06-02 15:44:43 +0100357#define read_cpacr() read_cpacr_el1()
358#define write_cpacr(_v) write_cpacr_el1(_v)
Soby Mathew5e5c2072014-04-07 15:28:55 +0100359
Achin Gupta4f6ad662013-10-25 09:08:21 +0100360#endif /* __ARCH_HELPERS_H__ */