developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 1 | From 7a1f0d570d96e8e23b771976da052e94def589b9 Mon Sep 17 00:00:00 2001 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 2 | From: MeiChia Chiu <meichia.chiu@mediatek.com> |
developer | f64861f | 2022-06-22 11:44:53 +0800 | [diff] [blame] | 3 | Date: Wed, 22 Jun 2022 10:45:53 +0800 |
developer | 9851a29 | 2022-12-15 17:33:43 +0800 | [diff] [blame] | 4 | Subject: [PATCH 1004/1009] mt76: mt7915: add support for muru_onoff via |
developer | bd398d5 | 2022-06-06 20:53:24 +0800 | [diff] [blame] | 5 | debugfs |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 6 | |
| 7 | --- |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 8 | mt7915/init.c | 2 ++ |
| 9 | mt7915/mcu.c | 12 +++++++++--- |
developer | 5ce5ea4 | 2022-08-31 14:12:29 +0800 | [diff] [blame] | 10 | mt7915/mcu.h | 6 ++++++ |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 11 | mt7915/mt7915.h | 2 ++ |
developer | 5ce5ea4 | 2022-08-31 14:12:29 +0800 | [diff] [blame] | 12 | mt7915/mtk_debugfs.c | 33 +++++++++++++++++++++++++++++++++ |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 13 | 5 files changed, 52 insertions(+), 3 deletions(-) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 14 | |
| 15 | diff --git a/mt7915/init.c b/mt7915/init.c |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 16 | index c27469e4..1177e4e7 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 17 | --- a/mt7915/init.c |
| 18 | +++ b/mt7915/init.c |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 19 | @@ -445,6 +445,8 @@ mt7915_init_wiphy(struct mt7915_phy *phy) |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 20 | mphy->leds.cdev.brightness_set = mt7915_led_set_brightness; |
| 21 | mphy->leds.cdev.blink_set = mt7915_led_set_blink; |
| 22 | } |
| 23 | + |
| 24 | + phy->muru_onoff = OFDMA_DL | MUMIMO_UL | MUMIMO_DL; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 25 | } |
| 26 | |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 27 | static void |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 28 | diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 29 | index 40f77428..b507f14f 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 30 | --- a/mt7915/mcu.c |
| 31 | +++ b/mt7915/mcu.c |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 32 | @@ -864,6 +864,7 @@ mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb, |
| 33 | struct ieee80211_sta *sta, struct ieee80211_vif *vif) |
| 34 | { |
| 35 | struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; |
| 36 | + struct mt7915_phy *phy = mvif->phy; |
| 37 | struct ieee80211_he_cap_elem *elem = &sta->deflink.he_cap.he_cap_elem; |
| 38 | struct sta_rec_muru *muru; |
| 39 | struct tlv *tlv; |
| 40 | @@ -876,13 +877,18 @@ mt7915_mcu_sta_muru_tlv(struct mt7915_dev *dev, struct sk_buff *skb, |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 41 | |
| 42 | muru = (struct sta_rec_muru *)tlv; |
| 43 | |
| 44 | - muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer || |
developer | eb6a018 | 2022-12-12 18:53:32 +0800 | [diff] [blame] | 45 | - mvif->cap.vht_mu_ebfer || |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 46 | - mvif->cap.vht_mu_ebfee; |
developer | eb6a018 | 2022-12-12 18:53:32 +0800 | [diff] [blame] | 47 | + muru->cfg.mimo_dl_en = (mvif->cap.he_mu_ebfer || |
| 48 | + mvif->cap.vht_mu_ebfer || |
| 49 | + mvif->cap.vht_mu_ebfee) && |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 50 | + !!(phy->muru_onoff & MUMIMO_DL); |
developer | f64861f | 2022-06-22 11:44:53 +0800 | [diff] [blame] | 51 | if (!is_mt7915(&dev->mt76)) |
| 52 | muru->cfg.mimo_ul_en = true; |
| 53 | muru->cfg.ofdma_dl_en = true; |
| 54 | |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 55 | + muru->cfg.mimo_ul_en = !!(phy->muru_onoff & MUMIMO_UL); |
| 56 | + muru->cfg.ofdma_dl_en = !!(phy->muru_onoff & OFDMA_DL); |
| 57 | + muru->cfg.ofdma_ul_en = !!(phy->muru_onoff & OFDMA_UL); |
developer | f64861f | 2022-06-22 11:44:53 +0800 | [diff] [blame] | 58 | + |
developer | eb6a018 | 2022-12-12 18:53:32 +0800 | [diff] [blame] | 59 | if (sta->deflink.vht_cap.vht_supported) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 60 | muru->mimo_dl.vht_mu_bfee = |
developer | eb6a018 | 2022-12-12 18:53:32 +0800 | [diff] [blame] | 61 | !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 62 | diff --git a/mt7915/mcu.h b/mt7915/mcu.h |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 63 | index c776417b..275a0ece 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 64 | --- a/mt7915/mcu.h |
| 65 | +++ b/mt7915/mcu.h |
developer | c04f540 | 2023-02-03 09:22:26 +0800 | [diff] [blame] | 66 | @@ -609,4 +609,10 @@ struct csi_data { |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 67 | }; |
| 68 | #endif |
| 69 | |
| 70 | +/* MURU */ |
developer | 4721e25 | 2022-06-21 16:41:28 +0800 | [diff] [blame] | 71 | +#define OFDMA_DL BIT(0) |
| 72 | +#define OFDMA_UL BIT(1) |
| 73 | +#define MUMIMO_DL BIT(2) |
| 74 | +#define MUMIMO_UL BIT(3) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 75 | + |
| 76 | #endif |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 77 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 78 | index df0d7a1e..e94970ba 100644 |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 79 | --- a/mt7915/mt7915.h |
| 80 | +++ b/mt7915/mt7915.h |
| 81 | @@ -307,6 +307,8 @@ struct mt7915_phy { |
| 82 | u32 rx_ampdu_ts; |
| 83 | u32 ampdu_ref; |
| 84 | |
| 85 | + u8 muru_onoff; |
| 86 | + |
| 87 | struct mib_stats mib; |
| 88 | struct mt76_channel_state state_ts; |
| 89 | |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 90 | diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 91 | index 530bde1a..824ddeda 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 92 | --- a/mt7915/mtk_debugfs.c |
| 93 | +++ b/mt7915/mtk_debugfs.c |
developer | d75d363 | 2023-01-05 14:31:01 +0800 | [diff] [blame] | 94 | @@ -2558,6 +2558,38 @@ static int mt7915_token_txd_read(struct seq_file *s, void *data) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 95 | return 0; |
| 96 | } |
| 97 | |
| 98 | +static int mt7915_muru_onoff_get(void *data, u64 *val) |
| 99 | +{ |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 100 | + struct mt7915_phy *phy = data; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 101 | + |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 102 | + *val = phy->muru_onoff; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 103 | + |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 104 | + printk("mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n", |
| 105 | + !!(phy->muru_onoff & MUMIMO_UL), |
| 106 | + !!(phy->muru_onoff & MUMIMO_DL), |
| 107 | + !!(phy->muru_onoff & OFDMA_UL), |
| 108 | + !!(phy->muru_onoff & OFDMA_DL)); |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 109 | + |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 110 | + return 0; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 111 | +} |
| 112 | + |
| 113 | +static int mt7915_muru_onoff_set(void *data, u64 val) |
| 114 | +{ |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 115 | + struct mt7915_phy *phy = data; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 116 | + |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 117 | + if (val > 15) { |
| 118 | + printk("Wrong value! The value is between 0 ~ 15.\n"); |
| 119 | + goto exit; |
| 120 | + } |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 121 | + |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 122 | + phy->muru_onoff = val; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 123 | +exit: |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 124 | + return 0; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 125 | +} |
| 126 | + |
| 127 | +DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_onoff, mt7915_muru_onoff_get, |
developer | 4721e25 | 2022-06-21 16:41:28 +0800 | [diff] [blame] | 128 | + mt7915_muru_onoff_set, "%llx\n"); |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 129 | + |
| 130 | static int mt7915_amsduinfo_read(struct seq_file *s, void *data) |
| 131 | { |
| 132 | struct mt7915_dev *dev = dev_get_drvdata(s->private); |
developer | d75d363 | 2023-01-05 14:31:01 +0800 | [diff] [blame] | 133 | @@ -2937,6 +2969,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 134 | |
| 135 | mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0); |
| 136 | |
developer | eb2bd8e | 2023-02-09 11:16:04 +0800 | [diff] [blame] | 137 | + debugfs_create_file("muru_onoff", 0600, dir, phy, &fops_muru_onoff); |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 138 | debugfs_create_file("fw_debug_module", 0600, dir, dev, |
| 139 | &fops_fw_debug_module); |
| 140 | debugfs_create_file("fw_debug_level", 0600, dir, dev, |
| 141 | -- |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 142 | 2.18.0 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 143 | |