blob: 72f8d249119930ac67c9710f73ca27ed603e4d9a [file] [log] [blame]
developerbd398d52022-06-06 20:53:24 +08001From 37b133c4d8fa05aae067dfb5fb68c24d3cabea2d Mon Sep 17 00:00:00 2001
developere2cc0fa2022-03-29 17:31:03 +08002From: MeiChia Chiu <meichia.chiu@mediatek.com>
3Date: Mon, 28 Mar 2022 09:19:29 +0800
developerbd398d52022-06-06 20:53:24 +08004Subject: [PATCH 1004/1007] mt76: mt7915: add support for muru_onoff via
5 debugfs
developere2cc0fa2022-03-29 17:31:03 +08006
7---
8 mt7915/init.c | 1 +
9 mt7915/mcu.c | 12 ++++++++----
10 mt7915/mcu.h | 6 ++++++
11 mt7915/mt7915.h | 1 +
12 mt7915/mtk_debugfs.c | 33 +++++++++++++++++++++++++++++++++
13 5 files changed, 49 insertions(+), 4 deletions(-)
14
15diff --git a/mt7915/init.c b/mt7915/init.c
developerbd398d52022-06-06 20:53:24 +080016index 258bb20a..2b8d758f 100644
developere2cc0fa2022-03-29 17:31:03 +080017--- a/mt7915/init.c
18+++ b/mt7915/init.c
developerbd398d52022-06-06 20:53:24 +080019@@ -576,6 +576,7 @@ static void mt7915_init_work(struct work_struct *work)
developere2cc0fa2022-03-29 17:31:03 +080020 mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband);
21 mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband);
22 mt7915_txbf_init(dev);
23+ dev->dbg.muru_onoff = OFDMA_DL | MUMIMO_UL | MUMIMO_DL;
24 }
25
26 void mt7915_wfsys_reset(struct mt7915_dev *dev)
27diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developerbd398d52022-06-06 20:53:24 +080028index 18b05b2e..5df0b4fd 100644
developere2cc0fa2022-03-29 17:31:03 +080029--- a/mt7915/mcu.c
30+++ b/mt7915/mcu.c
31@@ -944,6 +944,7 @@ mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
32 struct ieee80211_vif *vif)
33 {
34 struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv;
35+ struct mt7915_dev *dev = mvif->phy->dev;
36 struct ieee80211_he_cap_elem *elem = &sta->he_cap.he_cap_elem;
37 struct sta_rec_muru *muru;
38 struct tlv *tlv;
39@@ -956,11 +957,14 @@ mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta,
40
41 muru = (struct sta_rec_muru *)tlv;
42
43- muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer ||
44+ muru->cfg.mimo_dl_en = (mvif->cap.he_mu_ebfer ||
45 mvif->cap.vht_mu_ebfer ||
46- mvif->cap.vht_mu_ebfee;
47- muru->cfg.mimo_ul_en = true;
48- muru->cfg.ofdma_dl_en = true;
49+ mvif->cap.vht_mu_ebfee) &&
50+ !!(dev->dbg.muru_onoff & MUMIMO_DL);
51+
52+ muru->cfg.mimo_ul_en = !!(dev->dbg.muru_onoff & MUMIMO_UL);
53+ muru->cfg.ofdma_dl_en = !!(dev->dbg.muru_onoff & OFDMA_DL);
54+ muru->cfg.ofdma_ul_en = !!(dev->dbg.muru_onoff & OFDMA_UL);
55
56 if (sta->vht_cap.vht_supported)
57 muru->mimo_dl.vht_mu_bfee =
58diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developerbd398d52022-06-06 20:53:24 +080059index cb854b28..0ff1fd11 100644
developere2cc0fa2022-03-29 17:31:03 +080060--- a/mt7915/mcu.h
61+++ b/mt7915/mcu.h
developerbd398d52022-06-06 20:53:24 +080062@@ -589,4 +589,10 @@ struct csi_data {
developere2cc0fa2022-03-29 17:31:03 +080063 };
64 #endif
65
66+/* MURU */
67+#define OFDMA_DL BIT(0)
68+#define OFDMA_UL BIT(1)
69+#define MUMIMO_DL BIT(2)
70+#define MUMIMO_UL BIT(3)
71+
72 #endif
73diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developerbd398d52022-06-06 20:53:24 +080074index ace01e15..06f2737f 100644
developere2cc0fa2022-03-29 17:31:03 +080075--- a/mt7915/mt7915.h
76+++ b/mt7915/mt7915.h
developerbd398d52022-06-06 20:53:24 +080077@@ -403,6 +403,7 @@ struct mt7915_dev {
developere2cc0fa2022-03-29 17:31:03 +080078 bool dump_rx_pkt;
79 bool dump_rx_raw;
80 u32 token_idx;
81+ u8 muru_onoff;
82 } dbg;
83 const struct mt7915_dbg_reg_desc *dbg_reg;
84 #endif
85diff --git a/mt7915/mtk_debugfs.c b/mt7915/mtk_debugfs.c
developer68e1eb22022-05-09 17:02:12 +080086index ccaaea78..d2dbae45 100644
developere2cc0fa2022-03-29 17:31:03 +080087--- a/mt7915/mtk_debugfs.c
88+++ b/mt7915/mtk_debugfs.c
developer68e1eb22022-05-09 17:02:12 +080089@@ -2480,6 +2480,38 @@ static int mt7915_token_txd_read(struct seq_file *s, void *data)
developere2cc0fa2022-03-29 17:31:03 +080090 return 0;
91 }
92
93+static int mt7915_muru_onoff_get(void *data, u64 *val)
94+{
95+ struct mt7915_dev *dev = data;
96+
97+ *val = dev->dbg.muru_onoff;
98+
99+ printk("mumimo ul:%d, mumimo dl:%d, ofdma ul:%d, ofdma dl:%d\n",
100+ !!(dev->dbg.muru_onoff & MUMIMO_UL),
101+ !!(dev->dbg.muru_onoff & MUMIMO_DL),
102+ !!(dev->dbg.muru_onoff & OFDMA_UL),
103+ !!(dev->dbg.muru_onoff & OFDMA_DL));
104+
105+ return 0;
106+}
107+
108+static int mt7915_muru_onoff_set(void *data, u64 val)
109+{
110+ struct mt7915_dev *dev = data;
111+
112+ if (val > 15) {
113+ printk("Wrong value! The value is between 0 ~ 15.\n");
114+ goto exit;
115+ }
116+
117+ dev->dbg.muru_onoff = val;
118+exit:
119+ return 0;
120+}
121+
122+DEFINE_DEBUGFS_ATTRIBUTE(fops_muru_onoff, mt7915_muru_onoff_get,
123+ mt7915_muru_onoff_set, "%llx\n");
124+
125 static int mt7915_amsduinfo_read(struct seq_file *s, void *data)
126 {
127 struct mt7915_dev *dev = dev_get_drvdata(s->private);
developer68e1eb22022-05-09 17:02:12 +0800128@@ -2857,6 +2889,7 @@ int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir)
developere2cc0fa2022-03-29 17:31:03 +0800129
130 mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, 0);
131
132+ debugfs_create_file("muru_onoff", 0600, dir, dev, &fops_muru_onoff);
133 debugfs_create_file("fw_debug_module", 0600, dir, dev,
134 &fops_fw_debug_module);
135 debugfs_create_file("fw_debug_level", 0600, dir, dev,
136--
1372.18.0
138